hw/intc/arm_gicv3_kvm.c

   1 /*
   2  * ARM Generic Interrupt Controller using KVM in-kernel support
   3  *
   4  * Copyright (c) 2015 Samsung Electronics Co., Ltd.
   5  * Written by Pavel Fedin
   6  * Based on vGICv2 code by Peter Maydell
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "hw/intc/arm_gicv3_common.h"
  23 #include "hw/sysbus.h"
  24 #include "sysemu/kvm.h"
  25 #include "kvm_arm.h"
  26 #include "vgic_common.h"
  27
  28 #ifdef DEBUG_GICV3_KVM
  29 #define DPRINTF(fmt, ...) \
  30     do { fprintf(stderr, "kvm_gicv3: " fmt, ## __VA_ARGS__); } while (0)
  31 #else
  32 #define DPRINTF(fmt, ...) \
  33     do { } while (0)
  34 #endif
  35
  36 #define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3"
  37 #define KVM_ARM_GICV3(obj) \
  38      OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3)
  39 #define KVM_ARM_GICV3_CLASS(klass) \
  40      OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3)
  41 #define KVM_ARM_GICV3_GET_CLASS(obj) \
  42      OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3)
  43
  44 typedef struct KVMARMGICv3Class {
  45     ARMGICv3CommonClass parent_class;
  46     DeviceRealize parent_realize;
  47     void (*parent_reset)(DeviceState *dev);
  48 } KVMARMGICv3Class;
  49
  50 static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
  51 {
  52     GICv3State *s = (GICv3State *)opaque;
  53
  54     kvm_arm_gic_set_irq(s->num_irq, irq, level);
  55 }
  56
  57 static void kvm_arm_gicv3_put(GICv3State *s)
  58 {
  59     /* TODO */
  60     DPRINTF("Cannot put kernel gic state, no kernel interface\n");
  61 }
  62
  63 static void kvm_arm_gicv3_get(GICv3State *s)
  64 {
  65     /* TODO */
  66     DPRINTF("Cannot get kernel gic state, no kernel interface\n");
  67 }
  68
  69 static void kvm_arm_gicv3_reset(DeviceState *dev)
  70 {
  71     GICv3State *s = ARM_GICV3_COMMON(dev);
  72     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
  73
  74     DPRINTF("Reset\n");
  75
  76     kgc->parent_reset(dev);
  77     kvm_arm_gicv3_put(s);
  78 }
  79
  80 static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
  81 {
  82     GICv3State *s = KVM_ARM_GICV3(dev);
  83     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
  84     Error *local_err = NULL;
  85
  86     DPRINTF("kvm_arm_gicv3_realize\n");
  87
  88     kgc->parent_realize(dev, &local_err);
  89     if (local_err) {
  90         error_propagate(errp, local_err);
  91         return;
  92     }
  93
  94     if (s->security_extn) {
  95         error_setg(errp, "the in-kernel VGICv3 does not implement the "
  96                    "security extensions");
  97         return;
  98     }
  99
 100     gicv3_init_irqs_and_mmio(s, kvm_arm_gicv3_set_irq, NULL);
 101
 102     /* Try to create the device via the device control API */
 103     s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_V3, false);
 104     if (s->dev_fd < 0) {
 105         error_setg_errno(errp, -s->dev_fd, "error creating in-kernel VGIC");
 106         return;
 107     }
 108
 109     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS,
 110                       0, &s->num_irq, true);
 111
 112     /* Tell the kernel to complete VGIC initialization now */
 113     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
 114                       KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);
 115
 116     kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
 117                             KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd);
 118     kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
 119                             KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd);
 120 }
 121
 122 static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
 123 {
 124     DeviceClass *dc = DEVICE_CLASS(klass);
 125     ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass);
 126     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass);
 127
 128     agcc->pre_save = kvm_arm_gicv3_get;
 129     agcc->post_load = kvm_arm_gicv3_put;
 130     kgc->parent_realize = dc->realize;
 131     kgc->parent_reset = dc->reset;
 132     dc->realize = kvm_arm_gicv3_realize;
 133     dc->reset = kvm_arm_gicv3_reset;
 134 }
 135
 136 static const TypeInfo kvm_arm_gicv3_info = {
 137     .name = TYPE_KVM_ARM_GICV3,
 138     .parent = TYPE_ARM_GICV3_COMMON,
 139     .instance_size = sizeof(GICv3State),
 140     .class_init = kvm_arm_gicv3_class_init,
 141     .class_size = sizeof(KVMARMGICv3Class),
 142 };
 143
 144 static void kvm_arm_gicv3_register_types(void)
 145 {
 146     type_register_static(&kvm_arm_gicv3_info);
 147 }
 148
 149 type_init(kvm_arm_gicv3_register_types)