hw/intc/lm32_pic.c

   1 /*
   2  *  LatticeMico32 CPU interrupt controller logic.
   3  *
   4  *  Copyright (c) 2010 Michael Walle <michael@walle.cc>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21
  22 #include "migration/vmstate.h"
  23 #include "monitor/monitor.h"
  24 #include "qemu/module.h"
  25 #include "hw/sysbus.h"
  26 #include "trace.h"
  27 #include "hw/lm32/lm32_pic.h"
  28 #include "hw/intc/intc.h"
  29 #include "hw/irq.h"
  30 #include "qom/object.h"
  31
  32 #define TYPE_LM32_PIC "lm32-pic"
  33 typedef struct LM32PicState LM32PicState;
  34 #define LM32_PIC(obj) OBJECT_CHECK(LM32PicState, (obj), TYPE_LM32_PIC)
  35
  36 struct LM32PicState {
  37     SysBusDevice parent_obj;
  38
  39     qemu_irq parent_irq;
  40     uint32_t im;        /* interrupt mask */
  41     uint32_t ip;        /* interrupt pending */
  42     uint32_t irq_state;
  43
  44     /* statistics */
  45     uint64_t stats_irq_count[32];
  46 };
  47
  48 static void update_irq(LM32PicState *s)
  49 {
  50     s->ip |= s->irq_state;
  51
  52     if (s->ip & s->im) {
  53         trace_lm32_pic_raise_irq();
  54         qemu_irq_raise(s->parent_irq);
  55     } else {
  56         trace_lm32_pic_lower_irq();
  57         qemu_irq_lower(s->parent_irq);
  58     }
  59 }
  60
  61 static void irq_handler(void *opaque, int irq, int level)
  62 {
  63     LM32PicState *s = opaque;
  64
  65     assert(irq < 32);
  66     trace_lm32_pic_interrupt(irq, level);
  67
  68     if (level) {
  69         s->irq_state |= (1 << irq);
  70         s->stats_irq_count[irq]++;
  71     } else {
  72         s->irq_state &= ~(1 << irq);
  73     }
  74
  75     update_irq(s);
  76 }
  77
  78 void lm32_pic_set_im(DeviceState *d, uint32_t im)
  79 {
  80     LM32PicState *s = LM32_PIC(d);
  81
  82     trace_lm32_pic_set_im(im);
  83     s->im = im;
  84
  85     update_irq(s);
  86 }
  87
  88 void lm32_pic_set_ip(DeviceState *d, uint32_t ip)
  89 {
  90     LM32PicState *s = LM32_PIC(d);
  91
  92     trace_lm32_pic_set_ip(ip);
  93
  94     /* ack interrupt */
  95     s->ip &= ~ip;
  96
  97     update_irq(s);
  98 }
  99
 100 uint32_t lm32_pic_get_im(DeviceState *d)
 101 {
 102     LM32PicState *s = LM32_PIC(d);
 103
 104     trace_lm32_pic_get_im(s->im);
 105     return s->im;
 106 }
 107
 108 uint32_t lm32_pic_get_ip(DeviceState *d)
 109 {
 110     LM32PicState *s = LM32_PIC(d);
 111
 112     trace_lm32_pic_get_ip(s->ip);
 113     return s->ip;
 114 }
 115
 116 static void pic_reset(DeviceState *d)
 117 {
 118     LM32PicState *s = LM32_PIC(d);
 119     int i;
 120
 121     s->im = 0;
 122     s->ip = 0;
 123     s->irq_state = 0;
 124     for (i = 0; i < 32; i++) {
 125         s->stats_irq_count[i] = 0;
 126     }
 127 }
 128
 129 static bool lm32_get_statistics(InterruptStatsProvider *obj,
 130                                 uint64_t **irq_counts, unsigned int *nb_irqs)
 131 {
 132     LM32PicState *s = LM32_PIC(obj);
 133     *irq_counts = s->stats_irq_count;
 134     *nb_irqs = ARRAY_SIZE(s->stats_irq_count);
 135     return true;
 136 }
 137
 138 static void lm32_print_info(InterruptStatsProvider *obj, Monitor *mon)
 139 {
 140     LM32PicState *s = LM32_PIC(obj);
 141     monitor_printf(mon, "lm32-pic: im=%08x ip=%08x irq_state=%08x\n",
 142             s->im, s->ip, s->irq_state);
 143 }
 144
 145 static void lm32_pic_init(Object *obj)
 146 {
 147     DeviceState *dev = DEVICE(obj);
 148     LM32PicState *s = LM32_PIC(obj);
 149     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 150
 151     qdev_init_gpio_in(dev, irq_handler, 32);
 152     sysbus_init_irq(sbd, &s->parent_irq);
 153 }
 154
 155 static const VMStateDescription vmstate_lm32_pic = {
 156     .name = "lm32-pic",
 157     .version_id = 2,
 158     .minimum_version_id = 2,
 159     .fields = (VMStateField[]) {
 160         VMSTATE_UINT32(im, LM32PicState),
 161         VMSTATE_UINT32(ip, LM32PicState),
 162         VMSTATE_UINT32(irq_state, LM32PicState),
 163         VMSTATE_UINT64_ARRAY(stats_irq_count, LM32PicState, 32),
 164         VMSTATE_END_OF_LIST()
 165     }
 166 };
 167
 168 static void lm32_pic_class_init(ObjectClass *klass, void *data)
 169 {
 170     DeviceClass *dc = DEVICE_CLASS(klass);
 171     InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(klass);
 172
 173     dc->reset = pic_reset;
 174     dc->vmsd = &vmstate_lm32_pic;
 175     ic->get_statistics = lm32_get_statistics;
 176     ic->print_info = lm32_print_info;
 177 }
 178
 179 static const TypeInfo lm32_pic_info = {
 180     .name          = TYPE_LM32_PIC,
 181     .parent        = TYPE_SYS_BUS_DEVICE,
 182     .instance_size = sizeof(LM32PicState),
 183     .instance_init = lm32_pic_init,
 184     .class_init    = lm32_pic_class_init,
 185     .interfaces = (InterfaceInfo[]) {
 186         { TYPE_INTERRUPT_STATS_PROVIDER },
 187         { }
 188     },
 189 };
 190
 191 static void lm32_pic_register_types(void)
 192 {
 193     type_register_static(&lm32_pic_info);
 194 }
 195
 196 type_init(lm32_pic_register_types)