hw/intc/nios2_iic.c

   1 /*
   2  * QEMU Altera Internal Interrupt Controller.
   3  *
   4  * Copyright (c) 2012 Chris Wulff <crwulff@gmail.com>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qemu/module.h"
  23 #include "qapi/error.h"
  24
  25 #include "hw/irq.h"
  26 #include "hw/sysbus.h"
  27 #include "cpu.h"
  28 #include "qom/object.h"
  29
  30 #define TYPE_ALTERA_IIC "altera,iic"
  31 typedef struct AlteraIIC AlteraIIC;
  32 #define ALTERA_IIC(obj) \
  33     OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC)
  34
  35 struct AlteraIIC {
  36     SysBusDevice  parent_obj;
  37     void         *cpu;
  38     qemu_irq      parent_irq;
  39 };
  40
  41 static void update_irq(AlteraIIC *pv)
  42 {
  43     CPUNios2State *env = &((Nios2CPU *)(pv->cpu))->env;
  44
  45     qemu_set_irq(pv->parent_irq,
  46                  env->regs[CR_IPENDING] & env->regs[CR_IENABLE]);
  47 }
  48
  49 static void irq_handler(void *opaque, int irq, int level)
  50 {
  51     AlteraIIC *pv = opaque;
  52     CPUNios2State *env = &((Nios2CPU *)(pv->cpu))->env;
  53
  54     env->regs[CR_IPENDING] &= ~(1 << irq);
  55     env->regs[CR_IPENDING] |= !!level << irq;
  56
  57     update_irq(pv);
  58 }
  59
  60 static void altera_iic_init(Object *obj)
  61 {
  62     AlteraIIC *pv = ALTERA_IIC(obj);
  63
  64     qdev_init_gpio_in(DEVICE(pv), irq_handler, 32);
  65     sysbus_init_irq(SYS_BUS_DEVICE(obj), &pv->parent_irq);
  66 }
  67
  68 static void altera_iic_realize(DeviceState *dev, Error **errp)
  69 {
  70     struct AlteraIIC *pv = ALTERA_IIC(dev);
  71
  72     pv->cpu = object_property_get_link(OBJECT(dev), "cpu", &error_abort);
  73 }
  74
  75 static void altera_iic_class_init(ObjectClass *klass, void *data)
  76 {
  77     DeviceClass *dc = DEVICE_CLASS(klass);
  78
  79     /* Reason: needs to be wired up, e.g. by nios2_10m50_ghrd_init() */
  80     dc->user_creatable = false;
  81     dc->realize = altera_iic_realize;
  82 }
  83
  84 static TypeInfo altera_iic_info = {
  85     .name          = TYPE_ALTERA_IIC,
  86     .parent        = TYPE_SYS_BUS_DEVICE,
  87     .instance_size = sizeof(AlteraIIC),
  88     .instance_init = altera_iic_init,
  89     .class_init    = altera_iic_class_init,
  90 };
  91
  92 static void altera_iic_register(void)
  93 {
  94     type_register_static(&altera_iic_info);
  95 }
  96
  97 type_init(altera_iic_register)