]> git.proxmox.com Git - mirror_qemu.git/blob - hw/intc/xics_kvm.c
86ddf470e54650807f138083dc5d6678bdfd1df1
[mirror_qemu.git] / hw / intc / xics_kvm.c
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
5 *
6 * Copyright (c) 2013 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
27
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu-common.h"
31 #include "cpu.h"
32 #include "hw/hw.h"
33 #include "trace.h"
34 #include "sysemu/kvm.h"
35 #include "hw/ppc/spapr.h"
36 #include "hw/ppc/xics.h"
37 #include "kvm_ppc.h"
38 #include "qemu/config-file.h"
39 #include "qemu/error-report.h"
40
41 #include <sys/ioctl.h>
42
43 static int kernel_xics_fd = -1;
44
45 typedef struct KVMXICSState {
46 XICSState parent_obj;
47
48 int kernel_xics_fd;
49 } KVMXICSState;
50
51 /*
52 * ICP-KVM
53 */
54 static void icp_get_kvm_state(ICPState *ss)
55 {
56 uint64_t state;
57 struct kvm_one_reg reg = {
58 .id = KVM_REG_PPC_ICP_STATE,
59 .addr = (uintptr_t)&state,
60 };
61 int ret;
62
63 /* ICP for this CPU thread is not in use, exiting */
64 if (!ss->cs) {
65 return;
66 }
67
68 ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
69 if (ret != 0) {
70 error_report("Unable to retrieve KVM interrupt controller state"
71 " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
72 exit(1);
73 }
74
75 ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
76 ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
77 & KVM_REG_PPC_ICP_MFRR_MASK;
78 ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
79 & KVM_REG_PPC_ICP_PPRI_MASK;
80 }
81
82 static int icp_set_kvm_state(ICPState *ss, int version_id)
83 {
84 uint64_t state;
85 struct kvm_one_reg reg = {
86 .id = KVM_REG_PPC_ICP_STATE,
87 .addr = (uintptr_t)&state,
88 };
89 int ret;
90
91 /* ICP for this CPU thread is not in use, exiting */
92 if (!ss->cs) {
93 return 0;
94 }
95
96 state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
97 | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
98 | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
99
100 ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
101 if (ret != 0) {
102 error_report("Unable to restore KVM interrupt controller state (0x%"
103 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
104 strerror(errno));
105 return ret;
106 }
107
108 return 0;
109 }
110
111 static void icp_kvm_reset(DeviceState *dev)
112 {
113 ICPState *icp = ICP(dev);
114
115 icp->xirr = 0;
116 icp->pending_priority = 0xff;
117 icp->mfrr = 0xff;
118
119 /* Make all outputs as deasserted only if the CPU thread is in use */
120 if (icp->output) {
121 qemu_set_irq(icp->output, 0);
122 }
123
124 icp_set_kvm_state(icp, 1);
125 }
126
127 static void icp_kvm_class_init(ObjectClass *klass, void *data)
128 {
129 DeviceClass *dc = DEVICE_CLASS(klass);
130 ICPStateClass *icpc = ICP_CLASS(klass);
131
132 dc->reset = icp_kvm_reset;
133 icpc->pre_save = icp_get_kvm_state;
134 icpc->post_load = icp_set_kvm_state;
135 }
136
137 static const TypeInfo icp_kvm_info = {
138 .name = TYPE_KVM_ICP,
139 .parent = TYPE_ICP,
140 .instance_size = sizeof(ICPState),
141 .class_init = icp_kvm_class_init,
142 .class_size = sizeof(ICPStateClass),
143 };
144
145 /*
146 * ICS-KVM
147 */
148 static void ics_get_kvm_state(ICSState *ics)
149 {
150 uint64_t state;
151 struct kvm_device_attr attr = {
152 .flags = 0,
153 .group = KVM_DEV_XICS_GRP_SOURCES,
154 .addr = (uint64_t)(uintptr_t)&state,
155 };
156 int i;
157
158 for (i = 0; i < ics->nr_irqs; i++) {
159 ICSIRQState *irq = &ics->irqs[i];
160 int ret;
161
162 attr.attr = i + ics->offset;
163
164 ret = ioctl(kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
165 if (ret != 0) {
166 error_report("Unable to retrieve KVM interrupt controller state"
167 " for IRQ %d: %s", i + ics->offset, strerror(errno));
168 exit(1);
169 }
170
171 irq->server = state & KVM_XICS_DESTINATION_MASK;
172 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
173 & KVM_XICS_PRIORITY_MASK;
174 /*
175 * To be consistent with the software emulation in xics.c, we
176 * split out the masked state + priority that we get from the
177 * kernel into 'current priority' (0xff if masked) and
178 * 'saved priority' (if masked, this is the priority the
179 * interrupt had before it was masked). Masking and unmasking
180 * are done with the ibm,int-off and ibm,int-on RTAS calls.
181 */
182 if (state & KVM_XICS_MASKED) {
183 irq->priority = 0xff;
184 } else {
185 irq->priority = irq->saved_priority;
186 }
187
188 if (state & KVM_XICS_PENDING) {
189 if (state & KVM_XICS_LEVEL_SENSITIVE) {
190 irq->status |= XICS_STATUS_ASSERTED;
191 } else {
192 /*
193 * A pending edge-triggered interrupt (or MSI)
194 * must have been rejected previously when we
195 * first detected it and tried to deliver it,
196 * so mark it as pending and previously rejected
197 * for consistency with how xics.c works.
198 */
199 irq->status |= XICS_STATUS_MASKED_PENDING
200 | XICS_STATUS_REJECTED;
201 }
202 }
203 }
204 }
205
206 static int ics_set_kvm_state(ICSState *ics, int version_id)
207 {
208 uint64_t state;
209 struct kvm_device_attr attr = {
210 .flags = 0,
211 .group = KVM_DEV_XICS_GRP_SOURCES,
212 .addr = (uint64_t)(uintptr_t)&state,
213 };
214 int i;
215
216 for (i = 0; i < ics->nr_irqs; i++) {
217 ICSIRQState *irq = &ics->irqs[i];
218 int ret;
219
220 attr.attr = i + ics->offset;
221
222 state = irq->server;
223 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
224 << KVM_XICS_PRIORITY_SHIFT;
225 if (irq->priority != irq->saved_priority) {
226 assert(irq->priority == 0xff);
227 state |= KVM_XICS_MASKED;
228 }
229
230 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
231 state |= KVM_XICS_LEVEL_SENSITIVE;
232 if (irq->status & XICS_STATUS_ASSERTED) {
233 state |= KVM_XICS_PENDING;
234 }
235 } else {
236 if (irq->status & XICS_STATUS_MASKED_PENDING) {
237 state |= KVM_XICS_PENDING;
238 }
239 }
240
241 ret = ioctl(kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
242 if (ret != 0) {
243 error_report("Unable to restore KVM interrupt controller state"
244 " for IRQs %d: %s", i + ics->offset, strerror(errno));
245 return ret;
246 }
247 }
248
249 return 0;
250 }
251
252 static void ics_kvm_set_irq(void *opaque, int srcno, int val)
253 {
254 ICSState *ics = opaque;
255 struct kvm_irq_level args;
256 int rc;
257
258 args.irq = srcno + ics->offset;
259 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
260 if (!val) {
261 return;
262 }
263 args.level = KVM_INTERRUPT_SET;
264 } else {
265 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
266 }
267 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
268 if (rc < 0) {
269 perror("kvm_irq_line");
270 }
271 }
272
273 static void ics_kvm_reset(DeviceState *dev)
274 {
275 ICSState *ics = ICS_SIMPLE(dev);
276 int i;
277 uint8_t flags[ics->nr_irqs];
278
279 for (i = 0; i < ics->nr_irqs; i++) {
280 flags[i] = ics->irqs[i].flags;
281 }
282
283 memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
284
285 for (i = 0; i < ics->nr_irqs; i++) {
286 ics->irqs[i].priority = 0xff;
287 ics->irqs[i].saved_priority = 0xff;
288 ics->irqs[i].flags = flags[i];
289 }
290
291 ics_set_kvm_state(ics, 1);
292 }
293
294 static void ics_kvm_realize(DeviceState *dev, Error **errp)
295 {
296 ICSState *ics = ICS_SIMPLE(dev);
297
298 if (!ics->nr_irqs) {
299 error_setg(errp, "Number of interrupts needs to be greater 0");
300 return;
301 }
302 ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
303 ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
304 }
305
306 static void ics_kvm_class_init(ObjectClass *klass, void *data)
307 {
308 DeviceClass *dc = DEVICE_CLASS(klass);
309 ICSStateClass *icsc = ICS_BASE_CLASS(klass);
310
311 icsc->realize = ics_kvm_realize;
312 dc->reset = ics_kvm_reset;
313 icsc->pre_save = ics_get_kvm_state;
314 icsc->post_load = ics_set_kvm_state;
315 }
316
317 static const TypeInfo ics_kvm_info = {
318 .name = TYPE_ICS_KVM,
319 .parent = TYPE_ICS_SIMPLE,
320 .instance_size = sizeof(ICSState),
321 .class_init = ics_kvm_class_init,
322 };
323
324 /*
325 * XICS-KVM
326 */
327 static void xics_kvm_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
328 {
329 CPUState *cs;
330 ICPState *ss;
331 int ret;
332
333 cs = CPU(cpu);
334 ss = &xics->ss[cs->cpu_index];
335
336 assert(cs->cpu_index < xics->nr_servers);
337 if (kernel_xics_fd == -1) {
338 abort();
339 }
340
341 /*
342 * If we are reusing a parked vCPU fd corresponding to the CPU
343 * which was hot-removed earlier we don't have to renable
344 * KVM_CAP_IRQ_XICS capability again.
345 */
346 if (ss->cap_irq_xics_enabled) {
347 return;
348 }
349
350 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
351 kvm_arch_vcpu_id(cs));
352 if (ret < 0) {
353 error_report("Unable to connect CPU%ld to kernel XICS: %s",
354 kvm_arch_vcpu_id(cs), strerror(errno));
355 exit(1);
356 }
357 ss->cap_irq_xics_enabled = true;
358 }
359
360 static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
361 uint32_t token,
362 uint32_t nargs, target_ulong args,
363 uint32_t nret, target_ulong rets)
364 {
365 error_report("pseries: %s must never be called for in-kernel XICS",
366 __func__);
367 }
368
369 static void xics_kvm_realize(DeviceState *dev, Error **errp)
370 {
371 int rc;
372 struct kvm_create_device xics_create_device = {
373 .type = KVM_DEV_TYPE_XICS,
374 .flags = 0,
375 };
376
377 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
378 error_setg(errp,
379 "KVM and IRQ_XICS capability must be present for in-kernel XICS");
380 goto fail;
381 }
382
383 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
384 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
385 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
386 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
387
388 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
389 if (rc < 0) {
390 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
391 goto fail;
392 }
393
394 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
395 if (rc < 0) {
396 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
397 goto fail;
398 }
399
400 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
401 if (rc < 0) {
402 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
403 goto fail;
404 }
405
406 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
407 if (rc < 0) {
408 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
409 goto fail;
410 }
411
412 /* Create the kernel ICP */
413 rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
414 if (rc < 0) {
415 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
416 goto fail;
417 }
418
419 kernel_xics_fd = xics_create_device.fd;
420
421 kvm_kernel_irqchip = true;
422 kvm_msi_via_irqfd_allowed = true;
423 kvm_gsi_direct_mapping = true;
424
425 return;
426
427 fail:
428 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
429 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
430 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
431 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
432 }
433
434 static void xics_kvm_class_init(ObjectClass *oc, void *data)
435 {
436 DeviceClass *dc = DEVICE_CLASS(oc);
437 XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
438
439 dc->realize = xics_kvm_realize;
440 xsc->cpu_setup = xics_kvm_cpu_setup;
441 }
442
443 static const TypeInfo xics_spapr_kvm_info = {
444 .name = TYPE_XICS_SPAPR_KVM,
445 .parent = TYPE_XICS_COMMON,
446 .instance_size = sizeof(KVMXICSState),
447 .class_init = xics_kvm_class_init,
448 };
449
450 static void xics_kvm_register_types(void)
451 {
452 type_register_static(&xics_spapr_kvm_info);
453 type_register_static(&ics_kvm_info);
454 type_register_static(&icp_kvm_info);
455 }
456
457 type_init(xics_kvm_register_types)