2 * QEMU PowerPC XIVE interrupt controller model
4 * Copyright (c) 2017-2018, IBM Corporation.
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
10 #include "qemu/osdep.h"
12 #include "qapi/error.h"
13 #include "target/ppc/cpu.h"
14 #include "sysemu/cpus.h"
15 #include "sysemu/dma.h"
16 #include "hw/qdev-properties.h"
17 #include "monitor/monitor.h"
18 #include "hw/ppc/xive.h"
24 static uint8_t xive_esb_set(uint8_t *pq
, uint8_t value
)
26 uint8_t old_pq
= *pq
& 0x3;
34 static bool xive_esb_trigger(uint8_t *pq
)
36 uint8_t old_pq
= *pq
& 0x3;
40 xive_esb_set(pq
, XIVE_ESB_PENDING
);
42 case XIVE_ESB_PENDING
:
44 xive_esb_set(pq
, XIVE_ESB_QUEUED
);
47 xive_esb_set(pq
, XIVE_ESB_OFF
);
50 g_assert_not_reached();
54 static bool xive_esb_eoi(uint8_t *pq
)
56 uint8_t old_pq
= *pq
& 0x3;
60 case XIVE_ESB_PENDING
:
61 xive_esb_set(pq
, XIVE_ESB_RESET
);
64 xive_esb_set(pq
, XIVE_ESB_PENDING
);
67 xive_esb_set(pq
, XIVE_ESB_OFF
);
70 g_assert_not_reached();
75 * XIVE Interrupt Source (or IVSE)
78 uint8_t xive_source_esb_get(XiveSource
*xsrc
, uint32_t srcno
)
80 assert(srcno
< xsrc
->nr_irqs
);
82 return xsrc
->status
[srcno
] & 0x3;
85 uint8_t xive_source_esb_set(XiveSource
*xsrc
, uint32_t srcno
, uint8_t pq
)
87 assert(srcno
< xsrc
->nr_irqs
);
89 return xive_esb_set(&xsrc
->status
[srcno
], pq
);
93 * Returns whether the event notification should be forwarded.
95 static bool xive_source_lsi_trigger(XiveSource
*xsrc
, uint32_t srcno
)
97 uint8_t old_pq
= xive_source_esb_get(xsrc
, srcno
);
99 xsrc
->status
[srcno
] |= XIVE_STATUS_ASSERTED
;
103 xive_source_esb_set(xsrc
, srcno
, XIVE_ESB_PENDING
);
111 * Returns whether the event notification should be forwarded.
113 static bool xive_source_esb_trigger(XiveSource
*xsrc
, uint32_t srcno
)
117 assert(srcno
< xsrc
->nr_irqs
);
119 ret
= xive_esb_trigger(&xsrc
->status
[srcno
]);
121 if (xive_source_irq_is_lsi(xsrc
, srcno
) &&
122 xive_source_esb_get(xsrc
, srcno
) == XIVE_ESB_QUEUED
) {
123 qemu_log_mask(LOG_GUEST_ERROR
,
124 "XIVE: queued an event on LSI IRQ %d\n", srcno
);
131 * Returns whether the event notification should be forwarded.
133 static bool xive_source_esb_eoi(XiveSource
*xsrc
, uint32_t srcno
)
137 assert(srcno
< xsrc
->nr_irqs
);
139 ret
= xive_esb_eoi(&xsrc
->status
[srcno
]);
142 * LSI sources do not set the Q bit but they can still be
143 * asserted, in which case we should forward a new event
146 if (xive_source_irq_is_lsi(xsrc
, srcno
) &&
147 xsrc
->status
[srcno
] & XIVE_STATUS_ASSERTED
) {
148 ret
= xive_source_lsi_trigger(xsrc
, srcno
);
155 * Forward the source event notification to the Router
157 static void xive_source_notify(XiveSource
*xsrc
, int srcno
)
159 XiveNotifierClass
*xnc
= XIVE_NOTIFIER_GET_CLASS(xsrc
->xive
);
162 xnc
->notify(xsrc
->xive
, srcno
);
167 * In a two pages ESB MMIO setting, even page is the trigger page, odd
168 * page is for management
170 static inline bool addr_is_even(hwaddr addr
, uint32_t shift
)
172 return !((addr
>> shift
) & 1);
175 static inline bool xive_source_is_trigger_page(XiveSource
*xsrc
, hwaddr addr
)
177 return xive_source_esb_has_2page(xsrc
) &&
178 addr_is_even(addr
, xsrc
->esb_shift
- 1);
183 * Trigger page Management/EOI page
185 * ESB MMIO setting 2 pages 1 or 2 pages
187 * 0x000 .. 0x3FF -1 EOI and return 0|1
188 * 0x400 .. 0x7FF -1 EOI and return 0|1
189 * 0x800 .. 0xBFF -1 return PQ
190 * 0xC00 .. 0xCFF -1 return PQ and atomically PQ=00
191 * 0xD00 .. 0xDFF -1 return PQ and atomically PQ=01
192 * 0xE00 .. 0xDFF -1 return PQ and atomically PQ=10
193 * 0xF00 .. 0xDFF -1 return PQ and atomically PQ=11
195 static uint64_t xive_source_esb_read(void *opaque
, hwaddr addr
, unsigned size
)
197 XiveSource
*xsrc
= XIVE_SOURCE(opaque
);
198 uint32_t offset
= addr
& 0xFFF;
199 uint32_t srcno
= addr
>> xsrc
->esb_shift
;
202 /* In a two pages ESB MMIO setting, trigger page should not be read */
203 if (xive_source_is_trigger_page(xsrc
, addr
)) {
204 qemu_log_mask(LOG_GUEST_ERROR
,
205 "XIVE: invalid load on IRQ %d trigger page at "
206 "0x%"HWADDR_PRIx
"\n", srcno
, addr
);
211 case XIVE_ESB_LOAD_EOI
... XIVE_ESB_LOAD_EOI
+ 0x7FF:
212 ret
= xive_source_esb_eoi(xsrc
, srcno
);
214 /* Forward the source event notification for routing */
216 xive_source_notify(xsrc
, srcno
);
220 case XIVE_ESB_GET
... XIVE_ESB_GET
+ 0x3FF:
221 ret
= xive_source_esb_get(xsrc
, srcno
);
224 case XIVE_ESB_SET_PQ_00
... XIVE_ESB_SET_PQ_00
+ 0x0FF:
225 case XIVE_ESB_SET_PQ_01
... XIVE_ESB_SET_PQ_01
+ 0x0FF:
226 case XIVE_ESB_SET_PQ_10
... XIVE_ESB_SET_PQ_10
+ 0x0FF:
227 case XIVE_ESB_SET_PQ_11
... XIVE_ESB_SET_PQ_11
+ 0x0FF:
228 ret
= xive_source_esb_set(xsrc
, srcno
, (offset
>> 8) & 0x3);
231 qemu_log_mask(LOG_GUEST_ERROR
, "XIVE: invalid ESB load addr %x\n",
240 * Trigger page Management/EOI page
242 * ESB MMIO setting 2 pages 1 or 2 pages
244 * 0x000 .. 0x3FF Trigger Trigger
245 * 0x400 .. 0x7FF Trigger EOI
246 * 0x800 .. 0xBFF Trigger undefined
247 * 0xC00 .. 0xCFF Trigger PQ=00
248 * 0xD00 .. 0xDFF Trigger PQ=01
249 * 0xE00 .. 0xDFF Trigger PQ=10
250 * 0xF00 .. 0xDFF Trigger PQ=11
252 static void xive_source_esb_write(void *opaque
, hwaddr addr
,
253 uint64_t value
, unsigned size
)
255 XiveSource
*xsrc
= XIVE_SOURCE(opaque
);
256 uint32_t offset
= addr
& 0xFFF;
257 uint32_t srcno
= addr
>> xsrc
->esb_shift
;
260 /* In a two pages ESB MMIO setting, trigger page only triggers */
261 if (xive_source_is_trigger_page(xsrc
, addr
)) {
262 notify
= xive_source_esb_trigger(xsrc
, srcno
);
268 notify
= xive_source_esb_trigger(xsrc
, srcno
);
271 case XIVE_ESB_STORE_EOI
... XIVE_ESB_STORE_EOI
+ 0x3FF:
272 if (!(xsrc
->esb_flags
& XIVE_SRC_STORE_EOI
)) {
273 qemu_log_mask(LOG_GUEST_ERROR
,
274 "XIVE: invalid Store EOI for IRQ %d\n", srcno
);
278 notify
= xive_source_esb_eoi(xsrc
, srcno
);
281 case XIVE_ESB_SET_PQ_00
... XIVE_ESB_SET_PQ_00
+ 0x0FF:
282 case XIVE_ESB_SET_PQ_01
... XIVE_ESB_SET_PQ_01
+ 0x0FF:
283 case XIVE_ESB_SET_PQ_10
... XIVE_ESB_SET_PQ_10
+ 0x0FF:
284 case XIVE_ESB_SET_PQ_11
... XIVE_ESB_SET_PQ_11
+ 0x0FF:
285 xive_source_esb_set(xsrc
, srcno
, (offset
>> 8) & 0x3);
289 qemu_log_mask(LOG_GUEST_ERROR
, "XIVE: invalid ESB write addr %x\n",
295 /* Forward the source event notification for routing */
297 xive_source_notify(xsrc
, srcno
);
301 static const MemoryRegionOps xive_source_esb_ops
= {
302 .read
= xive_source_esb_read
,
303 .write
= xive_source_esb_write
,
304 .endianness
= DEVICE_BIG_ENDIAN
,
306 .min_access_size
= 8,
307 .max_access_size
= 8,
310 .min_access_size
= 8,
311 .max_access_size
= 8,
315 static void xive_source_set_irq(void *opaque
, int srcno
, int val
)
317 XiveSource
*xsrc
= XIVE_SOURCE(opaque
);
320 if (xive_source_irq_is_lsi(xsrc
, srcno
)) {
322 notify
= xive_source_lsi_trigger(xsrc
, srcno
);
324 xsrc
->status
[srcno
] &= ~XIVE_STATUS_ASSERTED
;
328 notify
= xive_source_esb_trigger(xsrc
, srcno
);
332 /* Forward the source event notification for routing */
334 xive_source_notify(xsrc
, srcno
);
338 void xive_source_pic_print_info(XiveSource
*xsrc
, uint32_t offset
, Monitor
*mon
)
342 for (i
= 0; i
< xsrc
->nr_irqs
; i
++) {
343 uint8_t pq
= xive_source_esb_get(xsrc
, i
);
345 if (pq
== XIVE_ESB_OFF
) {
349 monitor_printf(mon
, " %08x %s %c%c%c\n", i
+ offset
,
350 xive_source_irq_is_lsi(xsrc
, i
) ? "LSI" : "MSI",
351 pq
& XIVE_ESB_VAL_P
? 'P' : '-',
352 pq
& XIVE_ESB_VAL_Q
? 'Q' : '-',
353 xsrc
->status
[i
] & XIVE_STATUS_ASSERTED
? 'A' : ' ');
357 static void xive_source_reset(void *dev
)
359 XiveSource
*xsrc
= XIVE_SOURCE(dev
);
361 /* Do not clear the LSI bitmap */
363 /* PQs are initialized to 0b01 (Q=1) which corresponds to "ints off" */
364 memset(xsrc
->status
, XIVE_ESB_OFF
, xsrc
->nr_irqs
);
367 static void xive_source_realize(DeviceState
*dev
, Error
**errp
)
369 XiveSource
*xsrc
= XIVE_SOURCE(dev
);
371 Error
*local_err
= NULL
;
373 obj
= object_property_get_link(OBJECT(dev
), "xive", &local_err
);
375 error_propagate(errp
, local_err
);
376 error_prepend(errp
, "required link 'xive' not found: ");
380 xsrc
->xive
= XIVE_NOTIFIER(obj
);
382 if (!xsrc
->nr_irqs
) {
383 error_setg(errp
, "Number of interrupt needs to be greater than 0");
387 if (xsrc
->esb_shift
!= XIVE_ESB_4K
&&
388 xsrc
->esb_shift
!= XIVE_ESB_4K_2PAGE
&&
389 xsrc
->esb_shift
!= XIVE_ESB_64K
&&
390 xsrc
->esb_shift
!= XIVE_ESB_64K_2PAGE
) {
391 error_setg(errp
, "Invalid ESB shift setting");
395 xsrc
->status
= g_malloc0(xsrc
->nr_irqs
);
396 xsrc
->lsi_map
= bitmap_new(xsrc
->nr_irqs
);
398 memory_region_init_io(&xsrc
->esb_mmio
, OBJECT(xsrc
),
399 &xive_source_esb_ops
, xsrc
, "xive.esb",
400 (1ull << xsrc
->esb_shift
) * xsrc
->nr_irqs
);
402 xsrc
->qirqs
= qemu_allocate_irqs(xive_source_set_irq
, xsrc
,
405 qemu_register_reset(xive_source_reset
, dev
);
408 static const VMStateDescription vmstate_xive_source
= {
409 .name
= TYPE_XIVE_SOURCE
,
411 .minimum_version_id
= 1,
412 .fields
= (VMStateField
[]) {
413 VMSTATE_UINT32_EQUAL(nr_irqs
, XiveSource
, NULL
),
414 VMSTATE_VBUFFER_UINT32(status
, XiveSource
, 1, NULL
, nr_irqs
),
415 VMSTATE_END_OF_LIST()
420 * The default XIVE interrupt source setting for the ESB MMIOs is two
421 * 64k pages without Store EOI, to be in sync with KVM.
423 static Property xive_source_properties
[] = {
424 DEFINE_PROP_UINT64("flags", XiveSource
, esb_flags
, 0),
425 DEFINE_PROP_UINT32("nr-irqs", XiveSource
, nr_irqs
, 0),
426 DEFINE_PROP_UINT32("shift", XiveSource
, esb_shift
, XIVE_ESB_64K_2PAGE
),
427 DEFINE_PROP_END_OF_LIST(),
430 static void xive_source_class_init(ObjectClass
*klass
, void *data
)
432 DeviceClass
*dc
= DEVICE_CLASS(klass
);
434 dc
->desc
= "XIVE Interrupt Source";
435 dc
->props
= xive_source_properties
;
436 dc
->realize
= xive_source_realize
;
437 dc
->vmsd
= &vmstate_xive_source
;
440 static const TypeInfo xive_source_info
= {
441 .name
= TYPE_XIVE_SOURCE
,
442 .parent
= TYPE_DEVICE
,
443 .instance_size
= sizeof(XiveSource
),
444 .class_init
= xive_source_class_init
,
450 static const TypeInfo xive_fabric_info
= {
451 .name
= TYPE_XIVE_NOTIFIER
,
452 .parent
= TYPE_INTERFACE
,
453 .class_size
= sizeof(XiveNotifierClass
),
456 static void xive_register_types(void)
458 type_register_static(&xive_source_info
);
459 type_register_static(&xive_fabric_info
);
462 type_init(xive_register_types
)