hw/isa_mmio.c

   1 /*
   2  * Memory mapped access to ISA IO space.
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "vl.h"
  26
  27 static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
  28                                   uint32_t val)
  29 {
  30     cpu_outb(NULL, addr & 0xffff, val);
  31 }
  32
  33 static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
  34                                   uint32_t val)
  35 {
  36 #ifdef TARGET_WORDS_BIGENDIAN
  37     val = bswap16(val);
  38 #endif
  39     cpu_outw(NULL, addr & 0xffff, val);
  40 }
  41
  42 static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
  43                                 uint32_t val)
  44 {
  45 #ifdef TARGET_WORDS_BIGENDIAN
  46     val = bswap32(val);
  47 #endif
  48     cpu_outl(NULL, addr & 0xffff, val);
  49 }
  50
  51 static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
  52 {
  53     uint32_t val;
  54
  55     val = cpu_inb(NULL, addr & 0xffff);
  56     return val;
  57 }
  58
  59 static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr)
  60 {
  61     uint32_t val;
  62
  63     val = cpu_inw(NULL, addr & 0xffff);
  64 #ifdef TARGET_WORDS_BIGENDIAN
  65     val = bswap16(val);
  66 #endif
  67     return val;
  68 }
  69
  70 static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr)
  71 {
  72     uint32_t val;
  73
  74     val = cpu_inl(NULL, addr & 0xffff);
  75 #ifdef TARGET_WORDS_BIGENDIAN
  76     val = bswap32(val);
  77 #endif
  78     return val;
  79 }
  80
  81 static CPUWriteMemoryFunc *isa_mmio_write[] = {
  82     &isa_mmio_writeb,
  83     &isa_mmio_writew,
  84     &isa_mmio_writel,
  85 };
  86
  87 static CPUReadMemoryFunc *isa_mmio_read[] = {
  88     &isa_mmio_readb,
  89     &isa_mmio_readw,
  90     &isa_mmio_readl,
  91 };
  92
  93 static int isa_mmio_iomemtype = 0;
  94
  95 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size)
  96 {
  97     if (!isa_mmio_iomemtype) {
  98         isa_mmio_iomemtype = cpu_register_io_memory(0, isa_mmio_read,
  99                                                     isa_mmio_write, NULL);
 100     }
 101     cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
 102 }