2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu/datadir.h"
26 #include "qemu/guest-random.h"
27 #include "sysemu/sysemu.h"
29 #include "hw/boards.h"
30 #include "hw/or-irq.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "hw/char/escc.h"
35 #include "hw/sysbus.h"
36 #include "hw/scsi/esp.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
40 #include "hw/m68k/q800.h"
41 #include "hw/m68k/q800-glue.h"
42 #include "hw/misc/mac_via.h"
43 #include "hw/misc/djmemc.h"
44 #include "hw/misc/iosb.h"
45 #include "hw/input/adb.h"
46 #include "hw/nubus/mac-nubus-bridge.h"
47 #include "hw/display/macfb.h"
48 #include "hw/block/swim.h"
50 #include "qapi/error.h"
51 #include "qemu/error-report.h"
52 #include "sysemu/qtest.h"
53 #include "sysemu/runstate.h"
54 #include "sysemu/reset.h"
55 #include "migration/vmstate.h"
57 #define MACROM_ADDR 0x40800000
58 #define MACROM_SIZE 0x00100000
60 #define MACROM_FILENAME "MacROM.bin"
62 #define IO_BASE 0x50000000
63 #define IO_SLICE 0x00040000
64 #define IO_SLICE_MASK (IO_SLICE - 1)
65 #define IO_SIZE 0x04000000
67 #define VIA_BASE (IO_BASE + 0x00000)
68 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
69 #define SONIC_BASE (IO_BASE + 0x0a000)
70 #define SCC_BASE (IO_BASE + 0x0c020)
71 #define DJMEMC_BASE (IO_BASE + 0x0e000)
72 #define ESP_BASE (IO_BASE + 0x10000)
73 #define ESP_PDMA (IO_BASE + 0x10100)
74 #define ASC_BASE (IO_BASE + 0x14000)
75 #define IOSB_BASE (IO_BASE + 0x18000)
76 #define SWIM_BASE (IO_BASE + 0x1E000)
78 #define SONIC_PROM_SIZE 0x1000
81 * the video base, whereas it a Nubus address,
82 * is needed by the kernel to have early display and
83 * thus provided by the bootloader
85 #define VIDEO_BASE 0xf9000000
87 #define MAC_CLOCK 3686418
90 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
91 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800
93 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
96 /* Quadra 800 machine ID */
97 #define Q800_MACHINE_ID 0xa55a2bad
100 static void main_cpu_reset(void *opaque
)
102 M68kCPU
*cpu
= opaque
;
103 CPUState
*cs
= CPU(cpu
);
106 cpu
->env
.aregs
[7] = ldl_phys(cs
->as
, 0);
107 cpu
->env
.pc
= ldl_phys(cs
->as
, 4);
110 static void rerandomize_rng_seed(void *opaque
)
112 struct bi_record
*rng_seed
= opaque
;
113 qemu_guest_getrandom_nofail((void *)rng_seed
->data
+ 2,
114 be16_to_cpu(*(uint16_t *)rng_seed
->data
));
117 static uint8_t fake_mac_rom
[] = {
118 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
120 /* offset: 0xa - mac_reset */
122 /* via2[vDirB] |= VIA2B_vPower */
123 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
124 0x10, 0x10, /* moveb %a0@,%d0 */
125 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
126 0x10, 0x80, /* moveb %d0,%a0@ */
128 /* via2[vBufB] &= ~VIA2B_vPower */
129 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
130 0x10, 0x10, /* moveb %a0@,%d0 */
131 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
132 0x10, 0x80, /* moveb %d0,%a0@ */
135 0x60, 0xFE /* bras [self] */
138 static MemTxResult
macio_alias_read(void *opaque
, hwaddr addr
, uint64_t *data
,
139 unsigned size
, MemTxAttrs attrs
)
144 addr
&= IO_SLICE_MASK
;
149 val
= address_space_ldl_be(&address_space_memory
, addr
, attrs
, &r
);
152 val
= address_space_lduw_be(&address_space_memory
, addr
, attrs
, &r
);
155 val
= address_space_ldub(&address_space_memory
, addr
, attrs
, &r
);
158 g_assert_not_reached();
165 static MemTxResult
macio_alias_write(void *opaque
, hwaddr addr
, uint64_t value
,
166 unsigned size
, MemTxAttrs attrs
)
170 addr
&= IO_SLICE_MASK
;
175 address_space_stl_be(&address_space_memory
, addr
, value
, attrs
, &r
);
178 address_space_stw_be(&address_space_memory
, addr
, value
, attrs
, &r
);
181 address_space_stb(&address_space_memory
, addr
, value
, attrs
, &r
);
184 g_assert_not_reached();
190 static const MemoryRegionOps macio_alias_ops
= {
191 .read_with_attrs
= macio_alias_read
,
192 .write_with_attrs
= macio_alias_write
,
193 .endianness
= DEVICE_BIG_ENDIAN
,
195 .min_access_size
= 1,
196 .max_access_size
= 4,
200 static uint64_t machine_id_read(void *opaque
, hwaddr addr
, unsigned size
)
202 return Q800_MACHINE_ID
;
205 static void machine_id_write(void *opaque
, hwaddr addr
, uint64_t val
,
211 static const MemoryRegionOps machine_id_ops
= {
212 .read
= machine_id_read
,
213 .write
= machine_id_write
,
214 .endianness
= DEVICE_BIG_ENDIAN
,
216 .min_access_size
= 4,
217 .max_access_size
= 4,
221 static void q800_machine_init(MachineState
*machine
)
223 Q800MachineState
*m
= Q800_MACHINE(machine
);
229 ram_addr_t initrd_base
;
231 MemoryRegion
*dp8393x_prom
= g_new(MemoryRegion
, 1);
234 MacFbMode
*macfb_mode
;
235 ram_addr_t ram_size
= machine
->ram_size
;
236 const char *kernel_filename
= machine
->kernel_filename
;
237 const char *initrd_filename
= machine
->initrd_filename
;
238 const char *kernel_cmdline
= machine
->kernel_cmdline
;
239 const char *bios_name
= machine
->firmware
?: MACROM_FILENAME
;
240 hwaddr parameters_base
;
243 SysBusESPState
*sysbus_esp
;
245 SysBusDevice
*sysbus
;
249 uint8_t rng_seed
[32];
251 linux_boot
= (kernel_filename
!= NULL
);
253 if (ram_size
> 1 * GiB
) {
254 error_report("Too much memory for this machine: %" PRId64
" MiB, "
255 "maximum 1024 MiB", ram_size
/ MiB
);
260 object_initialize_child(OBJECT(machine
), "cpu", &m
->cpu
, machine
->cpu_type
);
261 qdev_realize(DEVICE(&m
->cpu
), NULL
, &error_fatal
);
262 qemu_register_reset(main_cpu_reset
, &m
->cpu
);
265 memory_region_add_subregion(get_system_memory(), 0, machine
->ram
);
268 * Create container for all IO devices
270 memory_region_init(&m
->macio
, OBJECT(machine
), "mac-io", IO_SLICE
);
271 memory_region_add_subregion(get_system_memory(), IO_BASE
, &m
->macio
);
274 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
275 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
277 memory_region_init_io(&m
->macio_alias
, OBJECT(machine
), &macio_alias_ops
,
278 &m
->macio
, "mac-io.alias", IO_SIZE
- IO_SLICE
);
279 memory_region_add_subregion(get_system_memory(), IO_BASE
+ IO_SLICE
,
282 memory_region_init_io(&m
->machine_id
, NULL
, &machine_id_ops
, NULL
,
284 memory_region_add_subregion(get_system_memory(), 0x5ffffffc,
288 object_initialize_child(OBJECT(machine
), "glue", &m
->glue
, TYPE_GLUE
);
289 object_property_set_link(OBJECT(&m
->glue
), "cpu", OBJECT(&m
->cpu
),
291 sysbus_realize(SYS_BUS_DEVICE(&m
->glue
), &error_fatal
);
293 /* djMEMC memory controller */
294 object_initialize_child(OBJECT(machine
), "djmemc", &m
->djmemc
,
296 sysbus
= SYS_BUS_DEVICE(&m
->djmemc
);
297 sysbus_realize_and_unref(sysbus
, &error_fatal
);
298 memory_region_add_subregion(&m
->macio
, DJMEMC_BASE
- IO_BASE
,
299 sysbus_mmio_get_region(sysbus
, 0));
302 object_initialize_child(OBJECT(machine
), "iosb", &m
->iosb
, TYPE_IOSB
);
303 sysbus
= SYS_BUS_DEVICE(&m
->iosb
);
304 sysbus_realize_and_unref(sysbus
, &error_fatal
);
305 memory_region_add_subregion(&m
->macio
, IOSB_BASE
- IO_BASE
,
306 sysbus_mmio_get_region(sysbus
, 0));
309 object_initialize_child(OBJECT(machine
), "via1", &m
->via1
,
310 TYPE_MOS6522_Q800_VIA1
);
311 dinfo
= drive_get(IF_MTD
, 0, 0);
313 qdev_prop_set_drive(DEVICE(&m
->via1
), "drive",
314 blk_by_legacy_dinfo(dinfo
));
316 sysbus
= SYS_BUS_DEVICE(&m
->via1
);
317 sysbus_realize(sysbus
, &error_fatal
);
318 memory_region_add_subregion(&m
->macio
, VIA_BASE
- IO_BASE
,
319 sysbus_mmio_get_region(sysbus
, 1));
320 sysbus_connect_irq(sysbus
, 0,
321 qdev_get_gpio_in(DEVICE(&m
->glue
), GLUE_IRQ_IN_VIA1
));
323 qdev_connect_gpio_out(DEVICE(&m
->via1
), 0,
324 qdev_get_gpio_in_named(DEVICE(&m
->glue
),
327 adb_bus
= qdev_get_child_bus(DEVICE(&m
->via1
), "adb.0");
328 dev
= qdev_new(TYPE_ADB_KEYBOARD
);
329 qdev_realize_and_unref(dev
, adb_bus
, &error_fatal
);
330 dev
= qdev_new(TYPE_ADB_MOUSE
);
331 qdev_realize_and_unref(dev
, adb_bus
, &error_fatal
);
334 object_initialize_child(OBJECT(machine
), "via2", &m
->via2
,
335 TYPE_MOS6522_Q800_VIA2
);
336 sysbus
= SYS_BUS_DEVICE(&m
->via2
);
337 sysbus_realize(sysbus
, &error_fatal
);
338 memory_region_add_subregion(&m
->macio
, VIA_BASE
- IO_BASE
+ VIA_SIZE
,
339 sysbus_mmio_get_region(sysbus
, 1));
340 sysbus_connect_irq(sysbus
, 0,
341 qdev_get_gpio_in(DEVICE(&m
->glue
), GLUE_IRQ_IN_VIA2
));
346 error_report("q800 can only have one ethernet interface");
350 qemu_check_nic_model(&nd_table
[0], "dp83932");
353 * MacSonic driver needs an Apple MAC address
356 * 00:80:19 Dayna Communications, Inc.
359 * (Q800 use the last one)
361 nd_table
[0].macaddr
.a
[0] = 0x08;
362 nd_table
[0].macaddr
.a
[1] = 0x00;
363 nd_table
[0].macaddr
.a
[2] = 0x07;
365 object_initialize_child(OBJECT(machine
), "dp8393x", &m
->dp8393x
,
367 dev
= DEVICE(&m
->dp8393x
);
368 qdev_set_nic_properties(dev
, &nd_table
[0]);
369 qdev_prop_set_uint8(dev
, "it_shift", 2);
370 qdev_prop_set_bit(dev
, "big_endian", true);
371 object_property_set_link(OBJECT(dev
), "dma_mr",
372 OBJECT(get_system_memory()), &error_abort
);
373 sysbus
= SYS_BUS_DEVICE(dev
);
374 sysbus_realize(sysbus
, &error_fatal
);
375 memory_region_add_subregion(&m
->macio
, SONIC_BASE
- IO_BASE
,
376 sysbus_mmio_get_region(sysbus
, 0));
377 sysbus_connect_irq(sysbus
, 0,
378 qdev_get_gpio_in(DEVICE(&m
->glue
), GLUE_IRQ_IN_SONIC
));
380 memory_region_init_rom(dp8393x_prom
, NULL
, "dp8393x-q800.prom",
381 SONIC_PROM_SIZE
, &error_fatal
);
382 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE
,
385 /* Add MAC address with valid checksum to PROM */
386 prom
= memory_region_get_ram_ptr(dp8393x_prom
);
388 for (i
= 0; i
< 6; i
++) {
389 prom
[i
] = revbit8(nd_table
[0].macaddr
.a
[i
]);
392 prom
[7] = 0xff - checksum
;
396 object_initialize_child(OBJECT(machine
), "escc", &m
->escc
,
398 dev
= DEVICE(&m
->escc
);
399 qdev_prop_set_uint32(dev
, "disabled", 0);
400 qdev_prop_set_uint32(dev
, "frequency", MAC_CLOCK
);
401 qdev_prop_set_uint32(dev
, "it_shift", 1);
402 qdev_prop_set_bit(dev
, "bit_swap", true);
403 qdev_prop_set_chr(dev
, "chrA", serial_hd(0));
404 qdev_prop_set_chr(dev
, "chrB", serial_hd(1));
405 qdev_prop_set_uint32(dev
, "chnBtype", 0);
406 qdev_prop_set_uint32(dev
, "chnAtype", 0);
407 sysbus
= SYS_BUS_DEVICE(dev
);
408 sysbus_realize(sysbus
, &error_fatal
);
410 /* Logically OR both its IRQs together */
411 object_initialize_child(OBJECT(machine
), "escc_orgate", &m
->escc_orgate
,
413 object_property_set_int(OBJECT(&m
->escc_orgate
), "num-lines", 2,
415 dev
= DEVICE(&m
->escc_orgate
);
416 qdev_realize(dev
, NULL
, &error_fatal
);
417 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in(dev
, 0));
418 sysbus_connect_irq(sysbus
, 1, qdev_get_gpio_in(dev
, 1));
419 qdev_connect_gpio_out(dev
, 0,
420 qdev_get_gpio_in(DEVICE(&m
->glue
),
422 memory_region_add_subregion(&m
->macio
, SCC_BASE
- IO_BASE
,
423 sysbus_mmio_get_region(sysbus
, 0));
427 object_initialize_child(OBJECT(machine
), "esp", &m
->esp
,
429 sysbus_esp
= SYSBUS_ESP(&m
->esp
);
430 esp
= &sysbus_esp
->esp
;
431 esp
->dma_memory_read
= NULL
;
432 esp
->dma_memory_write
= NULL
;
433 esp
->dma_opaque
= NULL
;
434 sysbus_esp
->it_shift
= 4;
435 esp
->dma_enabled
= 1;
437 sysbus
= SYS_BUS_DEVICE(&m
->esp
);
438 sysbus_realize(sysbus
, &error_fatal
);
439 /* SCSI and SCSI data IRQs are negative edge triggered */
440 sysbus_connect_irq(sysbus
, 0,
442 qdev_get_gpio_in(DEVICE(&m
->via2
),
443 VIA2_IRQ_SCSI_BIT
)));
444 sysbus_connect_irq(sysbus
, 1,
446 qdev_get_gpio_in(DEVICE(&m
->via2
),
447 VIA2_IRQ_SCSI_DATA_BIT
)));
448 memory_region_add_subregion(&m
->macio
, ESP_BASE
- IO_BASE
,
449 sysbus_mmio_get_region(sysbus
, 0));
450 memory_region_add_subregion(&m
->macio
, ESP_PDMA
- IO_BASE
,
451 sysbus_mmio_get_region(sysbus
, 1));
453 scsi_bus_legacy_handle_cmdline(&esp
->bus
);
455 /* SWIM floppy controller */
457 object_initialize_child(OBJECT(machine
), "swim", &m
->swim
,
459 sysbus
= SYS_BUS_DEVICE(&m
->swim
);
460 sysbus_realize(sysbus
, &error_fatal
);
461 memory_region_add_subregion(&m
->macio
, SWIM_BASE
- IO_BASE
,
462 sysbus_mmio_get_region(sysbus
, 0));
466 object_initialize_child(OBJECT(machine
), "mac-nubus-bridge",
467 &m
->mac_nubus_bridge
,
468 TYPE_MAC_NUBUS_BRIDGE
);
469 sysbus
= SYS_BUS_DEVICE(&m
->mac_nubus_bridge
);
470 dev
= DEVICE(&m
->mac_nubus_bridge
);
471 qdev_prop_set_uint32(DEVICE(&m
->mac_nubus_bridge
), "slot-available-mask",
472 Q800_NUBUS_SLOTS_AVAILABLE
);
473 sysbus_realize(sysbus
, &error_fatal
);
474 memory_region_add_subregion(get_system_memory(),
475 MAC_NUBUS_FIRST_SLOT
* NUBUS_SUPER_SLOT_SIZE
,
476 sysbus_mmio_get_region(sysbus
, 0));
477 memory_region_add_subregion(get_system_memory(),
479 MAC_NUBUS_FIRST_SLOT
* NUBUS_SLOT_SIZE
,
480 sysbus_mmio_get_region(sysbus
, 1));
481 qdev_connect_gpio_out(dev
, 9,
482 qdev_get_gpio_in_named(DEVICE(&m
->via2
), "nubus-irq",
483 VIA2_NUBUS_IRQ_INTVIDEO
));
484 for (i
= 1; i
< VIA2_NUBUS_IRQ_NB
; i
++) {
485 qdev_connect_gpio_out(dev
, 9 + i
,
486 qdev_get_gpio_in_named(DEVICE(&m
->via2
),
488 VIA2_NUBUS_IRQ_9
+ i
));
492 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
493 * IRQ via GLUE for use by SONIC Ethernet in classic mode
495 qdev_connect_gpio_out(DEVICE(&m
->glue
), GLUE_IRQ_NUBUS_9
,
496 qdev_get_gpio_in_named(DEVICE(&m
->via2
), "nubus-irq",
499 nubus
= NUBUS_BUS(qdev_get_child_bus(dev
, "nubus-bus.0"));
501 /* framebuffer in nubus slot #9 */
503 object_initialize_child(OBJECT(machine
), "macfb", &m
->macfb
,
505 dev
= DEVICE(&m
->macfb
);
506 qdev_prop_set_uint32(dev
, "slot", 9);
507 qdev_prop_set_uint32(dev
, "width", graphic_width
);
508 qdev_prop_set_uint32(dev
, "height", graphic_height
);
509 qdev_prop_set_uint8(dev
, "depth", graphic_depth
);
510 if (graphic_width
== 1152 && graphic_height
== 870) {
511 qdev_prop_set_uint8(dev
, "display", MACFB_DISPLAY_APPLE_21_COLOR
);
513 qdev_prop_set_uint8(dev
, "display", MACFB_DISPLAY_VGA
);
515 qdev_realize(dev
, BUS(nubus
), &error_fatal
);
517 macfb_mode
= (NUBUS_MACFB(dev
)->macfb
).mode
;
522 void *param_blob
, *param_ptr
, *param_rng_seed
;
524 if (kernel_cmdline
) {
525 param_blob
= g_malloc(strlen(kernel_cmdline
) + 1024);
527 param_blob
= g_malloc(1024);
530 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
, NULL
,
531 &elf_entry
, NULL
, &high
, NULL
, 1,
533 if (kernel_size
< 0) {
534 error_report("could not load kernel '%s'", kernel_filename
);
537 stl_phys(cs
->as
, 4, elf_entry
); /* reset initial PC */
538 parameters_base
= (high
+ 1) & ~1;
539 param_ptr
= param_blob
;
541 BOOTINFO1(param_ptr
, BI_MACHTYPE
, MACH_MAC
);
542 BOOTINFO1(param_ptr
, BI_FPUTYPE
, FPU_68040
);
543 BOOTINFO1(param_ptr
, BI_MMUTYPE
, MMU_68040
);
544 BOOTINFO1(param_ptr
, BI_CPUTYPE
, CPU_68040
);
545 BOOTINFO1(param_ptr
, BI_MAC_CPUID
, CPUB_68040
);
546 BOOTINFO1(param_ptr
, BI_MAC_MODEL
, MAC_MODEL_Q800
);
548 BI_MAC_MEMSIZE
, ram_size
>> 20); /* in MB */
549 BOOTINFO2(param_ptr
, BI_MEMCHUNK
, 0, ram_size
);
550 BOOTINFO1(param_ptr
, BI_MAC_VADDR
,
551 VIDEO_BASE
+ macfb_mode
->offset
);
552 BOOTINFO1(param_ptr
, BI_MAC_VDEPTH
, graphic_depth
);
553 BOOTINFO1(param_ptr
, BI_MAC_VDIM
,
554 (graphic_height
<< 16) | graphic_width
);
555 BOOTINFO1(param_ptr
, BI_MAC_VROW
, macfb_mode
->stride
);
556 BOOTINFO1(param_ptr
, BI_MAC_SCCBASE
, SCC_BASE
);
558 memory_region_init_ram_ptr(&m
->rom
, NULL
, "m68k_fake_mac.rom",
559 sizeof(fake_mac_rom
), fake_mac_rom
);
560 memory_region_set_readonly(&m
->rom
, true);
561 memory_region_add_subregion(get_system_memory(), MACROM_ADDR
, &m
->rom
);
563 if (kernel_cmdline
) {
564 BOOTINFOSTR(param_ptr
, BI_COMMAND_LINE
,
568 /* Pass seed to RNG. */
569 param_rng_seed
= param_ptr
;
570 qemu_guest_getrandom_nofail(rng_seed
, sizeof(rng_seed
));
571 BOOTINFODATA(param_ptr
, BI_RNG_SEED
,
572 rng_seed
, sizeof(rng_seed
));
575 if (initrd_filename
) {
576 initrd_size
= get_image_size(initrd_filename
);
577 if (initrd_size
< 0) {
578 error_report("could not load initial ram disk '%s'",
583 initrd_base
= (ram_size
- initrd_size
) & TARGET_PAGE_MASK
;
584 load_image_targphys(initrd_filename
, initrd_base
,
585 ram_size
- initrd_base
);
586 BOOTINFO2(param_ptr
, BI_RAMDISK
, initrd_base
,
592 BOOTINFO0(param_ptr
, BI_LAST
);
593 rom_add_blob_fixed_as("bootinfo", param_blob
, param_ptr
- param_blob
,
594 parameters_base
, cs
->as
);
595 qemu_register_reset_nosnapshotload(rerandomize_rng_seed
,
596 rom_ptr_for_as(cs
->as
, parameters_base
,
597 param_ptr
- param_blob
) +
598 (param_rng_seed
- param_blob
));
602 /* allocate and load BIOS */
603 memory_region_init_rom(&m
->rom
, NULL
, "m68k_mac.rom", MACROM_SIZE
,
605 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
606 memory_region_add_subregion(get_system_memory(), MACROM_ADDR
, &m
->rom
);
608 /* Load MacROM binary */
610 bios_size
= load_image_targphys(filename
, MACROM_ADDR
, MACROM_SIZE
);
616 /* Remove qtest_enabled() check once firmware files are in the tree */
617 if (!qtest_enabled()) {
618 if (bios_size
<= 0 || bios_size
> MACROM_SIZE
) {
619 error_report("could not load MacROM '%s'", bios_name
);
623 ptr
= rom_ptr(MACROM_ADDR
, bios_size
);
625 stl_phys(cs
->as
, 0, ldl_p(ptr
)); /* reset initial SP */
627 MACROM_ADDR
+ ldl_p(ptr
+ 4)); /* reset initial PC */
632 static GlobalProperty hw_compat_q800
[] = {
633 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" },
634 { "scsi-hd", "vendor", " SEAGATE" },
635 { "scsi-hd", "product", " ST225N" },
636 { "scsi-hd", "ver", "1.0 " },
637 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" },
638 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" },
639 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" },
640 { "scsi-cd", "quirk_mode_page_truncated", "on" },
641 { "scsi-cd", "vendor", "MATSHITA" },
642 { "scsi-cd", "product", "CD-ROM CR-8005" },
643 { "scsi-cd", "ver", "1.0k" },
645 static const size_t hw_compat_q800_len
= G_N_ELEMENTS(hw_compat_q800
);
647 static const char *q800_machine_valid_cpu_types
[] = {
648 M68K_CPU_TYPE_NAME("m68040"),
652 static void q800_machine_class_init(ObjectClass
*oc
, void *data
)
654 MachineClass
*mc
= MACHINE_CLASS(oc
);
656 mc
->desc
= "Macintosh Quadra 800";
657 mc
->init
= q800_machine_init
;
658 mc
->default_cpu_type
= M68K_CPU_TYPE_NAME("m68040");
659 mc
->valid_cpu_types
= q800_machine_valid_cpu_types
;
661 mc
->block_default_type
= IF_SCSI
;
662 mc
->default_ram_id
= "m68k_mac.ram";
663 compat_props_add(mc
->compat_props
, hw_compat_q800
, hw_compat_q800_len
);
666 static const TypeInfo q800_machine_typeinfo
= {
667 .name
= MACHINE_TYPE_NAME("q800"),
668 .parent
= TYPE_MACHINE
,
669 .instance_size
= sizeof(Q800MachineState
),
670 .class_init
= q800_machine_class_init
,
673 static void q800_machine_register_types(void)
675 type_register_static(&q800_machine_typeinfo
);
678 type_init(q800_machine_register_types
)