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1 /*
2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu-common.h"
26 #include "qemu/datadir.h"
27 #include "sysemu/sysemu.h"
28 #include "cpu.h"
29 #include "hw/hw.h"
30 #include "hw/boards.h"
31 #include "hw/irq.h"
32 #include "elf.h"
33 #include "hw/loader.h"
34 #include "ui/console.h"
35 #include "exec/address-spaces.h"
36 #include "hw/char/escc.h"
37 #include "hw/sysbus.h"
38 #include "hw/scsi/esp.h"
39 #include "bootinfo.h"
40 #include "hw/misc/mac_via.h"
41 #include "hw/input/adb.h"
42 #include "hw/nubus/mac-nubus-bridge.h"
43 #include "hw/display/macfb.h"
44 #include "hw/block/swim.h"
45 #include "net/net.h"
46 #include "qapi/error.h"
47 #include "sysemu/qtest.h"
48 #include "sysemu/runstate.h"
49 #include "sysemu/reset.h"
50
51 #define MACROM_ADDR 0x40800000
52 #define MACROM_SIZE 0x00100000
53
54 #define MACROM_FILENAME "MacROM.bin"
55
56 #define Q800_MACHINE_ID 35
57 #define Q800_CPU_ID (1 << 2)
58 #define Q800_FPU_ID (1 << 2)
59 #define Q800_MMU_ID (1 << 2)
60
61 #define MACH_MAC 3
62 #define Q800_MAC_CPU_ID 2
63
64 #define IO_BASE 0x50000000
65 #define IO_SLICE 0x00040000
66 #define IO_SIZE 0x04000000
67
68 #define VIA_BASE (IO_BASE + 0x00000)
69 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
70 #define SONIC_BASE (IO_BASE + 0x0a000)
71 #define SCC_BASE (IO_BASE + 0x0c020)
72 #define ESP_BASE (IO_BASE + 0x10000)
73 #define ESP_PDMA (IO_BASE + 0x10100)
74 #define ASC_BASE (IO_BASE + 0x14000)
75 #define SWIM_BASE (IO_BASE + 0x1E000)
76
77 #define NUBUS_SUPER_SLOT_BASE 0x60000000
78 #define NUBUS_SLOT_BASE 0xf0000000
79
80 /*
81 * the video base, whereas it a Nubus address,
82 * is needed by the kernel to have early display and
83 * thus provided by the bootloader
84 */
85 #define VIDEO_BASE 0xf9001000
86
87 #define MAC_CLOCK 3686418
88
89 /*
90 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
91 * that performs a variety of functions (RAM management, clock generation, ...).
92 * The GLUE chip receives interrupt requests from various devices,
93 * assign priority to each, and asserts one or more interrupt line to the
94 * CPU.
95 */
96
97 typedef struct {
98 M68kCPU *cpu;
99 uint8_t ipr;
100 } GLUEState;
101
102 static void GLUE_set_irq(void *opaque, int irq, int level)
103 {
104 GLUEState *s = opaque;
105 int i;
106
107 if (level) {
108 s->ipr |= 1 << irq;
109 } else {
110 s->ipr &= ~(1 << irq);
111 }
112
113 for (i = 7; i >= 0; i--) {
114 if ((s->ipr >> i) & 1) {
115 m68k_set_irq_level(s->cpu, i + 1, i + 25);
116 return;
117 }
118 }
119 m68k_set_irq_level(s->cpu, 0, 0);
120 }
121
122 static void main_cpu_reset(void *opaque)
123 {
124 M68kCPU *cpu = opaque;
125 CPUState *cs = CPU(cpu);
126
127 cpu_reset(cs);
128 cpu->env.aregs[7] = ldl_phys(cs->as, 0);
129 cpu->env.pc = ldl_phys(cs->as, 4);
130 }
131
132 static uint8_t fake_mac_rom[] = {
133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
134
135 /* offset: 0xa - mac_reset */
136
137 /* via2[vDirB] |= VIA2B_vPower */
138 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
139 0x10, 0x10, /* moveb %a0@,%d0 */
140 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
141 0x10, 0x80, /* moveb %d0,%a0@ */
142
143 /* via2[vBufB] &= ~VIA2B_vPower */
144 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
145 0x10, 0x10, /* moveb %a0@,%d0 */
146 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
147 0x10, 0x80, /* moveb %d0,%a0@ */
148
149 /* while (true) ; */
150 0x60, 0xFE /* bras [self] */
151 };
152
153 static void q800_init(MachineState *machine)
154 {
155 M68kCPU *cpu = NULL;
156 int linux_boot;
157 int32_t kernel_size;
158 uint64_t elf_entry;
159 char *filename;
160 int bios_size;
161 ram_addr_t initrd_base;
162 int32_t initrd_size;
163 MemoryRegion *rom;
164 MemoryRegion *io;
165 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1;
166 int i;
167 ram_addr_t ram_size = machine->ram_size;
168 const char *kernel_filename = machine->kernel_filename;
169 const char *initrd_filename = machine->initrd_filename;
170 const char *kernel_cmdline = machine->kernel_cmdline;
171 const char *bios_name = machine->firmware ?: MACROM_FILENAME;
172 hwaddr parameters_base;
173 CPUState *cs;
174 DeviceState *dev;
175 DeviceState *via_dev;
176 SysBusESPState *sysbus_esp;
177 ESPState *esp;
178 SysBusDevice *sysbus;
179 BusState *adb_bus;
180 NubusBus *nubus;
181 GLUEState *irq;
182 qemu_irq *pic;
183 DriveInfo *dinfo;
184
185 linux_boot = (kernel_filename != NULL);
186
187 if (ram_size > 1 * GiB) {
188 error_report("Too much memory for this machine: %" PRId64 " MiB, "
189 "maximum 1024 MiB", ram_size / MiB);
190 exit(1);
191 }
192
193 /* init CPUs */
194 cpu = M68K_CPU(cpu_create(machine->cpu_type));
195 qemu_register_reset(main_cpu_reset, cpu);
196
197 /* RAM */
198 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
199
200 /*
201 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
202 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
203 */
204 io = g_new(MemoryRegion, io_slice_nb);
205 for (i = 0; i < io_slice_nb; i++) {
206 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1);
207
208 memory_region_init_alias(&io[i], NULL, name, get_system_memory(),
209 IO_BASE, IO_SLICE);
210 memory_region_add_subregion(get_system_memory(),
211 IO_BASE + (i + 1) * IO_SLICE, &io[i]);
212 g_free(name);
213 }
214
215 /* IRQ Glue */
216
217 irq = g_new0(GLUEState, 1);
218 irq->cpu = cpu;
219 pic = qemu_allocate_irqs(GLUE_set_irq, irq, 8);
220
221 /* VIA */
222
223 via_dev = qdev_new(TYPE_MAC_VIA);
224 dinfo = drive_get(IF_MTD, 0, 0);
225 if (dinfo) {
226 qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo));
227 }
228 sysbus = SYS_BUS_DEVICE(via_dev);
229 sysbus_realize_and_unref(sysbus, &error_fatal);
230 sysbus_mmio_map(sysbus, 0, VIA_BASE);
231 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]);
232 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]);
233
234
235 adb_bus = qdev_get_child_bus(via_dev, "adb.0");
236 dev = qdev_new(TYPE_ADB_KEYBOARD);
237 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
238 dev = qdev_new(TYPE_ADB_MOUSE);
239 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
240
241 /* MACSONIC */
242
243 if (nb_nics > 1) {
244 error_report("q800 can only have one ethernet interface");
245 exit(1);
246 }
247
248 qemu_check_nic_model(&nd_table[0], "dp83932");
249
250 /*
251 * MacSonic driver needs an Apple MAC address
252 * Valid prefix are:
253 * 00:05:02 Apple
254 * 00:80:19 Dayna Communications, Inc.
255 * 00:A0:40 Apple
256 * 08:00:07 Apple
257 * (Q800 use the last one)
258 */
259 nd_table[0].macaddr.a[0] = 0x08;
260 nd_table[0].macaddr.a[1] = 0x00;
261 nd_table[0].macaddr.a[2] = 0x07;
262
263 dev = qdev_new("dp8393x");
264 qdev_set_nic_properties(dev, &nd_table[0]);
265 qdev_prop_set_uint8(dev, "it_shift", 2);
266 qdev_prop_set_bit(dev, "big_endian", true);
267 object_property_set_link(OBJECT(dev), "dma_mr",
268 OBJECT(get_system_memory()), &error_abort);
269 sysbus = SYS_BUS_DEVICE(dev);
270 sysbus_realize_and_unref(sysbus, &error_fatal);
271 sysbus_mmio_map(sysbus, 0, SONIC_BASE);
272 sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE);
273 sysbus_connect_irq(sysbus, 0, pic[2]);
274
275 /* SCC */
276
277 dev = qdev_new(TYPE_ESCC);
278 qdev_prop_set_uint32(dev, "disabled", 0);
279 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
280 qdev_prop_set_uint32(dev, "it_shift", 1);
281 qdev_prop_set_bit(dev, "bit_swap", true);
282 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
283 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
284 qdev_prop_set_uint32(dev, "chnBtype", 0);
285 qdev_prop_set_uint32(dev, "chnAtype", 0);
286 sysbus = SYS_BUS_DEVICE(dev);
287 sysbus_realize_and_unref(sysbus, &error_fatal);
288 sysbus_connect_irq(sysbus, 0, pic[3]);
289 sysbus_connect_irq(sysbus, 1, pic[3]);
290 sysbus_mmio_map(sysbus, 0, SCC_BASE);
291
292 /* SCSI */
293
294 dev = qdev_new(TYPE_ESP);
295 sysbus_esp = ESP(dev);
296 esp = &sysbus_esp->esp;
297 esp->dma_memory_read = NULL;
298 esp->dma_memory_write = NULL;
299 esp->dma_opaque = NULL;
300 sysbus_esp->it_shift = 4;
301 esp->dma_enabled = 1;
302
303 sysbus = SYS_BUS_DEVICE(dev);
304 sysbus_realize_and_unref(sysbus, &error_fatal);
305 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev,
306 "via2-irq",
307 VIA2_IRQ_SCSI_BIT));
308 sysbus_connect_irq(sysbus, 1,
309 qdev_get_gpio_in_named(via_dev, "via2-irq",
310 VIA2_IRQ_SCSI_DATA_BIT));
311 sysbus_mmio_map(sysbus, 0, ESP_BASE);
312 sysbus_mmio_map(sysbus, 1, ESP_PDMA);
313
314 scsi_bus_legacy_handle_cmdline(&esp->bus);
315
316 /* SWIM floppy controller */
317
318 dev = qdev_new(TYPE_SWIM);
319 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
320 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE);
321
322 /* NuBus */
323
324 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE);
325 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
326 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE);
327 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE);
328
329 nubus = MAC_NUBUS_BRIDGE(dev)->bus;
330
331 /* framebuffer in nubus slot #9 */
332
333 dev = qdev_new(TYPE_NUBUS_MACFB);
334 qdev_prop_set_uint32(dev, "width", graphic_width);
335 qdev_prop_set_uint32(dev, "height", graphic_height);
336 qdev_prop_set_uint8(dev, "depth", graphic_depth);
337 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal);
338
339 cs = CPU(cpu);
340 if (linux_boot) {
341 uint64_t high;
342 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
343 &elf_entry, NULL, &high, NULL, 1,
344 EM_68K, 0, 0);
345 if (kernel_size < 0) {
346 error_report("could not load kernel '%s'", kernel_filename);
347 exit(1);
348 }
349 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
350 parameters_base = (high + 1) & ~1;
351
352 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC);
353 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, Q800_FPU_ID);
354 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, Q800_MMU_ID);
355 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, Q800_CPU_ID);
356 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, Q800_MAC_CPU_ID);
357 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, Q800_MACHINE_ID);
358 BOOTINFO1(cs->as, parameters_base,
359 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
360 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
361 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE);
362 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth);
363 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM,
364 (graphic_height << 16) | graphic_width);
365 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW,
366 (graphic_width * graphic_depth + 7) / 8);
367 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE);
368
369 rom = g_malloc(sizeof(*rom));
370 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom",
371 sizeof(fake_mac_rom), fake_mac_rom);
372 memory_region_set_readonly(rom, true);
373 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
374
375 if (kernel_cmdline) {
376 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
377 kernel_cmdline);
378 }
379
380 /* load initrd */
381 if (initrd_filename) {
382 initrd_size = get_image_size(initrd_filename);
383 if (initrd_size < 0) {
384 error_report("could not load initial ram disk '%s'",
385 initrd_filename);
386 exit(1);
387 }
388
389 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
390 load_image_targphys(initrd_filename, initrd_base,
391 ram_size - initrd_base);
392 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
393 initrd_size);
394 } else {
395 initrd_base = 0;
396 initrd_size = 0;
397 }
398 BOOTINFO0(cs->as, parameters_base, BI_LAST);
399 } else {
400 uint8_t *ptr;
401 /* allocate and load BIOS */
402 rom = g_malloc(sizeof(*rom));
403 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE,
404 &error_abort);
405 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
406 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
407
408 /* Load MacROM binary */
409 if (filename) {
410 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
411 g_free(filename);
412 } else {
413 bios_size = -1;
414 }
415
416 /* Remove qtest_enabled() check once firmware files are in the tree */
417 if (!qtest_enabled()) {
418 if (bios_size < 0 || bios_size > MACROM_SIZE) {
419 error_report("could not load MacROM '%s'", bios_name);
420 exit(1);
421 }
422
423 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE);
424 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
425 stl_phys(cs->as, 4,
426 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
427 }
428 }
429 }
430
431 static void q800_machine_class_init(ObjectClass *oc, void *data)
432 {
433 MachineClass *mc = MACHINE_CLASS(oc);
434 mc->desc = "Macintosh Quadra 800";
435 mc->init = q800_init;
436 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
437 mc->max_cpus = 1;
438 mc->block_default_type = IF_SCSI;
439 mc->default_ram_id = "m68k_mac.ram";
440 }
441
442 static const TypeInfo q800_machine_typeinfo = {
443 .name = MACHINE_TYPE_NAME("q800"),
444 .parent = TYPE_MACHINE,
445 .class_init = q800_machine_class_init,
446 };
447
448 static void q800_machine_register_types(void)
449 {
450 type_register_static(&q800_machine_typeinfo);
451 }
452
453 type_init(q800_machine_register_types)