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1 /*
2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu-common.h"
26 #include "qemu/datadir.h"
27 #include "sysemu/sysemu.h"
28 #include "cpu.h"
29 #include "hw/boards.h"
30 #include "hw/or-irq.h"
31 #include "elf.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "hw/char/escc.h"
35 #include "hw/sysbus.h"
36 #include "hw/scsi/esp.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
39 #include "bootinfo.h"
40 #include "hw/misc/mac_via.h"
41 #include "hw/input/adb.h"
42 #include "hw/nubus/mac-nubus-bridge.h"
43 #include "hw/display/macfb.h"
44 #include "hw/block/swim.h"
45 #include "net/net.h"
46 #include "qapi/error.h"
47 #include "sysemu/qtest.h"
48 #include "sysemu/runstate.h"
49 #include "sysemu/reset.h"
50 #include "migration/vmstate.h"
51
52 #define MACROM_ADDR 0x40800000
53 #define MACROM_SIZE 0x00100000
54
55 #define MACROM_FILENAME "MacROM.bin"
56
57 #define IO_BASE 0x50000000
58 #define IO_SLICE 0x00040000
59 #define IO_SIZE 0x04000000
60
61 #define VIA_BASE (IO_BASE + 0x00000)
62 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
63 #define SONIC_BASE (IO_BASE + 0x0a000)
64 #define SCC_BASE (IO_BASE + 0x0c020)
65 #define ESP_BASE (IO_BASE + 0x10000)
66 #define ESP_PDMA (IO_BASE + 0x10100)
67 #define ASC_BASE (IO_BASE + 0x14000)
68 #define SWIM_BASE (IO_BASE + 0x1E000)
69
70 #define SONIC_PROM_SIZE 0x1000
71
72 /*
73 * the video base, whereas it a Nubus address,
74 * is needed by the kernel to have early display and
75 * thus provided by the bootloader
76 */
77 #define VIDEO_BASE 0xf9001000
78
79 #define MAC_CLOCK 3686418
80
81 /*
82 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
83 * that performs a variety of functions (RAM management, clock generation, ...).
84 * The GLUE chip receives interrupt requests from various devices,
85 * assign priority to each, and asserts one or more interrupt line to the
86 * CPU.
87 */
88
89 #define TYPE_GLUE "q800-glue"
90 OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE)
91
92 struct GLUEState {
93 SysBusDevice parent_obj;
94 M68kCPU *cpu;
95 uint8_t ipr;
96 };
97
98 static void GLUE_set_irq(void *opaque, int irq, int level)
99 {
100 GLUEState *s = opaque;
101 int i;
102
103 if (level) {
104 s->ipr |= 1 << irq;
105 } else {
106 s->ipr &= ~(1 << irq);
107 }
108
109 for (i = 7; i >= 0; i--) {
110 if ((s->ipr >> i) & 1) {
111 m68k_set_irq_level(s->cpu, i + 1, i + 25);
112 return;
113 }
114 }
115 m68k_set_irq_level(s->cpu, 0, 0);
116 }
117
118 static void glue_reset(DeviceState *dev)
119 {
120 GLUEState *s = GLUE(dev);
121
122 s->ipr = 0;
123 }
124
125 static const VMStateDescription vmstate_glue = {
126 .name = "q800-glue",
127 .version_id = 0,
128 .minimum_version_id = 0,
129 .fields = (VMStateField[]) {
130 VMSTATE_UINT8(ipr, GLUEState),
131 VMSTATE_END_OF_LIST(),
132 },
133 };
134
135 /*
136 * If the m68k CPU implemented its inbound irq lines as GPIO lines
137 * rather than via the m68k_set_irq_level() function we would not need
138 * this cpu link property and could instead provide outbound IRQ lines
139 * that the board could wire up to the CPU.
140 */
141 static Property glue_properties[] = {
142 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *),
143 DEFINE_PROP_END_OF_LIST(),
144 };
145
146 static void glue_init(Object *obj)
147 {
148 DeviceState *dev = DEVICE(obj);
149
150 qdev_init_gpio_in(dev, GLUE_set_irq, 8);
151 }
152
153 static void glue_class_init(ObjectClass *klass, void *data)
154 {
155 DeviceClass *dc = DEVICE_CLASS(klass);
156
157 dc->vmsd = &vmstate_glue;
158 dc->reset = glue_reset;
159 device_class_set_props(dc, glue_properties);
160 }
161
162 static const TypeInfo glue_info = {
163 .name = TYPE_GLUE,
164 .parent = TYPE_SYS_BUS_DEVICE,
165 .instance_size = sizeof(GLUEState),
166 .instance_init = glue_init,
167 .class_init = glue_class_init,
168 };
169
170 static void main_cpu_reset(void *opaque)
171 {
172 M68kCPU *cpu = opaque;
173 CPUState *cs = CPU(cpu);
174
175 cpu_reset(cs);
176 cpu->env.aregs[7] = ldl_phys(cs->as, 0);
177 cpu->env.pc = ldl_phys(cs->as, 4);
178 }
179
180 static uint8_t fake_mac_rom[] = {
181 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
182
183 /* offset: 0xa - mac_reset */
184
185 /* via2[vDirB] |= VIA2B_vPower */
186 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
187 0x10, 0x10, /* moveb %a0@,%d0 */
188 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
189 0x10, 0x80, /* moveb %d0,%a0@ */
190
191 /* via2[vBufB] &= ~VIA2B_vPower */
192 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
193 0x10, 0x10, /* moveb %a0@,%d0 */
194 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
195 0x10, 0x80, /* moveb %d0,%a0@ */
196
197 /* while (true) ; */
198 0x60, 0xFE /* bras [self] */
199 };
200
201 static void q800_init(MachineState *machine)
202 {
203 M68kCPU *cpu = NULL;
204 int linux_boot;
205 int32_t kernel_size;
206 uint64_t elf_entry;
207 char *filename;
208 int bios_size;
209 ram_addr_t initrd_base;
210 int32_t initrd_size;
211 MemoryRegion *rom;
212 MemoryRegion *io;
213 MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1);
214 uint8_t *prom;
215 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1;
216 int i, checksum;
217 ram_addr_t ram_size = machine->ram_size;
218 const char *kernel_filename = machine->kernel_filename;
219 const char *initrd_filename = machine->initrd_filename;
220 const char *kernel_cmdline = machine->kernel_cmdline;
221 const char *bios_name = machine->firmware ?: MACROM_FILENAME;
222 hwaddr parameters_base;
223 CPUState *cs;
224 DeviceState *dev;
225 DeviceState *via1_dev, *via2_dev;
226 DeviceState *escc_orgate;
227 SysBusESPState *sysbus_esp;
228 ESPState *esp;
229 SysBusDevice *sysbus;
230 BusState *adb_bus;
231 NubusBus *nubus;
232 DeviceState *glue;
233 DriveInfo *dinfo;
234
235 linux_boot = (kernel_filename != NULL);
236
237 if (ram_size > 1 * GiB) {
238 error_report("Too much memory for this machine: %" PRId64 " MiB, "
239 "maximum 1024 MiB", ram_size / MiB);
240 exit(1);
241 }
242
243 /* init CPUs */
244 cpu = M68K_CPU(cpu_create(machine->cpu_type));
245 qemu_register_reset(main_cpu_reset, cpu);
246
247 /* RAM */
248 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
249
250 /*
251 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
252 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
253 */
254 io = g_new(MemoryRegion, io_slice_nb);
255 for (i = 0; i < io_slice_nb; i++) {
256 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1);
257
258 memory_region_init_alias(&io[i], NULL, name, get_system_memory(),
259 IO_BASE, IO_SLICE);
260 memory_region_add_subregion(get_system_memory(),
261 IO_BASE + (i + 1) * IO_SLICE, &io[i]);
262 g_free(name);
263 }
264
265 /* IRQ Glue */
266 glue = qdev_new(TYPE_GLUE);
267 object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort);
268 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal);
269
270 /* VIA 1 */
271 via1_dev = qdev_new(TYPE_MOS6522_Q800_VIA1);
272 dinfo = drive_get(IF_MTD, 0, 0);
273 if (dinfo) {
274 qdev_prop_set_drive(via1_dev, "drive", blk_by_legacy_dinfo(dinfo));
275 }
276 sysbus = SYS_BUS_DEVICE(via1_dev);
277 sysbus_realize_and_unref(sysbus, &error_fatal);
278 sysbus_mmio_map(sysbus, 1, VIA_BASE);
279 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 0));
280
281 adb_bus = qdev_get_child_bus(via1_dev, "adb.0");
282 dev = qdev_new(TYPE_ADB_KEYBOARD);
283 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
284 dev = qdev_new(TYPE_ADB_MOUSE);
285 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
286
287 /* VIA 2 */
288 via2_dev = qdev_new(TYPE_MOS6522_Q800_VIA2);
289 sysbus = SYS_BUS_DEVICE(via2_dev);
290 sysbus_realize_and_unref(sysbus, &error_fatal);
291 sysbus_mmio_map(sysbus, 1, VIA_BASE + VIA_SIZE);
292 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 1));
293
294 /* MACSONIC */
295
296 if (nb_nics > 1) {
297 error_report("q800 can only have one ethernet interface");
298 exit(1);
299 }
300
301 qemu_check_nic_model(&nd_table[0], "dp83932");
302
303 /*
304 * MacSonic driver needs an Apple MAC address
305 * Valid prefix are:
306 * 00:05:02 Apple
307 * 00:80:19 Dayna Communications, Inc.
308 * 00:A0:40 Apple
309 * 08:00:07 Apple
310 * (Q800 use the last one)
311 */
312 nd_table[0].macaddr.a[0] = 0x08;
313 nd_table[0].macaddr.a[1] = 0x00;
314 nd_table[0].macaddr.a[2] = 0x07;
315
316 dev = qdev_new("dp8393x");
317 qdev_set_nic_properties(dev, &nd_table[0]);
318 qdev_prop_set_uint8(dev, "it_shift", 2);
319 qdev_prop_set_bit(dev, "big_endian", true);
320 object_property_set_link(OBJECT(dev), "dma_mr",
321 OBJECT(get_system_memory()), &error_abort);
322 sysbus = SYS_BUS_DEVICE(dev);
323 sysbus_realize_and_unref(sysbus, &error_fatal);
324 sysbus_mmio_map(sysbus, 0, SONIC_BASE);
325 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2));
326
327 memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom",
328 SONIC_PROM_SIZE, &error_fatal);
329 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE,
330 dp8393x_prom);
331
332 /* Add MAC address with valid checksum to PROM */
333 prom = memory_region_get_ram_ptr(dp8393x_prom);
334 checksum = 0;
335 for (i = 0; i < 6; i++) {
336 prom[i] = revbit8(nd_table[0].macaddr.a[i]);
337 checksum ^= prom[i];
338 }
339 prom[7] = 0xff - checksum;
340
341 /* SCC */
342
343 dev = qdev_new(TYPE_ESCC);
344 qdev_prop_set_uint32(dev, "disabled", 0);
345 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
346 qdev_prop_set_uint32(dev, "it_shift", 1);
347 qdev_prop_set_bit(dev, "bit_swap", true);
348 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
349 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
350 qdev_prop_set_uint32(dev, "chnBtype", 0);
351 qdev_prop_set_uint32(dev, "chnAtype", 0);
352 sysbus = SYS_BUS_DEVICE(dev);
353 sysbus_realize_and_unref(sysbus, &error_fatal);
354
355 /* Logically OR both its IRQs together */
356 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ));
357 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal);
358 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal);
359 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0));
360 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1));
361 qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3));
362 sysbus_mmio_map(sysbus, 0, SCC_BASE);
363
364 /* SCSI */
365
366 dev = qdev_new(TYPE_SYSBUS_ESP);
367 sysbus_esp = SYSBUS_ESP(dev);
368 esp = &sysbus_esp->esp;
369 esp->dma_memory_read = NULL;
370 esp->dma_memory_write = NULL;
371 esp->dma_opaque = NULL;
372 sysbus_esp->it_shift = 4;
373 esp->dma_enabled = 1;
374
375 sysbus = SYS_BUS_DEVICE(dev);
376 sysbus_realize_and_unref(sysbus, &error_fatal);
377 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(via2_dev,
378 VIA2_IRQ_SCSI_BIT));
379 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(via2_dev,
380 VIA2_IRQ_SCSI_DATA_BIT));
381 sysbus_mmio_map(sysbus, 0, ESP_BASE);
382 sysbus_mmio_map(sysbus, 1, ESP_PDMA);
383
384 scsi_bus_legacy_handle_cmdline(&esp->bus);
385
386 /* SWIM floppy controller */
387
388 dev = qdev_new(TYPE_SWIM);
389 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
390 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE);
391
392 /* NuBus */
393
394 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE);
395 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
396 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
397 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE);
398 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE +
399 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE);
400
401 nubus = MAC_NUBUS_BRIDGE(dev)->bus;
402
403 /* framebuffer in nubus slot #9 */
404
405 dev = qdev_new(TYPE_NUBUS_MACFB);
406 qdev_prop_set_uint32(dev, "width", graphic_width);
407 qdev_prop_set_uint32(dev, "height", graphic_height);
408 qdev_prop_set_uint8(dev, "depth", graphic_depth);
409 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal);
410
411 cs = CPU(cpu);
412 if (linux_boot) {
413 uint64_t high;
414 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
415 &elf_entry, NULL, &high, NULL, 1,
416 EM_68K, 0, 0);
417 if (kernel_size < 0) {
418 error_report("could not load kernel '%s'", kernel_filename);
419 exit(1);
420 }
421 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
422 parameters_base = (high + 1) & ~1;
423
424 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC);
425 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040);
426 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040);
427 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040);
428 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040);
429 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800);
430 BOOTINFO1(cs->as, parameters_base,
431 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
432 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
433 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE);
434 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth);
435 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM,
436 (graphic_height << 16) | graphic_width);
437 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW,
438 (graphic_width * graphic_depth + 7) / 8);
439 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE);
440
441 rom = g_malloc(sizeof(*rom));
442 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom",
443 sizeof(fake_mac_rom), fake_mac_rom);
444 memory_region_set_readonly(rom, true);
445 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
446
447 if (kernel_cmdline) {
448 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
449 kernel_cmdline);
450 }
451
452 /* load initrd */
453 if (initrd_filename) {
454 initrd_size = get_image_size(initrd_filename);
455 if (initrd_size < 0) {
456 error_report("could not load initial ram disk '%s'",
457 initrd_filename);
458 exit(1);
459 }
460
461 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
462 load_image_targphys(initrd_filename, initrd_base,
463 ram_size - initrd_base);
464 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
465 initrd_size);
466 } else {
467 initrd_base = 0;
468 initrd_size = 0;
469 }
470 BOOTINFO0(cs->as, parameters_base, BI_LAST);
471 } else {
472 uint8_t *ptr;
473 /* allocate and load BIOS */
474 rom = g_malloc(sizeof(*rom));
475 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE,
476 &error_abort);
477 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
478 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
479
480 /* Load MacROM binary */
481 if (filename) {
482 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
483 g_free(filename);
484 } else {
485 bios_size = -1;
486 }
487
488 /* Remove qtest_enabled() check once firmware files are in the tree */
489 if (!qtest_enabled()) {
490 if (bios_size < 0 || bios_size > MACROM_SIZE) {
491 error_report("could not load MacROM '%s'", bios_name);
492 exit(1);
493 }
494
495 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE);
496 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
497 stl_phys(cs->as, 4,
498 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
499 }
500 }
501 }
502
503 static void q800_machine_class_init(ObjectClass *oc, void *data)
504 {
505 MachineClass *mc = MACHINE_CLASS(oc);
506 mc->desc = "Macintosh Quadra 800";
507 mc->init = q800_init;
508 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
509 mc->max_cpus = 1;
510 mc->block_default_type = IF_SCSI;
511 mc->default_ram_id = "m68k_mac.ram";
512 }
513
514 static const TypeInfo q800_machine_typeinfo = {
515 .name = MACHINE_TYPE_NAME("q800"),
516 .parent = TYPE_MACHINE,
517 .class_init = q800_machine_class_init,
518 };
519
520 static void q800_machine_register_types(void)
521 {
522 type_register_static(&q800_machine_typeinfo);
523 type_register_static(&glue_info);
524 }
525
526 type_init(q800_machine_register_types)