2 * Generic Loongson-3 Platform support
4 * Copyright (c) 2018-2020 Huacai Chen (chenhc@lemote.com)
5 * Copyright (c) 2018-2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <https://www.gnu.org/licenses/>.
22 * Generic virtualized PC Platform based on Loongson-3 CPU (MIPS64R2 with
23 * extensions, 800~2000MHz)
26 #include "qemu/osdep.h"
27 #include "qemu-common.h"
28 #include "qemu/units.h"
29 #include "qemu/cutils.h"
30 #include "qemu/datadir.h"
31 #include "qapi/error.h"
35 #include "hw/char/serial.h"
36 #include "hw/intc/loongson_liointc.h"
37 #include "hw/mips/mips.h"
38 #include "hw/mips/cpudevs.h"
39 #include "hw/mips/fw_cfg.h"
40 #include "hw/mips/loongson3_bootp.h"
41 #include "hw/misc/unimp.h"
42 #include "hw/intc/i8259.h"
43 #include "hw/loader.h"
44 #include "hw/isa/superio.h"
45 #include "hw/pci/msi.h"
46 #include "hw/pci/pci.h"
47 #include "hw/pci/pci_host.h"
48 #include "hw/pci-host/gpex.h"
51 #include "exec/address-spaces.h"
52 #include "sysemu/kvm.h"
53 #include "sysemu/qtest.h"
54 #include "sysemu/reset.h"
55 #include "sysemu/runstate.h"
56 #include "qemu/error-report.h"
58 #define PM_CNTL_MODE 0x10
60 #define LOONGSON_MAX_VCPUS 16
63 * Loongson-3's virtual machine BIOS can be obtained here:
64 * 1, https://github.com/loongson-community/firmware-nonfree
65 * 2, http://dev.lemote.com:8000/files/firmware/UEFI/KVM/bios_loongson3.bin
67 #define LOONGSON3_BIOSNAME "bios_loongson3.bin"
71 #define PCIE_IRQ_BASE 2
73 const MemMapEntry virt_memmap
[] = {
74 [VIRT_LOWMEM
] = { 0x00000000, 0x10000000 },
75 [VIRT_PM
] = { 0x10080000, 0x100 },
76 [VIRT_FW_CFG
] = { 0x10080100, 0x100 },
77 [VIRT_RTC
] = { 0x10081000, 0x1000 },
78 [VIRT_PCIE_PIO
] = { 0x18000000, 0x80000 },
79 [VIRT_PCIE_ECAM
] = { 0x1a000000, 0x2000000 },
80 [VIRT_BIOS_ROM
] = { 0x1fc00000, 0x200000 },
81 [VIRT_UART
] = { 0x1fe001e0, 0x8 },
82 [VIRT_LIOINTC
] = { 0x3ff01400, 0x64 },
83 [VIRT_PCIE_MMIO
] = { 0x40000000, 0x40000000 },
84 [VIRT_HIGHMEM
] = { 0x80000000, 0x0 }, /* Variable */
87 static const MemMapEntry loader_memmap
[] = {
88 [LOADER_KERNEL
] = { 0x00000000, 0x4000000 },
89 [LOADER_INITRD
] = { 0x04000000, 0x0 }, /* Variable */
90 [LOADER_CMDLINE
] = { 0x0ff00000, 0x100000 },
93 static const MemMapEntry loader_rommap
[] = {
94 [LOADER_BOOTROM
] = { 0x1fc00000, 0x1000 },
95 [LOADER_PARAM
] = { 0x1fc01000, 0x10000 },
98 struct LoongsonMachineState
{
99 MachineState parent_obj
;
100 MemoryRegion
*pio_alias
;
101 MemoryRegion
*mmio_alias
;
102 MemoryRegion
*ecam_alias
;
104 typedef struct LoongsonMachineState LoongsonMachineState
;
106 #define TYPE_LOONGSON_MACHINE MACHINE_TYPE_NAME("loongson3-virt")
107 DECLARE_INSTANCE_CHECKER(LoongsonMachineState
, LOONGSON_MACHINE
, TYPE_LOONGSON_MACHINE
)
109 static struct _loaderparams
{
112 const char *kernel_cmdline
;
113 const char *kernel_filename
;
114 const char *initrd_filename
;
115 uint64_t kernel_entry
;
119 static uint64_t loongson3_pm_read(void *opaque
, hwaddr addr
, unsigned size
)
124 static void loongson3_pm_write(void *opaque
, hwaddr addr
,
125 uint64_t val
, unsigned size
)
127 if (addr
!= PM_CNTL_MODE
) {
133 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET
);
136 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN
);
143 static const MemoryRegionOps loongson3_pm_ops
= {
144 .read
= loongson3_pm_read
,
145 .write
= loongson3_pm_write
,
146 .endianness
= DEVICE_NATIVE_ENDIAN
,
148 .min_access_size
= 1,
153 #define DEF_LOONGSON3_FREQ (800 * 1000 * 1000)
155 static uint64_t get_cpu_freq_hz(void)
160 struct kvm_one_reg freq_reg
= {
161 .id
= KVM_REG_MIPS_COUNT_HZ
,
162 .addr
= (uintptr_t)(&freq
)
166 ret
= kvm_vcpu_ioctl(first_cpu
, KVM_GET_ONE_REG
, &freq_reg
);
172 return DEF_LOONGSON3_FREQ
;
175 static void init_boot_param(void)
178 struct boot_params
*bp
;
180 p
= g_malloc0(loader_rommap
[LOADER_PARAM
].size
);
183 bp
->efi
.smbios
.vers
= cpu_to_le16(1);
184 init_reset_system(&(bp
->reset_system
));
185 p
+= ROUND_UP(sizeof(struct boot_params
), 64);
186 init_loongson_params(&(bp
->efi
.smbios
.lp
), p
,
187 loaderparams
.cpu_freq
, loaderparams
.ram_size
);
189 rom_add_blob_fixed("params_rom", bp
,
190 loader_rommap
[LOADER_PARAM
].size
,
191 loader_rommap
[LOADER_PARAM
].base
);
195 loaderparams
.a2
= cpu_mips_phys_to_kseg0(NULL
,
196 loader_rommap
[LOADER_PARAM
].base
);
199 static void init_boot_rom(void)
201 const unsigned int boot_code
[] = {
202 0x40086000, /* mfc0 t0, CP0_STATUS */
203 0x240900E4, /* li t1, 0xe4 #set kx, sx, ux, erl */
204 0x01094025, /* or t0, t0, t1 */
205 0x3C090040, /* lui t1, 0x40 #set bev */
206 0x01094025, /* or t0, t0, t1 */
207 0x40886000, /* mtc0 t0, CP0_STATUS */
209 0x40806800, /* mtc0 zero, CP0_CAUSE */
211 0x400A7801, /* mfc0 t2, $15, 1 */
212 0x314A00FF, /* andi t2, 0x0ff */
213 0x3C089000, /* dli t0, 0x900000003ff01000 */
218 0x314B0003, /* andi t3, t2, 0x3 #local cpuid */
219 0x000B5A00, /* sll t3, 8 */
220 0x010B4025, /* or t0, t0, t3 */
221 0x314C000C, /* andi t4, t2, 0xc #node id */
222 0x000C62BC, /* dsll t4, 42 */
223 0x010C4025, /* or t0, t0, t4 */
225 0xDD020020, /* ld v0, FN_OFF(t0) #FN_OFF 0x020 */
226 0x1040FFFE, /* beqz v0, WaitForInit */
227 0x00000000, /* nop */
228 0xDD1D0028, /* ld sp, SP_OFF(t0) #FN_OFF 0x028 */
229 0xDD1C0030, /* ld gp, GP_OFF(t0) #FN_OFF 0x030 */
230 0xDD050038, /* ld a1, A1_OFF(t0) #FN_OFF 0x038 */
231 0x00400008, /* jr v0 #byebye */
232 0x00000000, /* nop */
233 0x1000FFFF, /* 1: b 1b */
234 0x00000000, /* nop */
237 0x3C0C9000, /* dli t0, 0x9000000010080010 */
243 0x240D0000, /* li t1, 0x00 */
244 0xA18D0000, /* sb t1, (t0) */
245 0x1000FFFF, /* 1: b 1b */
246 0x00000000, /* nop */
249 0x3C0C9000, /* dli t0, 0x9000000010080010 */
255 0x240D00FF, /* li t1, 0xff */
256 0xA18D0000, /* sb t1, (t0) */
257 0x1000FFFF, /* 1: b 1b */
261 rom_add_blob_fixed("boot_rom", boot_code
, sizeof(boot_code
),
262 loader_rommap
[LOADER_BOOTROM
].base
);
265 static void fw_cfg_boot_set(void *opaque
, const char *boot_device
,
268 fw_cfg_modify_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
271 static void fw_conf_init(unsigned long ram_size
)
274 hwaddr cfg_addr
= virt_memmap
[VIRT_FW_CFG
].base
;
276 fw_cfg
= fw_cfg_init_mem_wide(cfg_addr
, cfg_addr
+ 8, 8, 0, NULL
);
277 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, (uint16_t)current_machine
->smp
.cpus
);
278 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)current_machine
->smp
.max_cpus
);
279 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
280 fw_cfg_add_i32(fw_cfg
, FW_CFG_MACHINE_VERSION
, 1);
281 fw_cfg_add_i64(fw_cfg
, FW_CFG_CPU_FREQ
, get_cpu_freq_hz());
282 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
285 static int set_prom_cmdline(ram_addr_t initrd_offset
, long initrd_size
)
289 hwaddr cmdline_vaddr
;
290 unsigned int *parg_env
;
292 /* Allocate cmdline_buf for command line. */
293 cmdline_buf
= g_malloc0(loader_memmap
[LOADER_CMDLINE
].size
);
294 cmdline_vaddr
= cpu_mips_phys_to_kseg0(NULL
,
295 loader_memmap
[LOADER_CMDLINE
].base
);
298 * Layout of cmdline_buf looks like this:
299 * argv[0], argv[1], 0, env[0], env[1], ... env[i], 0,
300 * argv[0]'s data, argv[1]'s data, env[0]'data, ..., env[i]'s data, 0
302 parg_env
= (void *)cmdline_buf
;
305 *parg_env
++ = cmdline_vaddr
+ ret
;
306 ret
+= (1 + snprintf(cmdline_buf
+ ret
, 256 - ret
, "g"));
309 *parg_env
++ = cmdline_vaddr
+ ret
;
311 ret
+= (1 + snprintf(cmdline_buf
+ ret
, 256 - ret
,
312 "rd_start=0x" TARGET_FMT_lx
" rd_size=%li %s",
313 cpu_mips_phys_to_kseg0(NULL
, initrd_offset
),
314 initrd_size
, loaderparams
.kernel_cmdline
));
316 ret
+= (1 + snprintf(cmdline_buf
+ ret
, 256 - ret
, "%s",
317 loaderparams
.kernel_cmdline
));
320 *parg_env
++ = cmdline_vaddr
+ 4 * ret
;
322 rom_add_blob_fixed("cmdline", cmdline_buf
,
323 loader_memmap
[LOADER_CMDLINE
].size
,
324 loader_memmap
[LOADER_CMDLINE
].base
);
329 loaderparams
.a1
= cmdline_vaddr
;
334 static uint64_t load_kernel(CPUMIPSState
*env
)
337 ram_addr_t initrd_offset
;
338 uint64_t kernel_entry
, kernel_low
, kernel_high
, initrd_size
;
340 kernel_size
= load_elf(loaderparams
.kernel_filename
, NULL
,
341 cpu_mips_kseg0_to_phys
, NULL
,
342 (uint64_t *)&kernel_entry
,
343 (uint64_t *)&kernel_low
, (uint64_t *)&kernel_high
,
344 NULL
, 0, EM_MIPS
, 1, 0);
345 if (kernel_size
< 0) {
346 error_report("could not load kernel '%s': %s",
347 loaderparams
.kernel_filename
,
348 load_elf_strerror(kernel_size
));
355 if (loaderparams
.initrd_filename
) {
356 initrd_size
= get_image_size(loaderparams
.initrd_filename
);
357 if (initrd_size
> 0) {
358 initrd_offset
= MAX(loader_memmap
[LOADER_INITRD
].base
,
359 ROUND_UP(kernel_high
, INITRD_PAGE_SIZE
));
361 if (initrd_offset
+ initrd_size
> loaderparams
.ram_size
) {
362 error_report("memory too small for initial ram disk '%s'",
363 loaderparams
.initrd_filename
);
367 initrd_size
= load_image_targphys(loaderparams
.initrd_filename
,
369 loaderparams
.ram_size
- initrd_offset
);
372 if (initrd_size
== (target_ulong
) -1) {
373 error_report("could not load initial ram disk '%s'",
374 loaderparams
.initrd_filename
);
379 /* Setup prom cmdline. */
380 set_prom_cmdline(initrd_offset
, initrd_size
);
385 static void main_cpu_reset(void *opaque
)
387 MIPSCPU
*cpu
= opaque
;
388 CPUMIPSState
*env
= &cpu
->env
;
392 /* Loongson-3 reset stuff */
393 if (loaderparams
.kernel_filename
) {
394 if (cpu
== MIPS_CPU(first_cpu
)) {
395 env
->active_tc
.gpr
[4] = loaderparams
.a0
;
396 env
->active_tc
.gpr
[5] = loaderparams
.a1
;
397 env
->active_tc
.gpr
[6] = loaderparams
.a2
;
398 env
->active_tc
.PC
= loaderparams
.kernel_entry
;
400 env
->CP0_Status
&= ~((1 << CP0St_BEV
) | (1 << CP0St_ERL
));
404 static inline void loongson3_virt_devices_init(MachineState
*machine
,
411 MemoryRegion
*mmio_reg
, *ecam_reg
;
412 LoongsonMachineState
*s
= LOONGSON_MACHINE(machine
);
414 dev
= qdev_new(TYPE_GPEX_HOST
);
415 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
416 pci_bus
= PCI_HOST_BRIDGE(dev
)->bus
;
418 s
->ecam_alias
= g_new0(MemoryRegion
, 1);
419 ecam_reg
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
420 memory_region_init_alias(s
->ecam_alias
, OBJECT(dev
), "pcie-ecam",
421 ecam_reg
, 0, virt_memmap
[VIRT_PCIE_ECAM
].size
);
422 memory_region_add_subregion(get_system_memory(),
423 virt_memmap
[VIRT_PCIE_ECAM
].base
,
426 s
->mmio_alias
= g_new0(MemoryRegion
, 1);
427 mmio_reg
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 1);
428 memory_region_init_alias(s
->mmio_alias
, OBJECT(dev
), "pcie-mmio",
429 mmio_reg
, virt_memmap
[VIRT_PCIE_MMIO
].base
,
430 virt_memmap
[VIRT_PCIE_MMIO
].size
);
431 memory_region_add_subregion(get_system_memory(),
432 virt_memmap
[VIRT_PCIE_MMIO
].base
,
435 s
->pio_alias
= g_new0(MemoryRegion
, 1);
436 memory_region_init_alias(s
->pio_alias
, OBJECT(dev
), "pcie-pio",
438 virt_memmap
[VIRT_PCIE_PIO
].size
);
439 memory_region_add_subregion(get_system_memory(),
440 virt_memmap
[VIRT_PCIE_PIO
].base
, s
->pio_alias
);
441 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 2, virt_memmap
[VIRT_PCIE_PIO
].base
);
443 for (i
= 0; i
< GPEX_NUM_IRQS
; i
++) {
444 irq
= qdev_get_gpio_in(pic
, PCIE_IRQ_BASE
+ i
);
445 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), i
, irq
);
446 gpex_set_irq_num(GPEX_HOST(dev
), i
, PCIE_IRQ_BASE
+ i
);
448 msi_nonbroken
= true;
450 pci_vga_init(pci_bus
);
452 if (defaults_enabled()) {
453 pci_create_simple(pci_bus
, -1, "pci-ohci");
454 usb_create_simple(usb_bus_find(-1), "usb-kbd");
455 usb_create_simple(usb_bus_find(-1), "usb-tablet");
458 for (i
= 0; i
< nb_nics
; i
++) {
459 NICInfo
*nd
= &nd_table
[i
];
462 nd
->model
= g_strdup("virtio");
465 pci_nic_init_nofail(nd
, pci_bus
, nd
->model
, NULL
);
469 static void mips_loongson3_virt_init(MachineState
*machine
)
476 DeviceState
*liointc
;
478 const char *kernel_cmdline
= machine
->kernel_cmdline
;
479 const char *kernel_filename
= machine
->kernel_filename
;
480 const char *initrd_filename
= machine
->initrd_filename
;
481 ram_addr_t ram_size
= machine
->ram_size
;
482 MemoryRegion
*address_space_mem
= get_system_memory();
483 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
484 MemoryRegion
*bios
= g_new(MemoryRegion
, 1);
485 MemoryRegion
*iomem
= g_new(MemoryRegion
, 1);
487 /* TODO: TCG will support all CPU types */
488 if (!kvm_enabled()) {
489 if (!machine
->cpu_type
) {
490 machine
->cpu_type
= MIPS_CPU_TYPE_NAME("Loongson-3A1000");
492 if (!strstr(machine
->cpu_type
, "Loongson-3A1000")) {
493 error_report("Loongson-3/TCG needs cpu type Loongson-3A1000");
497 if (!machine
->cpu_type
) {
498 machine
->cpu_type
= MIPS_CPU_TYPE_NAME("Loongson-3A4000");
500 if (!strstr(machine
->cpu_type
, "Loongson-3A4000")) {
501 error_report("Loongson-3/KVM needs cpu type Loongson-3A4000");
506 if (ram_size
< 512 * MiB
) {
507 error_report("Loongson-3 machine needs at least 512MB memory");
512 * The whole MMIO range among configure registers doesn't generate
513 * exception when accessing invalid memory. Create some unimplememted
514 * devices to emulate this feature.
516 create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB
);
517 create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB
);
519 liointc
= qdev_new("loongson.liointc");
520 sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc
), &error_fatal
);
522 sysbus_mmio_map(SYS_BUS_DEVICE(liointc
), 0, virt_memmap
[VIRT_LIOINTC
].base
);
524 serial_mm_init(address_space_mem
, virt_memmap
[VIRT_UART
].base
, 0,
525 qdev_get_gpio_in(liointc
, UART_IRQ
), 115200, serial_hd(0),
526 DEVICE_NATIVE_ENDIAN
);
528 sysbus_create_simple("goldfish_rtc", virt_memmap
[VIRT_RTC
].base
,
529 qdev_get_gpio_in(liointc
, RTC_IRQ
));
531 cpuclk
= clock_new(OBJECT(machine
), "cpu-refclk");
532 clock_set_hz(cpuclk
, DEF_LOONGSON3_FREQ
);
534 for (i
= 0; i
< machine
->smp
.cpus
; i
++) {
538 cpu
= mips_cpu_create_with_clock(machine
->cpu_type
, cpuclk
);
540 /* Init internal devices */
541 cpu_mips_irq_init_cpu(cpu
);
542 cpu_mips_clock_init(cpu
);
543 qemu_register_reset(main_cpu_reset
, cpu
);
546 continue; /* Only node-0 can be connected to LIOINTC */
549 for (ip
= 0; ip
< 4 ; ip
++) {
550 int pin
= i
* 4 + ip
;
551 sysbus_connect_irq(SYS_BUS_DEVICE(liointc
),
552 pin
, cpu
->env
.irq
[ip
+ 2]);
555 env
= &MIPS_CPU(first_cpu
)->env
;
557 /* Allocate RAM/BIOS, 0x00000000~0x10000000 is alias of 0x80000000~0x90000000 */
558 memory_region_init_rom(bios
, NULL
, "loongson3.bios",
559 virt_memmap
[VIRT_BIOS_ROM
].size
, &error_fatal
);
560 memory_region_init_alias(ram
, NULL
, "loongson3.lowmem",
561 machine
->ram
, 0, virt_memmap
[VIRT_LOWMEM
].size
);
562 memory_region_init_io(iomem
, NULL
, &loongson3_pm_ops
,
563 NULL
, "loongson3_pm", virt_memmap
[VIRT_PM
].size
);
565 memory_region_add_subregion(address_space_mem
,
566 virt_memmap
[VIRT_LOWMEM
].base
, ram
);
567 memory_region_add_subregion(address_space_mem
,
568 virt_memmap
[VIRT_BIOS_ROM
].base
, bios
);
569 memory_region_add_subregion(address_space_mem
,
570 virt_memmap
[VIRT_HIGHMEM
].base
, machine
->ram
);
571 memory_region_add_subregion(address_space_mem
,
572 virt_memmap
[VIRT_PM
].base
, iomem
);
575 * We do not support flash operation, just loading bios.bin as raw BIOS.
576 * Please use -L to set the BIOS path and -bios to set bios name.
579 if (kernel_filename
) {
580 loaderparams
.cpu_freq
= get_cpu_freq_hz();
581 loaderparams
.ram_size
= ram_size
;
582 loaderparams
.kernel_filename
= kernel_filename
;
583 loaderparams
.kernel_cmdline
= kernel_cmdline
;
584 loaderparams
.initrd_filename
= initrd_filename
;
585 loaderparams
.kernel_entry
= load_kernel(env
);
590 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
,
591 machine
->firmware
?: LOONGSON3_BIOSNAME
);
593 bios_size
= load_image_targphys(filename
,
594 virt_memmap
[VIRT_BIOS_ROM
].base
,
595 virt_memmap
[VIRT_BIOS_ROM
].size
);
601 if ((bios_size
< 0 || bios_size
> virt_memmap
[VIRT_BIOS_ROM
].size
) &&
602 !kernel_filename
&& !qtest_enabled()) {
603 error_report("Could not load MIPS bios '%s'", machine
->firmware
);
607 fw_conf_init(ram_size
);
610 loongson3_virt_devices_init(machine
, liointc
);
613 static void loongson3v_machine_class_init(ObjectClass
*oc
, void *data
)
615 MachineClass
*mc
= MACHINE_CLASS(oc
);
617 mc
->desc
= "Loongson-3 Virtualization Platform";
618 mc
->init
= mips_loongson3_virt_init
;
619 mc
->block_default_type
= IF_IDE
;
620 mc
->max_cpus
= LOONGSON_MAX_VCPUS
;
621 mc
->default_ram_id
= "loongson3.highram";
622 mc
->default_ram_size
= 1600 * MiB
;
623 mc
->kvm_type
= mips_kvm_type
;
624 mc
->minimum_page_bits
= 14;
627 static const TypeInfo loongson3_machine_types
[] = {
629 .name
= TYPE_LOONGSON_MACHINE
,
630 .parent
= TYPE_MACHINE
,
631 .instance_size
= sizeof(LoongsonMachineState
),
632 .class_init
= loongson3v_machine_class_init
,
636 DEFINE_TYPES(loongson3_machine_types
)