hw/mips/mips_fulong2e.c

   1 /*
   2  * QEMU fulong 2e mini pc support
   3  *
   4  * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
   5  * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
   6  * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 /*
  14  * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  15  * http://www.linux-mips.org/wiki/Fulong
  16  *
  17  * Loongson 2e user manual:
  18  * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "hw/hw.h"
  24 #include "hw/i386/pc.h"
  25 #include "hw/char/serial.h"
  26 #include "hw/block/fdc.h"
  27 #include "net/net.h"
  28 #include "hw/boards.h"
  29 #include "hw/i2c/smbus.h"
  30 #include "sysemu/block-backend.h"
  31 #include "hw/block/flash.h"
  32 #include "hw/mips/mips.h"
  33 #include "hw/mips/cpudevs.h"
  34 #include "hw/pci/pci.h"
  35 #include "sysemu/sysemu.h"
  36 #include "audio/audio.h"
  37 #include "qemu/log.h"
  38 #include "hw/loader.h"
  39 #include "hw/mips/bios.h"
  40 #include "hw/ide.h"
  41 #include "elf.h"
  42 #include "hw/isa/vt82c686.h"
  43 #include "hw/timer/mc146818rtc.h"
  44 #include "hw/timer/i8254.h"
  45 #include "sysemu/blockdev.h"
  46 #include "exec/address-spaces.h"
  47 #include "sysemu/qtest.h"
  48 #include "qemu/error-report.h"
  49
  50 #define DEBUG_FULONG2E_INIT
  51
  52 #define ENVP_ADDR       0x80002000l
  53 #define ENVP_NB_ENTRIES         16
  54 #define ENVP_ENTRY_SIZE         256
  55
  56 #define MAX_IDE_BUS 2
  57
  58 /*
  59  * PMON is not part of qemu and released with BSD license, anyone
  60  * who want to build a pmon binary please first git-clone the source
  61  * from the git repository at:
  62  * http://www.loongson.cn/support/git/pmon
  63  * Then follow the "Compile Guide" available at:
  64  * http://dev.lemote.com/code/pmon
  65  *
  66  * Notes:
  67  * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
  68  * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  69  * in the "Compile Guide".
  70  */
  71 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
  72
  73 /* PCI SLOT in fulong 2e */
  74 #define FULONG2E_VIA_SLOT        5
  75 #define FULONG2E_ATI_SLOT        6
  76 #define FULONG2E_RTL8139_SLOT    7
  77
  78 static ISADevice *pit;
  79
  80 static struct _loaderparams {
  81     int ram_size;
  82     const char *kernel_filename;
  83     const char *kernel_cmdline;
  84     const char *initrd_filename;
  85 } loaderparams;
  86
  87 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
  88                                         const char *string, ...)
  89 {
  90     va_list ap;
  91     int32_t table_addr;
  92
  93     if (index >= ENVP_NB_ENTRIES)
  94         return;
  95
  96     if (string == NULL) {
  97         prom_buf[index] = 0;
  98         return;
  99     }
 100
 101     table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
 102     prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
 103
 104     va_start(ap, string);
 105     vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
 106     va_end(ap);
 107 }
 108
 109 static int64_t load_kernel (CPUMIPSState *env)
 110 {
 111     int64_t kernel_entry, kernel_low, kernel_high;
 112     int index = 0;
 113     long initrd_size;
 114     ram_addr_t initrd_offset;
 115     uint32_t *prom_buf;
 116     long prom_size;
 117
 118     if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
 119                  (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
 120                  (uint64_t *)&kernel_high, 0, EM_MIPS, 1, 0) < 0) {
 121         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 122                 loaderparams.kernel_filename);
 123         exit(1);
 124     }
 125
 126     /* load initrd */
 127     initrd_size = 0;
 128     initrd_offset = 0;
 129     if (loaderparams.initrd_filename) {
 130         initrd_size = get_image_size (loaderparams.initrd_filename);
 131         if (initrd_size > 0) {
 132             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
 133             if (initrd_offset + initrd_size > ram_size) {
 134                 fprintf(stderr,
 135                         "qemu: memory too small for initial ram disk '%s'\n",
 136                         loaderparams.initrd_filename);
 137                 exit(1);
 138             }
 139             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 140                                      initrd_offset, ram_size - initrd_offset);
 141         }
 142         if (initrd_size == (target_ulong) -1) {
 143             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 144                     loaderparams.initrd_filename);
 145             exit(1);
 146         }
 147     }
 148
 149     /* Setup prom parameters. */
 150     prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
 151     prom_buf = g_malloc(prom_size);
 152
 153     prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
 154     if (initrd_size > 0) {
 155         prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 156                  cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
 157                  loaderparams.kernel_cmdline);
 158     } else {
 159         prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
 160     }
 161
 162     /* Setup minimum environment variables */
 163     prom_set(prom_buf, index++, "busclock=33000000");
 164     prom_set(prom_buf, index++, "cpuclock=100000000");
 165     prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
 166     prom_set(prom_buf, index++, "modetty0=38400n8r");
 167     prom_set(prom_buf, index++, NULL);
 168
 169     rom_add_blob_fixed("prom", prom_buf, prom_size,
 170                        cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
 171
 172     g_free(prom_buf);
 173     return kernel_entry;
 174 }
 175
 176 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
 177 {
 178     uint32_t *p;
 179
 180     /* Small bootloader */
 181     p = (uint32_t *) base;
 182
 183     stl_p(p++, 0x0bf00010);                                      /* j 0x1fc00040 */
 184     stl_p(p++, 0x00000000);                                      /* nop */
 185
 186     /* Second part of the bootloader */
 187     p = (uint32_t *) (base + 0x040);
 188
 189     stl_p(p++, 0x3c040000);                                      /* lui a0, 0 */
 190     stl_p(p++, 0x34840002);                                      /* ori a0, a0, 2 */
 191     stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */
 192     stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */
 193     stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
 194     stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
 195     stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */
 196     stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */
 197     stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;
 198     stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */
 199     stl_p(p++, 0x03e00008);                                      /* jr ra */
 200     stl_p(p++, 0x00000000);                                      /* nop */
 201 }
 202
 203
 204 static void main_cpu_reset(void *opaque)
 205 {
 206     MIPSCPU *cpu = opaque;
 207     CPUMIPSState *env = &cpu->env;
 208
 209     cpu_reset(CPU(cpu));
 210     /* TODO: 2E reset stuff */
 211     if (loaderparams.kernel_filename) {
 212         env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
 213     }
 214 }
 215
 216 static const uint8_t eeprom_spd[0x80] = {
 217     0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
 218     0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
 219     0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
 220     0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
 221     0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
 222     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 223     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 224     0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
 225     0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
 226     0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
 227     0x20,0x30,0x20
 228 };
 229
 230 /* Audio support */
 231 static void audio_init (PCIBus *pci_bus)
 232 {
 233     vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
 234     vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
 235 }
 236
 237 /* Network support */
 238 static void network_init (PCIBus *pci_bus)
 239 {
 240     int i;
 241
 242     for(i = 0; i < nb_nics; i++) {
 243         NICInfo *nd = &nd_table[i];
 244         const char *default_devaddr = NULL;
 245
 246         if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
 247             /* The fulong board has a RTL8139 card using PCI SLOT 7 */
 248             default_devaddr = "07";
 249         }
 250
 251         pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
 252     }
 253 }
 254
 255 static void mips_fulong2e_init(MachineState *machine)
 256 {
 257     ram_addr_t ram_size = machine->ram_size;
 258     const char *cpu_model = machine->cpu_model;
 259     const char *kernel_filename = machine->kernel_filename;
 260     const char *kernel_cmdline = machine->kernel_cmdline;
 261     const char *initrd_filename = machine->initrd_filename;
 262     char *filename;
 263     MemoryRegion *address_space_mem = get_system_memory();
 264     MemoryRegion *ram = g_new(MemoryRegion, 1);
 265     MemoryRegion *bios = g_new(MemoryRegion, 1);
 266     long bios_size;
 267     int64_t kernel_entry;
 268     qemu_irq *i8259;
 269     PCIBus *pci_bus;
 270     ISABus *isa_bus;
 271     I2CBus *smbus;
 272     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 273     MIPSCPU *cpu;
 274     CPUMIPSState *env;
 275
 276     /* init CPUs */
 277     if (cpu_model == NULL) {
 278         cpu_model = "Loongson-2E";
 279     }
 280     cpu = cpu_mips_init(cpu_model);
 281     if (cpu == NULL) {
 282         fprintf(stderr, "Unable to find CPU definition\n");
 283         exit(1);
 284     }
 285     env = &cpu->env;
 286
 287     qemu_register_reset(main_cpu_reset, cpu);
 288
 289     /* fulong 2e has 256M ram. */
 290     ram_size = 256 * 1024 * 1024;
 291
 292     /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
 293     bios_size = 1024 * 1024;
 294
 295     /* allocate RAM */
 296     memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
 297     memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
 298                            &error_fatal);
 299     memory_region_set_readonly(bios, true);
 300
 301     memory_region_add_subregion(address_space_mem, 0, ram);
 302     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
 303
 304     /* We do not support flash operation, just loading pmon.bin as raw BIOS.
 305      * Please use -L to set the BIOS path and -bios to set bios name. */
 306
 307     if (kernel_filename) {
 308         loaderparams.ram_size = ram_size;
 309         loaderparams.kernel_filename = kernel_filename;
 310         loaderparams.kernel_cmdline = kernel_cmdline;
 311         loaderparams.initrd_filename = initrd_filename;
 312         kernel_entry = load_kernel (env);
 313         write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
 314     } else {
 315         if (bios_name == NULL) {
 316                 bios_name = FULONG_BIOSNAME;
 317         }
 318         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 319         if (filename) {
 320             bios_size = load_image_targphys(filename, 0x1fc00000LL,
 321                                             BIOS_SIZE);
 322             g_free(filename);
 323         } else {
 324             bios_size = -1;
 325         }
 326
 327         if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
 328             !kernel_filename && !qtest_enabled()) {
 329             error_report("Could not load MIPS bios '%s'", bios_name);
 330             exit(1);
 331         }
 332     }
 333
 334     /* Init internal devices */
 335     cpu_mips_irq_init_cpu(cpu);
 336     cpu_mips_clock_init(cpu);
 337
 338     /* North bridge, Bonito --> IP2 */
 339     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 340
 341     /* South bridge */
 342     ide_drive_get(hd, ARRAY_SIZE(hd));
 343
 344     isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
 345     if (!isa_bus) {
 346         fprintf(stderr, "vt82c686b_init error\n");
 347         exit(1);
 348     }
 349
 350     /* Interrupt controller */
 351     /* The 8259 -> IP5  */
 352     i8259 = i8259_init(isa_bus, env->irq[5]);
 353     isa_bus_irqs(isa_bus, i8259);
 354
 355     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
 356     pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
 357                       "vt82c686b-usb-uhci");
 358     pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
 359                       "vt82c686b-usb-uhci");
 360
 361     smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
 362                               0xeee1, NULL);
 363     /* TODO: Populate SPD eeprom data.  */
 364     smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
 365
 366     /* init other devices */
 367     pit = pit_init(isa_bus, 0x40, 0, NULL);
 368     DMA_init(isa_bus, 0);
 369
 370     /* Super I/O */
 371     isa_create_simple(isa_bus, "i8042");
 372
 373     rtc_init(isa_bus, 2000, NULL);
 374
 375     serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
 376     parallel_hds_isa_init(isa_bus, 1);
 377
 378     /* Sound card */
 379     audio_init(pci_bus);
 380     /* Network card */
 381     network_init(pci_bus);
 382 }
 383
 384 static void mips_fulong2e_machine_init(MachineClass *mc)
 385 {
 386     mc->desc = "Fulong 2e mini pc";
 387     mc->init = mips_fulong2e_init;
 388     mc->block_default_type = IF_IDE;
 389 }
 390
 391 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)