2 * QEMU MIPS Jazz support
4 * Copyright (c) 2007-2008 Hervé Poussineau
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
31 #include "audio/audio.h"
35 #include "mips-bios.h"
44 static void main_cpu_reset(void *opaque
)
46 CPUState
*env
= opaque
;
50 static uint32_t rtc_readb(void *opaque
, target_phys_addr_t addr
)
52 CPUState
*env
= opaque
;
53 return cpu_inw(env
, 0x71);
56 static void rtc_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
58 CPUState
*env
= opaque
;
59 cpu_outw(env
, 0x71, val
& 0xff);
62 static CPUReadMemoryFunc
* const rtc_read
[3] = {
68 static CPUWriteMemoryFunc
* const rtc_write
[3] = {
74 static void dma_dummy_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
76 /* Nothing to do. That is only to ensure that
77 * the current DMA acknowledge cycle is completed. */
80 static CPUReadMemoryFunc
* const dma_dummy_read
[3] = {
86 static CPUWriteMemoryFunc
* const dma_dummy_write
[3] = {
93 static void audio_init(qemu_irq
*pic
)
96 int audio_enabled
= 0;
98 for (c
= soundhw
; !audio_enabled
&& c
->name
; ++c
) {
99 audio_enabled
= c
->enabled
;
103 for (c
= soundhw
; c
->name
; ++c
) {
106 c
->init
.init_isa(pic
);
114 #define MAGNUM_BIOS_SIZE_MAX 0x7e000
115 #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
118 void mips_jazz_init (ram_addr_t ram_size
,
119 const char *cpu_model
,
120 enum jazz_model_e jazz_model
)
125 qemu_irq
*rc4030
, *i8259
;
128 int s_rtc
, s_dma_dummy
;
131 BlockDriverState
*fds
[MAX_FD
];
133 ram_addr_t ram_offset
;
134 ram_addr_t bios_offset
;
137 if (cpu_model
== NULL
) {
141 /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
145 env
= cpu_init(cpu_model
);
147 fprintf(stderr
, "Unable to find CPU definition\n");
150 qemu_register_reset(main_cpu_reset
, env
);
153 ram_offset
= qemu_ram_alloc(ram_size
);
154 cpu_register_physical_memory(0, ram_size
, ram_offset
| IO_MEM_RAM
);
156 bios_offset
= qemu_ram_alloc(MAGNUM_BIOS_SIZE
);
157 cpu_register_physical_memory(0x1fc00000LL
,
158 MAGNUM_BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
159 cpu_register_physical_memory(0xfff00000LL
,
160 MAGNUM_BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
162 /* load the BIOS image. */
163 if (bios_name
== NULL
)
164 bios_name
= BIOS_FILENAME
;
165 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
167 bios_size
= load_image_targphys(filename
, 0xfff00000LL
,
173 if (bios_size
< 0 || bios_size
> MAGNUM_BIOS_SIZE
) {
174 fprintf(stderr
, "qemu: Could not load MIPS bios '%s'\n",
179 /* Init CPU internal devices */
180 cpu_mips_irq_init_cpu(env
);
181 cpu_mips_clock_init(env
);
184 rc4030_opaque
= rc4030_init(env
->irq
[6], env
->irq
[3], &rc4030
, &dmas
);
185 s_dma_dummy
= cpu_register_io_memory(dma_dummy_read
, dma_dummy_write
, NULL
);
186 cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy
);
189 i8259
= i8259_init(env
->irq
[4]);
191 pit
= pit_init(0x40, i8259
[0]);
194 /* ISA IO space at 0x90000000 */
195 isa_mmio_init(0x90000000, 0x01000000);
196 isa_mem_base
= 0x11000000;
199 switch (jazz_model
) {
201 g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030
[3]);
204 isa_vga_mm_init(0x40000000, 0x60000000, 0);
210 /* Network controller */
211 for (n
= 0; n
< nb_nics
; n
++) {
214 nd
->model
= "dp83932";
215 if (strcmp(nd
->model
, "dp83932") == 0) {
216 dp83932_init(nd
, 0x80001000, 2, rc4030
[4],
217 rc4030_opaque
, rc4030_dma_memory_rw
);
219 } else if (strcmp(nd
->model
, "?") == 0) {
220 fprintf(stderr
, "qemu: Supported NICs: dp83932\n");
223 fprintf(stderr
, "qemu: Unsupported NIC: %s\n", nd
->model
);
229 esp_init(0x80002000, 0,
230 rc4030_dma_read
, rc4030_dma_write
, dmas
[0],
231 rc4030
[5], &esp_reset
);
234 if (drive_get_max_bus(IF_FLOPPY
) >= MAX_FD
) {
235 fprintf(stderr
, "qemu: too many floppy drives\n");
238 for (n
= 0; n
< MAX_FD
; n
++) {
239 DriveInfo
*dinfo
= drive_get(IF_FLOPPY
, 0, n
);
240 fds
[n
] = dinfo
? dinfo
->bdrv
: NULL
;
242 fdctrl_init_sysbus(rc4030
[1], 0, 0x80003000, fds
);
244 /* Real time clock */
246 s_rtc
= cpu_register_io_memory(rtc_read
, rtc_write
, env
);
247 cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc
);
249 /* Keyboard (i8042) */
250 i8042_mm_init(rc4030
[6], rc4030
[7], 0x80005000, 0x1000, 0x1);
254 serial_mm_init(0x80006000, 0, rc4030
[8], 8000000/16, serial_hds
[0], 1);
256 serial_mm_init(0x80007000, 0, rc4030
[9], 8000000/16, serial_hds
[1], 1);
260 parallel_mm_init(0x80008000, 0, rc4030
[0], parallel_hds
[0]);
263 /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
268 /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
269 ds1225y_init(0x80009000, "nvram");
272 jazz_led_init(0x8000f000);
276 void mips_magnum_init (ram_addr_t ram_size
,
277 const char *boot_device
,
278 const char *kernel_filename
, const char *kernel_cmdline
,
279 const char *initrd_filename
, const char *cpu_model
)
281 mips_jazz_init(ram_size
, cpu_model
, JAZZ_MAGNUM
);
285 void mips_pica61_init (ram_addr_t ram_size
,
286 const char *boot_device
,
287 const char *kernel_filename
, const char *kernel_cmdline
,
288 const char *initrd_filename
, const char *cpu_model
)
290 mips_jazz_init(ram_size
, cpu_model
, JAZZ_PICA61
);
293 static QEMUMachine mips_magnum_machine
= {
295 .desc
= "MIPS Magnum",
296 .init
= mips_magnum_init
,
300 static QEMUMachine mips_pica61_machine
= {
302 .desc
= "Acer Pica 61",
303 .init
= mips_pica61_init
,
307 static void mips_jazz_machine_init(void)
309 qemu_register_machine(&mips_magnum_machine
);
310 qemu_register_machine(&mips_pica61_machine
);
313 machine_init(mips_jazz_machine_init
);