hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "vl.h"
  11
  12 #ifdef TARGET_WORDS_BIGENDIAN
  13 #define BIOS_FILENAME "mips_bios.bin"
  14 #else
  15 #define BIOS_FILENAME "mipsel_bios.bin"
  16 #endif
  17
  18 #ifdef MIPS_HAS_MIPS64
  19 #define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000
  20 #else
  21 #define INITRD_LOAD_ADDR (int32_t)0x80800000
  22 #endif
  23
  24 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
  25
  26 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  27 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  28 static const int ide_irq[2] = { 14, 15 };
  29
  30 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  31 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
  32
  33 extern FILE *logfile;
  34
  35 static PITState *pit; /* PIT i8254 */
  36
  37 /*i8254 PIT is attached to the IRQ0 at PIC i8259 */
  38 /*The PIC is attached to the MIPS CPU INT0 pin */
  39 static void pic_irq_request(void *opaque, int level)
  40 {
  41     cpu_mips_irq_request(opaque, 2, level);
  42 }
  43
  44 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  45                               uint32_t val)
  46 {
  47     if ((addr & 0xffff) == 0 && val == 42)
  48         qemu_system_reset_request ();
  49     else if ((addr & 0xffff) == 4 && val == 42)
  50         qemu_system_shutdown_request ();
  51 }
  52
  53 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  54 {
  55     return 0;
  56 }
  57
  58 static CPUWriteMemoryFunc *mips_qemu_write[] = {
  59     &mips_qemu_writel,
  60     &mips_qemu_writel,
  61     &mips_qemu_writel,
  62 };
  63
  64 static CPUReadMemoryFunc *mips_qemu_read[] = {
  65     &mips_qemu_readl,
  66     &mips_qemu_readl,
  67     &mips_qemu_readl,
  68 };
  69
  70 static int mips_qemu_iomemtype = 0;
  71
  72 void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
  73                   const char *kernel_cmdline,
  74                   const char *initrd_filename)
  75 {
  76     int64_t entry = 0;
  77     long kernel_size, initrd_size;
  78
  79     kernel_size = load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND, &entry);
  80     if (kernel_size >= 0) {
  81         if ((entry & ~0x7fffffffULL) == 0x80000000)
  82             entry = (int32_t)entry;
  83         env->PC = entry;
  84     } else {
  85         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  86                 kernel_filename);
  87         exit(1);
  88     }
  89
  90     /* load initrd */
  91     initrd_size = 0;
  92     if (initrd_filename) {
  93         initrd_size = load_image(initrd_filename,
  94                                  phys_ram_base + INITRD_LOAD_ADDR + VIRT_TO_PHYS_ADDEND);
  95         if (initrd_size == (target_ulong) -1) {
  96             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
  97                     initrd_filename);
  98             exit(1);
  99         }
 100     }
 101
 102     /* Store command line.  */
 103     if (initrd_size > 0) {
 104         int ret;
 105         ret = sprintf(phys_ram_base + (16 << 20) - 256,
 106                       "rd_start=0x" TLSZ " rd_size=%li ",
 107                       INITRD_LOAD_ADDR,
 108                       initrd_size);
 109         strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline);
 110     }
 111     else {
 112         strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
 113     }
 114
 115     *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
 116     *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
 117 }
 118
 119 static void main_cpu_reset(void *opaque)
 120 {
 121     CPUState *env = opaque;
 122     cpu_reset(env);
 123
 124     if (env->kernel_filename)
 125         load_kernel (env, env->ram_size, env->kernel_filename,
 126                      env->kernel_cmdline, env->initrd_filename);
 127 }
 128
 129 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
 130                     DisplayState *ds, const char **fd_filename, int snapshot,
 131                     const char *kernel_filename, const char *kernel_cmdline,
 132                     const char *initrd_filename)
 133 {
 134     char buf[1024];
 135     unsigned long bios_offset;
 136     int bios_size;
 137     CPUState *env;
 138     static RTCState *rtc_state;
 139     int i;
 140
 141     env = cpu_init();
 142     register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 143     qemu_register_reset(main_cpu_reset, env);
 144
 145     /* allocate RAM */
 146     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 147
 148     if (!mips_qemu_iomemtype) {
 149         mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
 150                                                      mips_qemu_write, NULL);
 151     }
 152     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 153
 154     /* Try to load a BIOS image. If this fails, we continue regardless,
 155        but initialize the hardware ourselves. When a kernel gets
 156        preloaded we also initialize the hardware, since the BIOS wasn't
 157        run. */
 158     bios_offset = ram_size + vga_ram_size;
 159     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 160     bios_size = load_image(buf, phys_ram_base + bios_offset);
 161     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 162         cpu_register_physical_memory(0x1fc00000,
 163                                      BIOS_SIZE, bios_offset | IO_MEM_ROM);
 164     } else {
 165         /* not fatal */
 166         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 167                 buf);
 168     }
 169
 170     if (kernel_filename) {
 171         load_kernel (env, ram_size, kernel_filename, kernel_cmdline,
 172                      initrd_filename);
 173         env->ram_size = ram_size;
 174         env->kernel_filename = kernel_filename;
 175         env->kernel_cmdline = kernel_cmdline;
 176         env->initrd_filename = initrd_filename;
 177     }
 178
 179     /* Init CPU internal devices */
 180     cpu_mips_clock_init(env);
 181     cpu_mips_irqctrl_init();
 182
 183     rtc_state = rtc_init(0x70, 8);
 184
 185     /* Register 64 KB of ISA IO space at 0x14000000 */
 186     isa_mmio_init(0x14000000, 0x00010000);
 187     isa_mem_base = 0x10000000;
 188
 189     isa_pic = pic_init(pic_irq_request, env);
 190     pit = pit_init(0x40, 0);
 191
 192     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 193         if (serial_hds[i]) {
 194             serial_init(&pic_set_irq_new, isa_pic,
 195                         serial_io[i], serial_irq[i], serial_hds[i]);
 196         }
 197     }
 198
 199     isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
 200                  vga_ram_size);
 201
 202     if (nd_table[0].vlan) {
 203         if (nd_table[0].model == NULL
 204             || strcmp(nd_table[0].model, "ne2k_isa") == 0) {
 205             isa_ne2000_init(0x300, 9, &nd_table[0]);
 206         } else {
 207             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
 208             exit (1);
 209         }
 210     }
 211
 212     for(i = 0; i < 2; i++)
 213         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 214                      bs_table[2 * i], bs_table[2 * i + 1]);
 215 }
 216
 217 QEMUMachine mips_machine = {
 218     "mips",
 219     "mips r4k platform",
 220     mips_r4k_init,
 221 };