hw/misc/omap_l4.c

   1 /*
   2  * TI OMAP L4 interconnect emulation.
   3  *
   4  * Copyright (C) 2007-2009 Nokia Corporation
   5  * Written by Andrzej Zaborowski <andrew@openedhand.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 or
  10  * (at your option) any later version of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #include "qemu/osdep.h"
  21 #include "hw/arm/omap.h"
  22
  23 struct omap_l4_s {
  24     MemoryRegion *address_space;
  25     hwaddr base;
  26     int ta_num;
  27     struct omap_target_agent_s ta[];
  28 };
  29
  30 struct omap_l4_s *omap_l4_init(MemoryRegion *address_space,
  31                                hwaddr base, int ta_num)
  32 {
  33     struct omap_l4_s *bus = g_malloc0(
  34                     sizeof(*bus) + ta_num * sizeof(*bus->ta));
  35
  36     bus->address_space = address_space;
  37     bus->ta_num = ta_num;
  38     bus->base = base;
  39
  40     return bus;
  41 }
  42
  43 hwaddr omap_l4_region_base(struct omap_target_agent_s *ta,
  44                                        int region)
  45 {
  46     return ta->bus->base + ta->start[region].offset;
  47 }
  48
  49 hwaddr omap_l4_region_size(struct omap_target_agent_s *ta,
  50                                        int region)
  51 {
  52     return ta->start[region].size;
  53 }
  54
  55 static uint64_t omap_l4ta_read(void *opaque, hwaddr addr, unsigned size)
  56 {
  57     struct omap_target_agent_s *s = opaque;
  58
  59     if (size != 2) {
  60         return omap_badwidth_read16(opaque, addr);
  61     }
  62
  63     switch (addr) {
  64     case 0x00:  /* COMPONENT */
  65         return s->component;
  66
  67     case 0x20:  /* AGENT_CONTROL */
  68         return s->control;
  69
  70     case 0x28:  /* AGENT_STATUS */
  71         return s->status;
  72     }
  73
  74     OMAP_BAD_REG(addr);
  75     return 0;
  76 }
  77
  78 static void omap_l4ta_write(void *opaque, hwaddr addr,
  79                             uint64_t value, unsigned size)
  80 {
  81     struct omap_target_agent_s *s = opaque;
  82
  83     if (size != 4) {
  84         omap_badwidth_write32(opaque, addr, value);
  85         return;
  86     }
  87
  88     switch (addr) {
  89     case 0x00:  /* COMPONENT */
  90     case 0x28:  /* AGENT_STATUS */
  91         OMAP_RO_REG(addr);
  92         break;
  93
  94     case 0x20:  /* AGENT_CONTROL */
  95         s->control = value & 0x01000700;
  96         if (value & 1)                                  /* OCP_RESET */
  97             s->status &= ~1;                            /* REQ_TIMEOUT */
  98         break;
  99
 100     default:
 101         OMAP_BAD_REG(addr);
 102     }
 103 }
 104
 105 static const MemoryRegionOps omap_l4ta_ops = {
 106     .read = omap_l4ta_read,
 107     .write = omap_l4ta_write,
 108     .endianness = DEVICE_NATIVE_ENDIAN,
 109 };
 110
 111 struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
 112         const struct omap_l4_region_s *regions,
 113         const struct omap_l4_agent_info_s *agents,
 114         int cs)
 115 {
 116     int i;
 117     struct omap_target_agent_s *ta = NULL;
 118     const struct omap_l4_agent_info_s *info = NULL;
 119
 120     for (i = 0; i < bus->ta_num; i ++)
 121         if (agents[i].ta == cs) {
 122             ta = &bus->ta[i];
 123             info = &agents[i];
 124             break;
 125         }
 126     if (!ta) {
 127         fprintf(stderr, "%s: bad target agent (%i)\n", __func__, cs);
 128         exit(-1);
 129     }
 130
 131     ta->bus = bus;
 132     ta->start = &regions[info->region];
 133     ta->regions = info->regions;
 134
 135     ta->component = ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
 136     ta->status = 0x00000000;
 137     ta->control = 0x00000200;   /* XXX 01000200 for L4TAO */
 138
 139     memory_region_init_io(&ta->iomem, NULL, &omap_l4ta_ops, ta, "omap.l4ta",
 140                           omap_l4_region_size(ta, info->ta_region));
 141     omap_l4_attach(ta, info->ta_region, &ta->iomem);
 142
 143     return ta;
 144 }
 145
 146 hwaddr omap_l4_attach(struct omap_target_agent_s *ta,
 147                                          int region, MemoryRegion *mr)
 148 {
 149     hwaddr base;
 150
 151     if (region < 0 || region >= ta->regions) {
 152         fprintf(stderr, "%s: bad io region (%i)\n", __func__, region);
 153         exit(-1);
 154     }
 155
 156     base = ta->bus->base + ta->start[region].offset;
 157     if (mr) {
 158         memory_region_add_subregion(ta->bus->address_space, base, mr);
 159     }
 160
 161     return base;
 162 }