]> git.proxmox.com Git - mirror_qemu.git/blob - hw/misc/pci-testdev.c
Merge remote-tracking branch 'qemu-kvm/uq/master' into stable-1.5
[mirror_qemu.git] / hw / misc / pci-testdev.c
1 /*
2 * QEMU PCI test device
3 *
4 * Copyright (c) 2012 Red Hat Inc.
5 * Author: Michael S. Tsirkin <mst@redhat.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 */
20 #include "hw/hw.h"
21 #include "hw/pci/pci.h"
22 #include "qemu/event_notifier.h"
23 #include "qemu/osdep.h"
24
25 typedef struct PCITestDevHdr {
26 uint8_t test;
27 uint8_t width;
28 uint8_t pad0[2];
29 uint32_t offset;
30 uint8_t data;
31 uint8_t pad1[3];
32 uint32_t count;
33 uint8_t name[];
34 } PCITestDevHdr;
35
36 typedef struct IOTest {
37 MemoryRegion *mr;
38 EventNotifier notifier;
39 bool hasnotifier;
40 unsigned size;
41 bool match_data;
42 PCITestDevHdr *hdr;
43 unsigned bufsize;
44 } IOTest;
45
46 #define IOTEST_DATAMATCH 0xFA
47 #define IOTEST_NOMATCH 0xCE
48
49 #define IOTEST_IOSIZE 128
50 #define IOTEST_MEMSIZE 2048
51
52 static const char *iotest_test[] = {
53 "no-eventfd",
54 "wildcard-eventfd",
55 "datamatch-eventfd"
56 };
57
58 static const char *iotest_type[] = {
59 "mmio",
60 "portio"
61 };
62
63 #define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
64 #define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
65 #define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
66 #define IOTEST_MAX_TYPE (ARRAY_SIZE(iotest_type))
67 #define IOTEST_MAX (IOTEST_MAX_TEST * IOTEST_MAX_TYPE)
68
69 enum {
70 IOTEST_ACCESS_NAME,
71 IOTEST_ACCESS_DATA,
72 IOTEST_ACCESS_MAX,
73 };
74
75 #define IOTEST_ACCESS_TYPE uint8_t
76 #define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
77
78 typedef struct PCITestDevState {
79 /*< private >*/
80 PCIDevice parent_obj;
81 /*< public >*/
82
83 MemoryRegion mmio;
84 MemoryRegion portio;
85 IOTest *tests;
86 int current;
87 } PCITestDevState;
88
89 #define TYPE_PCI_TEST_DEV "pci-testdev"
90
91 #define PCI_TEST_DEV(obj) \
92 OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
93
94 #define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
95 #define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
96 #define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
97 #define IOTEST_PCI_BAR(i) (IOTEST_IS_MEM(i) ? PCI_BASE_ADDRESS_SPACE_MEMORY : \
98 PCI_BASE_ADDRESS_SPACE_IO)
99
100 static int pci_testdev_start(IOTest *test)
101 {
102 test->hdr->count = 0;
103 if (!test->hasnotifier) {
104 return 0;
105 }
106 event_notifier_test_and_clear(&test->notifier);
107 memory_region_add_eventfd(test->mr,
108 le32_to_cpu(test->hdr->offset),
109 test->size,
110 test->match_data,
111 test->hdr->data,
112 &test->notifier);
113 return 0;
114 }
115
116 static void pci_testdev_stop(IOTest *test)
117 {
118 if (!test->hasnotifier) {
119 return;
120 }
121 memory_region_del_eventfd(test->mr,
122 le32_to_cpu(test->hdr->offset),
123 test->size,
124 test->match_data,
125 test->hdr->data,
126 &test->notifier);
127 }
128
129 static void
130 pci_testdev_reset(PCITestDevState *d)
131 {
132 if (d->current == -1) {
133 return;
134 }
135 pci_testdev_stop(&d->tests[d->current]);
136 d->current = -1;
137 }
138
139 static void pci_testdev_inc(IOTest *test, unsigned inc)
140 {
141 uint32_t c = le32_to_cpu(test->hdr->count);
142 test->hdr->count = cpu_to_le32(c + inc);
143 }
144
145 static void
146 pci_testdev_write(void *opaque, hwaddr addr, uint64_t val,
147 unsigned size, int type)
148 {
149 PCITestDevState *d = opaque;
150 IOTest *test;
151 int t, r;
152
153 if (addr == offsetof(PCITestDevHdr, test)) {
154 pci_testdev_reset(d);
155 if (val >= IOTEST_MAX_TEST) {
156 return;
157 }
158 t = type * IOTEST_MAX_TEST + val;
159 r = pci_testdev_start(&d->tests[t]);
160 if (r < 0) {
161 return;
162 }
163 d->current = t;
164 return;
165 }
166 if (d->current < 0) {
167 return;
168 }
169 test = &d->tests[d->current];
170 if (addr != le32_to_cpu(test->hdr->offset)) {
171 return;
172 }
173 if (test->match_data && test->size != size) {
174 return;
175 }
176 if (test->match_data && val != test->hdr->data) {
177 return;
178 }
179 pci_testdev_inc(test, 1);
180 }
181
182 static uint64_t
183 pci_testdev_read(void *opaque, hwaddr addr, unsigned size)
184 {
185 PCITestDevState *d = opaque;
186 const char *buf;
187 IOTest *test;
188 if (d->current < 0) {
189 return 0;
190 }
191 test = &d->tests[d->current];
192 buf = (const char *)test->hdr;
193 if (addr + size >= test->bufsize) {
194 return 0;
195 }
196 if (test->hasnotifier) {
197 event_notifier_test_and_clear(&test->notifier);
198 }
199 return buf[addr];
200 }
201
202 static void
203 pci_testdev_mmio_write(void *opaque, hwaddr addr, uint64_t val,
204 unsigned size)
205 {
206 pci_testdev_write(opaque, addr, val, size, 0);
207 }
208
209 static void
210 pci_testdev_pio_write(void *opaque, hwaddr addr, uint64_t val,
211 unsigned size)
212 {
213 pci_testdev_write(opaque, addr, val, size, 1);
214 }
215
216 static const MemoryRegionOps pci_testdev_mmio_ops = {
217 .read = pci_testdev_read,
218 .write = pci_testdev_mmio_write,
219 .endianness = DEVICE_LITTLE_ENDIAN,
220 .impl = {
221 .min_access_size = 1,
222 .max_access_size = 1,
223 },
224 };
225
226 static const MemoryRegionOps pci_testdev_pio_ops = {
227 .read = pci_testdev_read,
228 .write = pci_testdev_pio_write,
229 .endianness = DEVICE_LITTLE_ENDIAN,
230 .impl = {
231 .min_access_size = 1,
232 .max_access_size = 1,
233 },
234 };
235
236 static int pci_testdev_init(PCIDevice *pci_dev)
237 {
238 PCITestDevState *d = PCI_TEST_DEV(pci_dev);
239 uint8_t *pci_conf;
240 char *name;
241 int r, i;
242
243 pci_conf = pci_dev->config;
244
245 pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
246
247 memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
248 "pci-testdev-mmio", IOTEST_MEMSIZE * 2);
249 memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
250 "pci-testdev-portio", IOTEST_IOSIZE * 2);
251 pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
252 pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
253
254 d->current = -1;
255 d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
256 for (i = 0; i < IOTEST_MAX; ++i) {
257 IOTest *test = &d->tests[i];
258 name = g_strdup_printf("%s-%s", IOTEST_TYPE(i), IOTEST_TEST(i));
259 test->bufsize = sizeof(PCITestDevHdr) + strlen(name) + 1;
260 test->hdr = g_malloc0(test->bufsize);
261 memcpy(test->hdr->name, name, strlen(name) + 1);
262 g_free(name);
263 test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
264 test->size = IOTEST_ACCESS_WIDTH;
265 test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
266 test->hdr->test = i;
267 test->hdr->data = test->match_data ? IOTEST_DATAMATCH : IOTEST_NOMATCH;
268 test->hdr->width = IOTEST_ACCESS_WIDTH;
269 test->mr = IOTEST_REGION(d, i);
270 if (!strcmp(IOTEST_TEST(i), "no-eventfd")) {
271 test->hasnotifier = false;
272 continue;
273 }
274 r = event_notifier_init(&test->notifier, 0);
275 assert(r >= 0);
276 test->hasnotifier = true;
277 }
278
279 return 0;
280 }
281
282 static void
283 pci_testdev_uninit(PCIDevice *dev)
284 {
285 PCITestDevState *d = PCI_TEST_DEV(dev);
286 int i;
287
288 pci_testdev_reset(d);
289 for (i = 0; i < IOTEST_MAX; ++i) {
290 if (d->tests[i].hasnotifier) {
291 event_notifier_cleanup(&d->tests[i].notifier);
292 }
293 g_free(d->tests[i].hdr);
294 }
295 g_free(d->tests);
296 memory_region_destroy(&d->mmio);
297 memory_region_destroy(&d->portio);
298 }
299
300 static void qdev_pci_testdev_reset(DeviceState *dev)
301 {
302 PCITestDevState *d = PCI_TEST_DEV(dev);
303 pci_testdev_reset(d);
304 }
305
306 static void pci_testdev_class_init(ObjectClass *klass, void *data)
307 {
308 DeviceClass *dc = DEVICE_CLASS(klass);
309 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
310
311 k->init = pci_testdev_init;
312 k->exit = pci_testdev_uninit;
313 k->vendor_id = PCI_VENDOR_ID_REDHAT;
314 k->device_id = PCI_DEVICE_ID_REDHAT_TEST;
315 k->revision = 0x00;
316 k->class_id = PCI_CLASS_OTHERS;
317 dc->desc = "PCI Test Device";
318 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
319 dc->reset = qdev_pci_testdev_reset;
320 }
321
322 static const TypeInfo pci_testdev_info = {
323 .name = TYPE_PCI_TEST_DEV,
324 .parent = TYPE_PCI_DEVICE,
325 .instance_size = sizeof(PCITestDevState),
326 .class_init = pci_testdev_class_init,
327 };
328
329 static void pci_testdev_register_types(void)
330 {
331 type_register_static(&pci_testdev_info);
332 }
333
334 type_init(pci_testdev_register_types)