hw/net/rocker/rocker_hw.h

   1 /*
   2  * Rocker switch hardware register and descriptor definitions.
   3  *
   4  * Copyright (c) 2014 Scott Feldman <sfeldma@gmail.com>
   5  * Copyright (c) 2014 Jiri Pirko <jiri@resnulli.us>
   6  *
   7  */
   8
   9 #ifndef _ROCKER_HW_
  10 #define _ROCKER_HW_
  11
  12 #define __le16 uint16_t
  13 #define __le32 uint32_t
  14 #define __le64 uint64_t
  15
  16 /*
  17  * Return codes
  18  */
  19
  20 enum {
  21     ROCKER_OK = 0,
  22     ROCKER_ENOENT = 2,
  23     ROCKER_ENXIO = 6,
  24     ROCKER_ENOMEM = 12,
  25     ROCKER_EEXIST = 17,
  26     ROCKER_EINVAL = 22,
  27     ROCKER_EMSGSIZE = 90,
  28     ROCKER_ENOTSUP = 95,
  29     ROCKER_ENOBUFS = 105,
  30 };
  31
  32 /*
  33  * PCI configuration space
  34  */
  35
  36 #define ROCKER_PCI_REVISION             0x1
  37 #define ROCKER_PCI_BAR0_IDX             0
  38 #define ROCKER_PCI_BAR0_SIZE            0x2000
  39 #define ROCKER_PCI_MSIX_BAR_IDX         1
  40 #define ROCKER_PCI_MSIX_BAR_SIZE        0x2000
  41 #define ROCKER_PCI_MSIX_TABLE_OFFSET    0x0000
  42 #define ROCKER_PCI_MSIX_PBA_OFFSET      0x1000
  43
  44 /*
  45  * MSI-X vectors
  46  */
  47
  48 enum {
  49     ROCKER_MSIX_VEC_CMD,
  50     ROCKER_MSIX_VEC_EVENT,
  51     ROCKER_MSIX_VEC_TEST,
  52     ROCKER_MSIX_VEC_RESERVED0,
  53     __ROCKER_MSIX_VEC_TX,
  54     __ROCKER_MSIX_VEC_RX,
  55 #define ROCKER_MSIX_VEC_TX(port) \
  56                 (__ROCKER_MSIX_VEC_TX + ((port) * 2))
  57 #define ROCKER_MSIX_VEC_RX(port) \
  58                 (__ROCKER_MSIX_VEC_RX + ((port) * 2))
  59 #define ROCKER_MSIX_VEC_COUNT(portcnt) \
  60                 (ROCKER_MSIX_VEC_RX((portcnt) - 1) + 1)
  61 };
  62
  63 /*
  64  * Rocker bogus registers
  65  */
  66 #define ROCKER_BOGUS_REG0               0x0000
  67 #define ROCKER_BOGUS_REG1               0x0004
  68 #define ROCKER_BOGUS_REG2               0x0008
  69 #define ROCKER_BOGUS_REG3               0x000c
  70
  71 /*
  72  * Rocker test registers
  73  */
  74 #define ROCKER_TEST_REG                 0x0010
  75 #define ROCKER_TEST_REG64               0x0018  /* 8-byte */
  76 #define ROCKER_TEST_IRQ                 0x0020
  77 #define ROCKER_TEST_DMA_ADDR            0x0028  /* 8-byte */
  78 #define ROCKER_TEST_DMA_SIZE            0x0030
  79 #define ROCKER_TEST_DMA_CTRL            0x0034
  80
  81 /*
  82  * Rocker test register ctrl
  83  */
  84 #define ROCKER_TEST_DMA_CTRL_CLEAR      (1 << 0)
  85 #define ROCKER_TEST_DMA_CTRL_FILL       (1 << 1)
  86 #define ROCKER_TEST_DMA_CTRL_INVERT     (1 << 2)
  87
  88 /*
  89  * Rocker DMA ring register offsets
  90  */
  91 #define ROCKER_DMA_DESC_BASE            0x1000
  92 #define ROCKER_DMA_DESC_SIZE            32
  93 #define ROCKER_DMA_DESC_MASK            0x1F
  94 #define ROCKER_DMA_DESC_TOTAL_SIZE \
  95     (ROCKER_DMA_DESC_SIZE * 64) /* 62 ports + event + cmd */
  96 #define ROCKER_DMA_DESC_ADDR_OFFSET     0x00     /* 8-byte */
  97 #define ROCKER_DMA_DESC_SIZE_OFFSET     0x08
  98 #define ROCKER_DMA_DESC_HEAD_OFFSET     0x0c
  99 #define ROCKER_DMA_DESC_TAIL_OFFSET     0x10
 100 #define ROCKER_DMA_DESC_CTRL_OFFSET     0x14
 101 #define ROCKER_DMA_DESC_CREDITS_OFFSET  0x18
 102 #define ROCKER_DMA_DESC_RSVD_OFFSET     0x1c
 103
 104 /*
 105  * Rocker dma ctrl register bits
 106  */
 107 #define ROCKER_DMA_DESC_CTRL_RESET      (1 << 0)
 108
 109 /*
 110  * Rocker ring indices
 111  */
 112 #define ROCKER_RING_CMD                 0
 113 #define ROCKER_RING_EVENT               1
 114
 115 /*
 116  * Helper macro to do convert a dma ring register
 117  * to its index.  Based on the fact that the register
 118  * group stride is 32 bytes.
 119  */
 120 #define ROCKER_RING_INDEX(reg) ((reg >> 5) & 0x7F)
 121
 122 /*
 123  * Rocker DMA Descriptor
 124  */
 125
 126 typedef struct rocker_desc {
 127     __le64 buf_addr;
 128     uint64_t cookie;
 129     __le16 buf_size;
 130     __le16 tlv_size;
 131     __le16 rsvd[5];   /* pad to 32 bytes */
 132     __le16 comp_err;
 133 } __attribute__((packed, aligned(8))) RockerDesc;
 134
 135 /*
 136  * Rocker TLV type fields
 137  */
 138
 139 typedef struct rocker_tlv {
 140     __le32 type;
 141     __le16 len;
 142     __le16 rsvd;
 143 } __attribute__((packed, aligned(8))) RockerTlv;
 144
 145 /* cmd msg */
 146 enum {
 147     ROCKER_TLV_CMD_UNSPEC,
 148     ROCKER_TLV_CMD_TYPE,                /* u16 */
 149     ROCKER_TLV_CMD_INFO,                /* nest */
 150
 151     __ROCKER_TLV_CMD_MAX,
 152     ROCKER_TLV_CMD_MAX = __ROCKER_TLV_CMD_MAX - 1,
 153 };
 154
 155 enum {
 156     ROCKER_TLV_CMD_TYPE_UNSPEC,
 157     ROCKER_TLV_CMD_TYPE_GET_PORT_SETTINGS,
 158     ROCKER_TLV_CMD_TYPE_SET_PORT_SETTINGS,
 159     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_ADD,
 160     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_MOD,
 161     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_DEL,
 162     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_GET_STATS,
 163     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_ADD,
 164     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_MOD,
 165     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_DEL,
 166     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_GET_STATS,
 167
 168     __ROCKER_TLV_CMD_TYPE_MAX,
 169     ROCKER_TLV_CMD_TYPE_MAX = __ROCKER_TLV_CMD_TYPE_MAX - 1,
 170 };
 171
 172 /* cmd info nested for set/get port settings */
 173 enum {
 174     ROCKER_TLV_CMD_PORT_SETTINGS_UNSPEC,
 175     ROCKER_TLV_CMD_PORT_SETTINGS_PPORT,         /* u32 */
 176     ROCKER_TLV_CMD_PORT_SETTINGS_SPEED,         /* u32 */
 177     ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX,        /* u8 */
 178     ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG,       /* u8 */
 179     ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR,       /* binary */
 180     ROCKER_TLV_CMD_PORT_SETTINGS_MODE,          /* u8 */
 181     ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING,      /* u8 */
 182
 183     __ROCKER_TLV_CMD_PORT_SETTINGS_MAX,
 184     ROCKER_TLV_CMD_PORT_SETTINGS_MAX = __ROCKER_TLV_CMD_PORT_SETTINGS_MAX - 1,
 185 };
 186
 187 enum {
 188     ROCKER_PORT_MODE_OF_DPA,
 189 };
 190
 191 /* event msg */
 192 enum {
 193     ROCKER_TLV_EVENT_UNSPEC,
 194     ROCKER_TLV_EVENT_TYPE,              /* u16 */
 195     ROCKER_TLV_EVENT_INFO,              /* nest */
 196
 197     __ROCKER_TLV_EVENT_MAX,
 198     ROCKER_TLV_EVENT_MAX = __ROCKER_TLV_EVENT_MAX - 1,
 199 };
 200
 201 enum {
 202     ROCKER_TLV_EVENT_TYPE_UNSPEC,
 203     ROCKER_TLV_EVENT_TYPE_LINK_CHANGED,
 204     ROCKER_TLV_EVENT_TYPE_MAC_VLAN_SEEN,
 205
 206     __ROCKER_TLV_EVENT_TYPE_MAX,
 207     ROCKER_TLV_EVENT_TYPE_MAX = __ROCKER_TLV_EVENT_TYPE_MAX - 1,
 208 };
 209
 210 /* event info nested for link changed */
 211 enum {
 212     ROCKER_TLV_EVENT_LINK_CHANGED_UNSPEC,
 213     ROCKER_TLV_EVENT_LINK_CHANGED_PPORT,    /* u32 */
 214     ROCKER_TLV_EVENT_LINK_CHANGED_LINKUP,   /* u8 */
 215
 216     __ROCKER_TLV_EVENT_LINK_CHANGED_MAX,
 217     ROCKER_TLV_EVENT_LINK_CHANGED_MAX = __ROCKER_TLV_EVENT_LINK_CHANGED_MAX - 1,
 218 };
 219
 220 /* event info nested for MAC/VLAN */
 221 enum {
 222     ROCKER_TLV_EVENT_MAC_VLAN_UNSPEC,
 223     ROCKER_TLV_EVENT_MAC_VLAN_PPORT,        /* u32 */
 224     ROCKER_TLV_EVENT_MAC_VLAN_MAC,          /* binary */
 225     ROCKER_TLV_EVENT_MAC_VLAN_VLAN_ID,      /* __be16 */
 226
 227     __ROCKER_TLV_EVENT_MAC_VLAN_MAX,
 228     ROCKER_TLV_EVENT_MAC_VLAN_MAX = __ROCKER_TLV_EVENT_MAC_VLAN_MAX - 1,
 229 };
 230
 231 /* Rx msg */
 232 enum {
 233     ROCKER_TLV_RX_UNSPEC,
 234     ROCKER_TLV_RX_FLAGS,                /* u16, see RX_FLAGS_ */
 235     ROCKER_TLV_RX_CSUM,                 /* u16 */
 236     ROCKER_TLV_RX_FRAG_ADDR,            /* u64 */
 237     ROCKER_TLV_RX_FRAG_MAX_LEN,         /* u16 */
 238     ROCKER_TLV_RX_FRAG_LEN,             /* u16 */
 239
 240     __ROCKER_TLV_RX_MAX,
 241     ROCKER_TLV_RX_MAX = __ROCKER_TLV_RX_MAX - 1,
 242 };
 243
 244 #define ROCKER_RX_FLAGS_IPV4                    (1 << 0)
 245 #define ROCKER_RX_FLAGS_IPV6                    (1 << 1)
 246 #define ROCKER_RX_FLAGS_CSUM_CALC               (1 << 2)
 247 #define ROCKER_RX_FLAGS_IPV4_CSUM_GOOD          (1 << 3)
 248 #define ROCKER_RX_FLAGS_IP_FRAG                 (1 << 4)
 249 #define ROCKER_RX_FLAGS_TCP                     (1 << 5)
 250 #define ROCKER_RX_FLAGS_UDP                     (1 << 6)
 251 #define ROCKER_RX_FLAGS_TCP_UDP_CSUM_GOOD       (1 << 7)
 252
 253 /* Tx msg */
 254 enum {
 255     ROCKER_TLV_TX_UNSPEC,
 256     ROCKER_TLV_TX_OFFLOAD,              /* u8, see TX_OFFLOAD_ */
 257     ROCKER_TLV_TX_L3_CSUM_OFF,          /* u16 */
 258     ROCKER_TLV_TX_TSO_MSS,              /* u16 */
 259     ROCKER_TLV_TX_TSO_HDR_LEN,          /* u16 */
 260     ROCKER_TLV_TX_FRAGS,                /* array */
 261
 262     __ROCKER_TLV_TX_MAX,
 263     ROCKER_TLV_TX_MAX = __ROCKER_TLV_TX_MAX - 1,
 264 };
 265
 266 #define ROCKER_TX_OFFLOAD_NONE          0
 267 #define ROCKER_TX_OFFLOAD_IP_CSUM       1
 268 #define ROCKER_TX_OFFLOAD_TCP_UDP_CSUM  2
 269 #define ROCKER_TX_OFFLOAD_L3_CSUM       3
 270 #define ROCKER_TX_OFFLOAD_TSO           4
 271
 272 #define ROCKER_TX_FRAGS_MAX             16
 273
 274 enum {
 275     ROCKER_TLV_TX_FRAG_UNSPEC,
 276     ROCKER_TLV_TX_FRAG,                 /* nest */
 277
 278     __ROCKER_TLV_TX_FRAG_MAX,
 279     ROCKER_TLV_TX_FRAG_MAX = __ROCKER_TLV_TX_FRAG_MAX - 1,
 280 };
 281
 282 enum {
 283     ROCKER_TLV_TX_FRAG_ATTR_UNSPEC,
 284     ROCKER_TLV_TX_FRAG_ATTR_ADDR,       /* u64 */
 285     ROCKER_TLV_TX_FRAG_ATTR_LEN,        /* u16 */
 286
 287     __ROCKER_TLV_TX_FRAG_ATTR_MAX,
 288     ROCKER_TLV_TX_FRAG_ATTR_MAX = __ROCKER_TLV_TX_FRAG_ATTR_MAX - 1,
 289 };
 290
 291 /*
 292  * cmd info nested for OF-DPA msgs
 293  */
 294
 295 enum {
 296     ROCKER_TLV_OF_DPA_UNSPEC,
 297     ROCKER_TLV_OF_DPA_TABLE_ID,            /* u16 */
 298     ROCKER_TLV_OF_DPA_PRIORITY,            /* u32 */
 299     ROCKER_TLV_OF_DPA_HARDTIME,            /* u32 */
 300     ROCKER_TLV_OF_DPA_IDLETIME,            /* u32 */
 301     ROCKER_TLV_OF_DPA_COOKIE,              /* u64 */
 302     ROCKER_TLV_OF_DPA_IN_PPORT,            /* u32 */
 303     ROCKER_TLV_OF_DPA_IN_PPORT_MASK,       /* u32 */
 304     ROCKER_TLV_OF_DPA_OUT_PPORT,           /* u32 */
 305     ROCKER_TLV_OF_DPA_GOTO_TABLE_ID,       /* u16 */
 306     ROCKER_TLV_OF_DPA_GROUP_ID,            /* u32 */
 307     ROCKER_TLV_OF_DPA_GROUP_ID_LOWER,      /* u32 */
 308     ROCKER_TLV_OF_DPA_GROUP_COUNT,         /* u16 */
 309     ROCKER_TLV_OF_DPA_GROUP_IDS,           /* u32 array */
 310     ROCKER_TLV_OF_DPA_VLAN_ID,             /* __be16 */
 311     ROCKER_TLV_OF_DPA_VLAN_ID_MASK,        /* __be16 */
 312     ROCKER_TLV_OF_DPA_VLAN_PCP,            /* __be16 */
 313     ROCKER_TLV_OF_DPA_VLAN_PCP_MASK,       /* __be16 */
 314     ROCKER_TLV_OF_DPA_VLAN_PCP_ACTION,     /* u8 */
 315     ROCKER_TLV_OF_DPA_NEW_VLAN_ID,         /* __be16 */
 316     ROCKER_TLV_OF_DPA_NEW_VLAN_PCP,        /* u8 */
 317     ROCKER_TLV_OF_DPA_TUNNEL_ID,           /* u32 */
 318     ROCKER_TLV_OF_DPA_TUNNEL_LPORT,        /* u32 */
 319     ROCKER_TLV_OF_DPA_ETHERTYPE,           /* __be16 */
 320     ROCKER_TLV_OF_DPA_DST_MAC,             /* binary */
 321     ROCKER_TLV_OF_DPA_DST_MAC_MASK,        /* binary */
 322     ROCKER_TLV_OF_DPA_SRC_MAC,             /* binary */
 323     ROCKER_TLV_OF_DPA_SRC_MAC_MASK,        /* binary */
 324     ROCKER_TLV_OF_DPA_IP_PROTO,            /* u8 */
 325     ROCKER_TLV_OF_DPA_IP_PROTO_MASK,       /* u8 */
 326     ROCKER_TLV_OF_DPA_IP_DSCP,             /* u8 */
 327     ROCKER_TLV_OF_DPA_IP_DSCP_MASK,        /* u8 */
 328     ROCKER_TLV_OF_DPA_IP_DSCP_ACTION,      /* u8 */
 329     ROCKER_TLV_OF_DPA_NEW_IP_DSCP,         /* u8 */
 330     ROCKER_TLV_OF_DPA_IP_ECN,              /* u8 */
 331     ROCKER_TLV_OF_DPA_IP_ECN_MASK,         /* u8 */
 332     ROCKER_TLV_OF_DPA_DST_IP,              /* __be32 */
 333     ROCKER_TLV_OF_DPA_DST_IP_MASK,         /* __be32 */
 334     ROCKER_TLV_OF_DPA_SRC_IP,              /* __be32 */
 335     ROCKER_TLV_OF_DPA_SRC_IP_MASK,         /* __be32 */
 336     ROCKER_TLV_OF_DPA_DST_IPV6,            /* binary */
 337     ROCKER_TLV_OF_DPA_DST_IPV6_MASK,       /* binary */
 338     ROCKER_TLV_OF_DPA_SRC_IPV6,            /* binary */
 339     ROCKER_TLV_OF_DPA_SRC_IPV6_MASK,       /* binary */
 340     ROCKER_TLV_OF_DPA_SRC_ARP_IP,          /* __be32 */
 341     ROCKER_TLV_OF_DPA_SRC_ARP_IP_MASK,     /* __be32 */
 342     ROCKER_TLV_OF_DPA_L4_DST_PORT,         /* __be16 */
 343     ROCKER_TLV_OF_DPA_L4_DST_PORT_MASK,    /* __be16 */
 344     ROCKER_TLV_OF_DPA_L4_SRC_PORT,         /* __be16 */
 345     ROCKER_TLV_OF_DPA_L4_SRC_PORT_MASK,    /* __be16 */
 346     ROCKER_TLV_OF_DPA_ICMP_TYPE,           /* u8 */
 347     ROCKER_TLV_OF_DPA_ICMP_TYPE_MASK,      /* u8 */
 348     ROCKER_TLV_OF_DPA_ICMP_CODE,           /* u8 */
 349     ROCKER_TLV_OF_DPA_ICMP_CODE_MASK,      /* u8 */
 350     ROCKER_TLV_OF_DPA_IPV6_LABEL,          /* __be32 */
 351     ROCKER_TLV_OF_DPA_IPV6_LABEL_MASK,     /* __be32 */
 352     ROCKER_TLV_OF_DPA_QUEUE_ID_ACTION,     /* u8 */
 353     ROCKER_TLV_OF_DPA_NEW_QUEUE_ID,        /* u8 */
 354     ROCKER_TLV_OF_DPA_CLEAR_ACTIONS,       /* u32 */
 355     ROCKER_TLV_OF_DPA_POP_VLAN,            /* u8 */
 356     ROCKER_TLV_OF_DPA_TTL_CHECK,           /* u8 */
 357     ROCKER_TLV_OF_DPA_COPY_CPU_ACTION,     /* u8 */
 358
 359     __ROCKER_TLV_OF_DPA_MAX,
 360     ROCKER_TLV_OF_DPA_MAX = __ROCKER_TLV_OF_DPA_MAX - 1,
 361 };
 362
 363 /*
 364  * OF-DPA table IDs
 365  */
 366
 367 enum rocker_of_dpa_table_id {
 368     ROCKER_OF_DPA_TABLE_ID_INGRESS_PORT = 0,
 369     ROCKER_OF_DPA_TABLE_ID_VLAN = 10,
 370     ROCKER_OF_DPA_TABLE_ID_TERMINATION_MAC = 20,
 371     ROCKER_OF_DPA_TABLE_ID_UNICAST_ROUTING = 30,
 372     ROCKER_OF_DPA_TABLE_ID_MULTICAST_ROUTING = 40,
 373     ROCKER_OF_DPA_TABLE_ID_BRIDGING = 50,
 374     ROCKER_OF_DPA_TABLE_ID_ACL_POLICY = 60,
 375 };
 376
 377 /*
 378  * OF-DPA flow stats
 379  */
 380
 381 enum {
 382     ROCKER_TLV_OF_DPA_FLOW_STAT_UNSPEC,
 383     ROCKER_TLV_OF_DPA_FLOW_STAT_DURATION,    /* u32 */
 384     ROCKER_TLV_OF_DPA_FLOW_STAT_RX_PKTS,     /* u64 */
 385     ROCKER_TLV_OF_DPA_FLOW_STAT_TX_PKTS,     /* u64 */
 386
 387     __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX,
 388     ROCKER_TLV_OF_DPA_FLOW_STAT_MAX = __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX - 1,
 389 };
 390
 391 /*
 392  * OF-DPA group types
 393  */
 394
 395 enum rocker_of_dpa_group_type {
 396     ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE = 0,
 397     ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE,
 398     ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST,
 399     ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST,
 400     ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD,
 401     ROCKER_OF_DPA_GROUP_TYPE_L3_INTERFACE,
 402     ROCKER_OF_DPA_GROUP_TYPE_L3_MCAST,
 403     ROCKER_OF_DPA_GROUP_TYPE_L3_ECMP,
 404     ROCKER_OF_DPA_GROUP_TYPE_L2_OVERLAY,
 405 };
 406
 407 /*
 408  * OF-DPA group L2 overlay types
 409  */
 410
 411 enum rocker_of_dpa_overlay_type {
 412     ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_UCAST = 0,
 413     ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_MCAST,
 414     ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_UCAST,
 415     ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_MCAST,
 416 };
 417
 418 /*
 419  * OF-DPA group ID encoding
 420  */
 421
 422 #define ROCKER_GROUP_TYPE_SHIFT 28
 423 #define ROCKER_GROUP_TYPE_MASK 0xf0000000
 424 #define ROCKER_GROUP_VLAN_ID_SHIFT 16
 425 #define ROCKER_GROUP_VLAN_ID_MASK 0x0fff0000
 426 #define ROCKER_GROUP_PORT_SHIFT 0
 427 #define ROCKER_GROUP_PORT_MASK 0x0000ffff
 428 #define ROCKER_GROUP_TUNNEL_ID_SHIFT 12
 429 #define ROCKER_GROUP_TUNNEL_ID_MASK 0x0ffff000
 430 #define ROCKER_GROUP_SUBTYPE_SHIFT 10
 431 #define ROCKER_GROUP_SUBTYPE_MASK 0x00000c00
 432 #define ROCKER_GROUP_INDEX_SHIFT 0
 433 #define ROCKER_GROUP_INDEX_MASK 0x0000ffff
 434 #define ROCKER_GROUP_INDEX_LONG_SHIFT 0
 435 #define ROCKER_GROUP_INDEX_LONG_MASK 0x0fffffff
 436
 437 #define ROCKER_GROUP_TYPE_GET(group_id) \
 438     (((group_id) & ROCKER_GROUP_TYPE_MASK) >> ROCKER_GROUP_TYPE_SHIFT)
 439 #define ROCKER_GROUP_TYPE_SET(type) \
 440     (((type) << ROCKER_GROUP_TYPE_SHIFT) & ROCKER_GROUP_TYPE_MASK)
 441 #define ROCKER_GROUP_VLAN_GET(group_id) \
 442     (((group_id) & ROCKER_GROUP_VLAN_ID_MASK) >> ROCKER_GROUP_VLAN_ID_SHIFT)
 443 #define ROCKER_GROUP_VLAN_SET(vlan_id) \
 444     (((vlan_id) << ROCKER_GROUP_VLAN_ID_SHIFT) & ROCKER_GROUP_VLAN_ID_MASK)
 445 #define ROCKER_GROUP_PORT_GET(group_id) \
 446     (((group_id) & ROCKER_GROUP_PORT_MASK) >> ROCKER_GROUP_PORT_SHIFT)
 447 #define ROCKER_GROUP_PORT_SET(port) \
 448     (((port) << ROCKER_GROUP_PORT_SHIFT) & ROCKER_GROUP_PORT_MASK)
 449 #define ROCKER_GROUP_INDEX_GET(group_id) \
 450     (((group_id) & ROCKER_GROUP_INDEX_MASK) >> ROCKER_GROUP_INDEX_SHIFT)
 451 #define ROCKER_GROUP_INDEX_SET(index) \
 452     (((index) << ROCKER_GROUP_INDEX_SHIFT) & ROCKER_GROUP_INDEX_MASK)
 453 #define ROCKER_GROUP_INDEX_LONG_GET(group_id) \
 454     (((group_id) & ROCKER_GROUP_INDEX_LONG_MASK) >> \
 455      ROCKER_GROUP_INDEX_LONG_SHIFT)
 456 #define ROCKER_GROUP_INDEX_LONG_SET(index) \
 457     (((index) << ROCKER_GROUP_INDEX_LONG_SHIFT) & \
 458      ROCKER_GROUP_INDEX_LONG_MASK)
 459
 460 #define ROCKER_GROUP_NONE 0
 461 #define ROCKER_GROUP_L2_INTERFACE(vlan_id, port) \
 462     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE) |\
 463      ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_PORT_SET(port))
 464 #define ROCKER_GROUP_L2_REWRITE(index) \
 465     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE) |\
 466      ROCKER_GROUP_INDEX_LONG_SET(index))
 467 #define ROCKER_GROUP_L2_MCAST(vlan_id, index) \
 468     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST) |\
 469      ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
 470 #define ROCKER_GROUP_L2_FLOOD(vlan_id, index) \
 471     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD) |\
 472      ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
 473 #define ROCKER_GROUP_L3_UNICAST(index) \
 474     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST) |\
 475      ROCKER_GROUP_INDEX_LONG_SET(index))
 476
 477 /*
 478  * Rocker general purpose registers
 479  */
 480 #define ROCKER_CONTROL                  0x0300
 481 #define ROCKER_PORT_PHYS_COUNT          0x0304
 482 #define ROCKER_PORT_PHYS_LINK_STATUS    0x0310 /* 8-byte */
 483 #define ROCKER_PORT_PHYS_ENABLE         0x0318 /* 8-byte */
 484 #define ROCKER_SWITCH_ID                0x0320 /* 8-byte */
 485
 486 /*
 487  * Rocker control bits
 488  */
 489 #define ROCKER_CONTROL_RESET            (1 << 0)
 490
 491 #endif /* _ROCKER_HW_ */