hw/net/vmxnet3_defs.h

   1 /*
   2  * QEMU VMWARE VMXNET3 paravirtual NIC
   3  *
   4  * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
   5  *
   6  * Developed by Daynix Computing LTD (http://www.daynix.com)
   7  *
   8  * Authors:
   9  * Dmitry Fleytman <dmitry@daynix.com>
  10  * Tamir Shomer <tamirs@daynix.com>
  11  * Yan Vugenfirer <yan@daynix.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.
  14  * See the COPYING file in the top-level directory.
  15  */
  16
  17 #ifndef HW_NET_VMXNET3_DEFS_H
  18 #define HW_NET_VMXNET3_DEFS_H
  19
  20 #include "net/net.h"
  21 #include "hw/net/vmxnet3.h"
  22 #include "qom/object.h"
  23
  24 #define TYPE_VMXNET3 "vmxnet3"
  25 typedef struct VMXNET3State VMXNET3State;
  26 #define VMXNET3(obj) OBJECT_CHECK(VMXNET3State, (obj), TYPE_VMXNET3)
  27
  28 /* Device state and helper functions */
  29 #define VMXNET3_RX_RINGS_PER_QUEUE (2)
  30
  31 /* Cyclic ring abstraction */
  32 typedef struct {
  33     hwaddr pa;
  34     uint32_t size;
  35     uint32_t cell_size;
  36     uint32_t next;
  37     uint8_t gen;
  38 } Vmxnet3Ring;
  39
  40 typedef struct {
  41     Vmxnet3Ring tx_ring;
  42     Vmxnet3Ring comp_ring;
  43
  44     uint8_t intr_idx;
  45     hwaddr tx_stats_pa;
  46     struct UPT1_TxStats txq_stats;
  47 } Vmxnet3TxqDescr;
  48
  49 typedef struct {
  50     Vmxnet3Ring rx_ring[VMXNET3_RX_RINGS_PER_QUEUE];
  51     Vmxnet3Ring comp_ring;
  52     uint8_t intr_idx;
  53     hwaddr rx_stats_pa;
  54     struct UPT1_RxStats rxq_stats;
  55 } Vmxnet3RxqDescr;
  56
  57 typedef struct {
  58     bool is_masked;
  59     bool is_pending;
  60     bool is_asserted;
  61 } Vmxnet3IntState;
  62
  63 struct VMXNET3State {
  64         PCIDevice parent_obj;
  65         NICState *nic;
  66         NICConf conf;
  67         MemoryRegion bar0;
  68         MemoryRegion bar1;
  69         MemoryRegion msix_bar;
  70
  71         Vmxnet3RxqDescr rxq_descr[VMXNET3_DEVICE_MAX_RX_QUEUES];
  72         Vmxnet3TxqDescr txq_descr[VMXNET3_DEVICE_MAX_TX_QUEUES];
  73
  74         /* Whether MSI-X support was installed successfully */
  75         bool msix_used;
  76         hwaddr drv_shmem;
  77         hwaddr temp_shared_guest_driver_memory;
  78
  79         uint8_t txq_num;
  80
  81         /* This boolean tells whether RX packet being indicated has to */
  82         /* be split into head and body chunks from different RX rings  */
  83         bool rx_packets_compound;
  84
  85         bool rx_vlan_stripping;
  86         bool lro_supported;
  87
  88         uint8_t rxq_num;
  89
  90         /* Network MTU */
  91         uint32_t mtu;
  92
  93         /* Maximum number of fragments for indicated TX packets */
  94         uint32_t max_tx_frags;
  95
  96         /* Maximum number of fragments for indicated RX packets */
  97         uint16_t max_rx_frags;
  98
  99         /* Index for events interrupt */
 100         uint8_t event_int_idx;
 101
 102         /* Whether automatic interrupts masking enabled */
 103         bool auto_int_masking;
 104
 105         bool peer_has_vhdr;
 106
 107         /* TX packets to QEMU interface */
 108         struct NetTxPkt *tx_pkt;
 109         uint32_t offload_mode;
 110         uint32_t cso_or_gso_size;
 111         uint16_t tci;
 112         bool needs_vlan;
 113
 114         struct NetRxPkt *rx_pkt;
 115
 116         bool tx_sop;
 117         bool skip_current_tx_pkt;
 118
 119         uint32_t device_active;
 120         uint32_t last_command;
 121
 122         uint32_t link_status_and_speed;
 123
 124         Vmxnet3IntState interrupt_states[VMXNET3_MAX_INTRS];
 125
 126         uint32_t temp_mac;   /* To store the low part first */
 127
 128         MACAddr perm_mac;
 129         uint32_t vlan_table[VMXNET3_VFT_SIZE];
 130         uint32_t rx_mode;
 131         MACAddr *mcast_list;
 132         uint32_t mcast_list_len;
 133         uint32_t mcast_list_buff_size; /* needed for live migration. */
 134
 135         /* Compatibility flags for migration */
 136         uint32_t compat_flags;
 137 };
 138
 139 #endif