2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu-common.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/dma.h"
29 #include "sysemu/reset.h"
30 #include "hw/boards.h"
31 #include "hw/nvram/fw_cfg.h"
32 #include "hw/qdev-properties.h"
33 #include "hw/sysbus.h"
34 #include "migration/qemu-file-types.h"
35 #include "migration/vmstate.h"
37 #include "qemu/error-report.h"
38 #include "qemu/option.h"
39 #include "qemu/config-file.h"
40 #include "qemu/cutils.h"
41 #include "qapi/error.h"
43 #define FW_CFG_FILE_SLOTS_DFLT 0x20
45 /* FW_CFG_VERSION bits */
46 #define FW_CFG_VERSION 0x01
47 #define FW_CFG_VERSION_DMA 0x02
49 /* FW_CFG_DMA_CONTROL bits */
50 #define FW_CFG_DMA_CTL_ERROR 0x01
51 #define FW_CFG_DMA_CTL_READ 0x02
52 #define FW_CFG_DMA_CTL_SKIP 0x04
53 #define FW_CFG_DMA_CTL_SELECT 0x08
54 #define FW_CFG_DMA_CTL_WRITE 0x10
56 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
62 void *callback_opaque
;
63 FWCfgCallback select_cb
;
64 FWCfgWriteCallback write_cb
;
70 * @key: The uint16 selector key.
72 * Returns: The stringified name if the selector refers to a well-known
73 * numerically defined item, or NULL on key lookup failure.
75 static const char *key_name(uint16_t key
)
77 static const char *fw_cfg_wellknown_keys
[FW_CFG_FILE_FIRST
] = {
78 [FW_CFG_SIGNATURE
] = "signature",
80 [FW_CFG_UUID
] = "uuid",
81 [FW_CFG_RAM_SIZE
] = "ram_size",
82 [FW_CFG_NOGRAPHIC
] = "nographic",
83 [FW_CFG_NB_CPUS
] = "nb_cpus",
84 [FW_CFG_MACHINE_ID
] = "machine_id",
85 [FW_CFG_KERNEL_ADDR
] = "kernel_addr",
86 [FW_CFG_KERNEL_SIZE
] = "kernel_size",
87 [FW_CFG_KERNEL_CMDLINE
] = "kernel_cmdline",
88 [FW_CFG_INITRD_ADDR
] = "initrd_addr",
89 [FW_CFG_INITRD_SIZE
] = "initdr_size",
90 [FW_CFG_BOOT_DEVICE
] = "boot_device",
91 [FW_CFG_NUMA
] = "numa",
92 [FW_CFG_BOOT_MENU
] = "boot_menu",
93 [FW_CFG_MAX_CPUS
] = "max_cpus",
94 [FW_CFG_KERNEL_ENTRY
] = "kernel_entry",
95 [FW_CFG_KERNEL_DATA
] = "kernel_data",
96 [FW_CFG_INITRD_DATA
] = "initrd_data",
97 [FW_CFG_CMDLINE_ADDR
] = "cmdline_addr",
98 [FW_CFG_CMDLINE_SIZE
] = "cmdline_size",
99 [FW_CFG_CMDLINE_DATA
] = "cmdline_data",
100 [FW_CFG_SETUP_ADDR
] = "setup_addr",
101 [FW_CFG_SETUP_SIZE
] = "setup_size",
102 [FW_CFG_SETUP_DATA
] = "setup_data",
103 [FW_CFG_FILE_DIR
] = "file_dir",
106 if (key
& FW_CFG_ARCH_LOCAL
) {
107 return fw_cfg_arch_key_name(key
);
109 if (key
< FW_CFG_FILE_FIRST
) {
110 return fw_cfg_wellknown_keys
[key
];
116 static inline const char *trace_key_name(uint16_t key
)
118 const char *name
= key_name(key
);
120 return name
? name
: "unknown";
126 static char *read_splashfile(char *filename
, gsize
*file_sizep
,
132 unsigned int filehead
;
135 if (!g_file_get_contents(filename
, &content
, file_sizep
, &err
)) {
136 error_report("failed to read splash file '%s': %s",
137 filename
, err
->message
);
142 /* check file size */
143 if (*file_sizep
< 30) {
148 filehead
= lduw_le_p(content
);
149 if (filehead
== 0xd8ff) {
150 file_type
= JPG_FILE
;
151 } else if (filehead
== 0x4d42) {
152 file_type
= BMP_FILE
;
158 if (file_type
== BMP_FILE
) {
159 bmp_bpp
= lduw_le_p(&content
[28]);
166 *file_typep
= file_type
;
171 error_report("splash file '%s' format not recognized; must be JPEG "
172 "or 24 bit BMP", filename
);
177 static void fw_cfg_bootsplash(FWCfgState
*s
)
179 const char *boot_splash_filename
= NULL
;
180 const char *boot_splash_time
= NULL
;
181 char *filename
, *file_data
;
185 /* get user configuration */
186 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
187 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
188 boot_splash_filename
= qemu_opt_get(opts
, "splash");
189 boot_splash_time
= qemu_opt_get(opts
, "splash-time");
191 /* insert splash time if user configurated */
192 if (boot_splash_time
) {
193 int64_t bst_val
= qemu_opt_get_number(opts
, "splash-time", -1);
196 /* validate the input */
197 if (bst_val
< 0 || bst_val
> 0xffff) {
198 error_report("splash-time is invalid,"
199 "it should be a value between 0 and 65535");
202 /* use little endian format */
203 bst_le16
= cpu_to_le16(bst_val
);
204 fw_cfg_add_file(s
, "etc/boot-menu-wait",
205 g_memdup(&bst_le16
, sizeof bst_le16
), sizeof bst_le16
);
208 /* insert splash file if user configurated */
209 if (boot_splash_filename
) {
210 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, boot_splash_filename
);
211 if (filename
== NULL
) {
212 error_report("failed to find file '%s'", boot_splash_filename
);
216 /* loading file data */
217 file_data
= read_splashfile(filename
, &file_size
, &file_type
);
218 if (file_data
== NULL
) {
222 g_free(boot_splash_filedata
);
223 boot_splash_filedata
= (uint8_t *)file_data
;
226 if (file_type
== JPG_FILE
) {
227 fw_cfg_add_file(s
, "bootsplash.jpg",
228 boot_splash_filedata
, file_size
);
230 fw_cfg_add_file(s
, "bootsplash.bmp",
231 boot_splash_filedata
, file_size
);
237 static void fw_cfg_reboot(FWCfgState
*s
)
239 const char *reboot_timeout
= NULL
;
240 uint64_t rt_val
= -1;
243 /* get user configuration */
244 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
245 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
246 reboot_timeout
= qemu_opt_get(opts
, "reboot-timeout");
248 if (reboot_timeout
) {
249 rt_val
= qemu_opt_get_number(opts
, "reboot-timeout", -1);
251 /* validate the input */
252 if (rt_val
> 0xffff && rt_val
!= (uint64_t)-1) {
253 error_report("reboot timeout is invalid,"
254 "it should be a value between -1 and 65535");
259 rt_le32
= cpu_to_le32(rt_val
);
260 fw_cfg_add_file(s
, "etc/boot-fail-wait", g_memdup(&rt_le32
, 4), 4);
263 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
265 /* nothing, write support removed in QEMU v2.4+ */
268 static inline uint16_t fw_cfg_file_slots(const FWCfgState
*s
)
270 return s
->file_slots
;
273 /* Note: this function returns an exclusive limit. */
274 static inline uint32_t fw_cfg_max_entry(const FWCfgState
*s
)
276 return FW_CFG_FILE_FIRST
+ fw_cfg_file_slots(s
);
279 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
285 if ((key
& FW_CFG_ENTRY_MASK
) >= fw_cfg_max_entry(s
)) {
286 s
->cur_entry
= FW_CFG_INVALID
;
291 /* entry successfully selected, now run callback if present */
292 arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
293 e
= &s
->entries
[arch
][key
& FW_CFG_ENTRY_MASK
];
295 e
->select_cb(e
->callback_opaque
);
299 trace_fw_cfg_select(s
, key
, trace_key_name(key
), ret
);
303 static uint64_t fw_cfg_data_read(void *opaque
, hwaddr addr
, unsigned size
)
305 FWCfgState
*s
= opaque
;
306 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
307 FWCfgEntry
*e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
308 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
311 assert(size
> 0 && size
<= sizeof(value
));
312 if (s
->cur_entry
!= FW_CFG_INVALID
&& e
->data
&& s
->cur_offset
< e
->len
) {
313 /* The least significant 'size' bytes of the return value are
314 * expected to contain a string preserving portion of the item
315 * data, padded with zeros on the right in case we run out early.
316 * In technical terms, we're composing the host-endian representation
317 * of the big endian interpretation of the fw_cfg string.
320 value
= (value
<< 8) | e
->data
[s
->cur_offset
++];
321 } while (--size
&& s
->cur_offset
< e
->len
);
322 /* If size is still not zero, we *did* run out early, so continue
323 * left-shifting, to add the appropriate number of padding zeros
329 trace_fw_cfg_read(s
, value
);
333 static void fw_cfg_data_mem_write(void *opaque
, hwaddr addr
,
334 uint64_t value
, unsigned size
)
336 FWCfgState
*s
= opaque
;
340 fw_cfg_write(s
, value
>> (8 * --i
));
344 static void fw_cfg_dma_transfer(FWCfgState
*s
)
350 int read
= 0, write
= 0;
353 /* Reset the address before the next access */
354 dma_addr
= s
->dma_addr
;
357 if (dma_memory_read(s
->dma_as
, dma_addr
, &dma
, sizeof(dma
))) {
358 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
359 FW_CFG_DMA_CTL_ERROR
);
363 dma
.address
= be64_to_cpu(dma
.address
);
364 dma
.length
= be32_to_cpu(dma
.length
);
365 dma
.control
= be32_to_cpu(dma
.control
);
367 if (dma
.control
& FW_CFG_DMA_CTL_SELECT
) {
368 fw_cfg_select(s
, dma
.control
>> 16);
371 arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
372 e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
373 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
375 if (dma
.control
& FW_CFG_DMA_CTL_READ
) {
378 } else if (dma
.control
& FW_CFG_DMA_CTL_WRITE
) {
381 } else if (dma
.control
& FW_CFG_DMA_CTL_SKIP
) {
390 while (dma
.length
> 0 && !(dma
.control
& FW_CFG_DMA_CTL_ERROR
)) {
391 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
||
392 s
->cur_offset
>= e
->len
) {
395 /* If the access is not a read access, it will be a skip access,
399 if (dma_memory_set(s
->dma_as
, dma
.address
, 0, len
)) {
400 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
404 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
407 if (dma
.length
<= (e
->len
- s
->cur_offset
)) {
410 len
= (e
->len
- s
->cur_offset
);
413 /* If the access is not a read access, it will be a skip access,
417 if (dma_memory_write(s
->dma_as
, dma
.address
,
418 &e
->data
[s
->cur_offset
], len
)) {
419 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
423 if (!e
->allow_write
||
425 dma_memory_read(s
->dma_as
, dma
.address
,
426 &e
->data
[s
->cur_offset
], len
)) {
427 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
428 } else if (e
->write_cb
) {
429 e
->write_cb(e
->callback_opaque
, s
->cur_offset
, len
);
433 s
->cur_offset
+= len
;
441 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
444 trace_fw_cfg_read(s
, 0);
447 static uint64_t fw_cfg_dma_mem_read(void *opaque
, hwaddr addr
,
450 /* Return a signature value (and handle various read sizes) */
451 return extract64(FW_CFG_DMA_SIGNATURE
, (8 - addr
- size
) * 8, size
* 8);
454 static void fw_cfg_dma_mem_write(void *opaque
, hwaddr addr
,
455 uint64_t value
, unsigned size
)
457 FWCfgState
*s
= opaque
;
461 /* FWCfgDmaAccess high address */
462 s
->dma_addr
= value
<< 32;
463 } else if (addr
== 4) {
464 /* FWCfgDmaAccess low address */
465 s
->dma_addr
|= value
;
466 fw_cfg_dma_transfer(s
);
468 } else if (size
== 8 && addr
== 0) {
470 fw_cfg_dma_transfer(s
);
474 static bool fw_cfg_dma_mem_valid(void *opaque
, hwaddr addr
,
475 unsigned size
, bool is_write
,
478 return !is_write
|| ((size
== 4 && (addr
== 0 || addr
== 4)) ||
479 (size
== 8 && addr
== 0));
482 static bool fw_cfg_data_mem_valid(void *opaque
, hwaddr addr
,
483 unsigned size
, bool is_write
,
489 static uint64_t fw_cfg_ctl_mem_read(void *opaque
, hwaddr addr
, unsigned size
)
494 static void fw_cfg_ctl_mem_write(void *opaque
, hwaddr addr
,
495 uint64_t value
, unsigned size
)
497 fw_cfg_select(opaque
, (uint16_t)value
);
500 static bool fw_cfg_ctl_mem_valid(void *opaque
, hwaddr addr
,
501 unsigned size
, bool is_write
,
504 return is_write
&& size
== 2;
507 static void fw_cfg_comb_write(void *opaque
, hwaddr addr
,
508 uint64_t value
, unsigned size
)
512 fw_cfg_write(opaque
, (uint8_t)value
);
515 fw_cfg_select(opaque
, (uint16_t)value
);
520 static bool fw_cfg_comb_valid(void *opaque
, hwaddr addr
,
521 unsigned size
, bool is_write
,
524 return (size
== 1) || (is_write
&& size
== 2);
527 static const MemoryRegionOps fw_cfg_ctl_mem_ops
= {
528 .read
= fw_cfg_ctl_mem_read
,
529 .write
= fw_cfg_ctl_mem_write
,
530 .endianness
= DEVICE_BIG_ENDIAN
,
531 .valid
.accepts
= fw_cfg_ctl_mem_valid
,
534 static const MemoryRegionOps fw_cfg_data_mem_ops
= {
535 .read
= fw_cfg_data_read
,
536 .write
= fw_cfg_data_mem_write
,
537 .endianness
= DEVICE_BIG_ENDIAN
,
539 .min_access_size
= 1,
540 .max_access_size
= 1,
541 .accepts
= fw_cfg_data_mem_valid
,
545 static const MemoryRegionOps fw_cfg_comb_mem_ops
= {
546 .read
= fw_cfg_data_read
,
547 .write
= fw_cfg_comb_write
,
548 .endianness
= DEVICE_LITTLE_ENDIAN
,
549 .valid
.accepts
= fw_cfg_comb_valid
,
552 static const MemoryRegionOps fw_cfg_dma_mem_ops
= {
553 .read
= fw_cfg_dma_mem_read
,
554 .write
= fw_cfg_dma_mem_write
,
555 .endianness
= DEVICE_BIG_ENDIAN
,
556 .valid
.accepts
= fw_cfg_dma_mem_valid
,
557 .valid
.max_access_size
= 8,
558 .impl
.max_access_size
= 8,
561 static void fw_cfg_reset(DeviceState
*d
)
563 FWCfgState
*s
= FW_CFG(d
);
565 /* we never register a read callback for FW_CFG_SIGNATURE */
566 fw_cfg_select(s
, FW_CFG_SIGNATURE
);
569 /* Save restore 32 bit int as uint16_t
570 This is a Big hack, but it is how the old state did it.
571 Or we broke compatibility in the state, or we can't use struct tm
574 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
,
575 const VMStateField
*field
)
578 *v
= qemu_get_be16(f
);
582 static int put_unused(QEMUFile
*f
, void *pv
, size_t size
,
583 const VMStateField
*field
, QJSON
*vmdesc
)
585 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
586 fprintf(stderr
, "This functions shouldn't be called.\n");
591 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
592 .name
= "int32_as_uint16",
593 .get
= get_uint32_as_uint16
,
597 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
598 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
601 static bool is_version_1(void *opaque
, int version_id
)
603 return version_id
== 1;
606 bool fw_cfg_dma_enabled(void *opaque
)
608 FWCfgState
*s
= opaque
;
610 return s
->dma_enabled
;
613 static const VMStateDescription vmstate_fw_cfg_dma
= {
614 .name
= "fw_cfg/dma",
615 .needed
= fw_cfg_dma_enabled
,
616 .fields
= (VMStateField
[]) {
617 VMSTATE_UINT64(dma_addr
, FWCfgState
),
618 VMSTATE_END_OF_LIST()
622 static const VMStateDescription vmstate_fw_cfg
= {
625 .minimum_version_id
= 1,
626 .fields
= (VMStateField
[]) {
627 VMSTATE_UINT16(cur_entry
, FWCfgState
),
628 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
629 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
630 VMSTATE_END_OF_LIST()
632 .subsections
= (const VMStateDescription
*[]) {
638 static void fw_cfg_add_bytes_callback(FWCfgState
*s
, uint16_t key
,
639 FWCfgCallback select_cb
,
640 FWCfgWriteCallback write_cb
,
641 void *callback_opaque
,
642 void *data
, size_t len
,
645 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
647 key
&= FW_CFG_ENTRY_MASK
;
649 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
650 assert(s
->entries
[arch
][key
].data
== NULL
); /* avoid key conflict */
652 s
->entries
[arch
][key
].data
= data
;
653 s
->entries
[arch
][key
].len
= (uint32_t)len
;
654 s
->entries
[arch
][key
].select_cb
= select_cb
;
655 s
->entries
[arch
][key
].write_cb
= write_cb
;
656 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
657 s
->entries
[arch
][key
].allow_write
= !read_only
;
660 static void *fw_cfg_modify_bytes_read(FWCfgState
*s
, uint16_t key
,
661 void *data
, size_t len
)
664 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
666 key
&= FW_CFG_ENTRY_MASK
;
668 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
670 /* return the old data to the function caller, avoid memory leak */
671 ptr
= s
->entries
[arch
][key
].data
;
672 s
->entries
[arch
][key
].data
= data
;
673 s
->entries
[arch
][key
].len
= len
;
674 s
->entries
[arch
][key
].callback_opaque
= NULL
;
675 s
->entries
[arch
][key
].allow_write
= false;
680 void fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, void *data
, size_t len
)
682 trace_fw_cfg_add_bytes(key
, trace_key_name(key
), len
);
683 fw_cfg_add_bytes_callback(s
, key
, NULL
, NULL
, NULL
, data
, len
, true);
686 void fw_cfg_add_string(FWCfgState
*s
, uint16_t key
, const char *value
)
688 size_t sz
= strlen(value
) + 1;
690 trace_fw_cfg_add_string(key
, trace_key_name(key
), value
);
691 fw_cfg_add_bytes(s
, key
, g_memdup(value
, sz
), sz
);
694 void fw_cfg_modify_string(FWCfgState
*s
, uint16_t key
, const char *value
)
696 size_t sz
= strlen(value
) + 1;
699 old
= fw_cfg_modify_bytes_read(s
, key
, g_memdup(value
, sz
), sz
);
703 void fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
707 copy
= g_malloc(sizeof(value
));
708 *copy
= cpu_to_le16(value
);
709 trace_fw_cfg_add_i16(key
, trace_key_name(key
), value
);
710 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
713 void fw_cfg_modify_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
715 uint16_t *copy
, *old
;
717 copy
= g_malloc(sizeof(value
));
718 *copy
= cpu_to_le16(value
);
719 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
723 void fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
727 copy
= g_malloc(sizeof(value
));
728 *copy
= cpu_to_le32(value
);
729 trace_fw_cfg_add_i32(key
, trace_key_name(key
), value
);
730 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
733 void fw_cfg_modify_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
735 uint32_t *copy
, *old
;
737 copy
= g_malloc(sizeof(value
));
738 *copy
= cpu_to_le32(value
);
739 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
743 void fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
747 copy
= g_malloc(sizeof(value
));
748 *copy
= cpu_to_le64(value
);
749 trace_fw_cfg_add_i64(key
, trace_key_name(key
), value
);
750 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
753 void fw_cfg_modify_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
755 uint64_t *copy
, *old
;
757 copy
= g_malloc(sizeof(value
));
758 *copy
= cpu_to_le64(value
);
759 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
763 void fw_cfg_set_order_override(FWCfgState
*s
, int order
)
765 assert(s
->fw_cfg_order_override
== 0);
766 s
->fw_cfg_order_override
= order
;
769 void fw_cfg_reset_order_override(FWCfgState
*s
)
771 assert(s
->fw_cfg_order_override
!= 0);
772 s
->fw_cfg_order_override
= 0;
776 * This is the legacy order list. For legacy systems, files are in
777 * the fw_cfg in the order defined below, by the "order" value. Note
778 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
779 * specific area, but there may be more than one and they occur in the
780 * order that the user specifies them on the command line. Those are
781 * handled in a special manner, using the order override above.
783 * For non-legacy, the files are sorted by filename to avoid this kind
784 * of complexity in the future.
786 * This is only for x86, other arches don't implement versioning so
787 * they won't set legacy mode.
793 { "etc/boot-menu-wait", 10 },
794 { "bootsplash.jpg", 11 },
795 { "bootsplash.bmp", 12 },
796 { "etc/boot-fail-wait", 15 },
797 { "etc/smbios/smbios-tables", 20 },
798 { "etc/smbios/smbios-anchor", 30 },
800 { "etc/reserved-memory-end", 50 },
801 { "genroms/kvmvapic.bin", 55 },
802 { "genroms/linuxboot.bin", 60 },
803 { }, /* VGA ROMs from pc_vga_init come here, 70. */
804 { }, /* NIC option ROMs from pc_nic_init come here, 80. */
805 { "etc/system-states", 90 },
806 { }, /* User ROMs come here, 100. */
807 { }, /* Device FW comes here, 110. */
808 { "etc/extra-pci-roots", 120 },
809 { "etc/acpi/tables", 130 },
810 { "etc/table-loader", 140 },
811 { "etc/tpm/log", 150 },
812 { "etc/acpi/rsdp", 160 },
813 { "bootorder", 170 },
815 #define FW_CFG_ORDER_OVERRIDE_LAST 200
818 static int get_fw_cfg_order(FWCfgState
*s
, const char *name
)
822 if (s
->fw_cfg_order_override
> 0) {
823 return s
->fw_cfg_order_override
;
826 for (i
= 0; i
< ARRAY_SIZE(fw_cfg_order
); i
++) {
827 if (fw_cfg_order
[i
].name
== NULL
) {
831 if (strcmp(name
, fw_cfg_order
[i
].name
) == 0) {
832 return fw_cfg_order
[i
].order
;
836 /* Stick unknown stuff at the end. */
837 warn_report("Unknown firmware file in legacy mode: %s", name
);
838 return FW_CFG_ORDER_OVERRIDE_LAST
;
841 void fw_cfg_add_file_callback(FWCfgState
*s
, const char *filename
,
842 FWCfgCallback select_cb
,
843 FWCfgWriteCallback write_cb
,
844 void *callback_opaque
,
845 void *data
, size_t len
, bool read_only
)
849 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
853 dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * fw_cfg_file_slots(s
);
854 s
->files
= g_malloc0(dsize
);
855 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, s
->files
, dsize
);
858 count
= be32_to_cpu(s
->files
->count
);
859 assert(count
< fw_cfg_file_slots(s
));
861 /* Find the insertion point. */
862 if (mc
->legacy_fw_cfg_order
) {
864 * Sort by order. For files with the same order, we keep them
865 * in the sequence in which they were added.
867 order
= get_fw_cfg_order(s
, filename
);
869 index
> 0 && order
< s
->entry_order
[index
- 1];
872 /* Sort by file name. */
874 index
> 0 && strcmp(filename
, s
->files
->f
[index
- 1].name
) < 0;
879 * Move all the entries from the index point and after down one
880 * to create a slot for the new entry. Because calculations are
881 * being done with the index, make it so that "i" is the current
882 * index and "i - 1" is the one being copied from, thus the
883 * unusual start and end in the for statement.
885 for (i
= count
; i
> index
; i
--) {
886 s
->files
->f
[i
] = s
->files
->f
[i
- 1];
887 s
->files
->f
[i
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ i
);
888 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
] =
889 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
- 1];
890 s
->entry_order
[i
] = s
->entry_order
[i
- 1];
893 memset(&s
->files
->f
[index
], 0, sizeof(FWCfgFile
));
894 memset(&s
->entries
[0][FW_CFG_FILE_FIRST
+ index
], 0, sizeof(FWCfgEntry
));
896 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
), filename
);
897 for (i
= 0; i
<= count
; i
++) {
899 strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
900 error_report("duplicate fw_cfg file name: %s",
901 s
->files
->f
[index
].name
);
906 fw_cfg_add_bytes_callback(s
, FW_CFG_FILE_FIRST
+ index
,
908 callback_opaque
, data
, len
,
911 s
->files
->f
[index
].size
= cpu_to_be32(len
);
912 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
913 s
->entry_order
[index
] = order
;
914 trace_fw_cfg_add_file(s
, index
, s
->files
->f
[index
].name
, len
);
916 s
->files
->count
= cpu_to_be32(count
+1);
919 void fw_cfg_add_file(FWCfgState
*s
, const char *filename
,
920 void *data
, size_t len
)
922 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
925 void *fw_cfg_modify_file(FWCfgState
*s
, const char *filename
,
926 void *data
, size_t len
)
933 index
= be32_to_cpu(s
->files
->count
);
935 for (i
= 0; i
< index
; i
++) {
936 if (strcmp(filename
, s
->files
->f
[i
].name
) == 0) {
937 ptr
= fw_cfg_modify_bytes_read(s
, FW_CFG_FILE_FIRST
+ i
,
939 s
->files
->f
[i
].size
= cpu_to_be32(len
);
944 assert(index
< fw_cfg_file_slots(s
));
947 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
951 static void fw_cfg_machine_reset(void *opaque
)
953 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
954 FWCfgState
*s
= opaque
;
959 buf
= get_boot_devices_list(&len
);
960 ptr
= fw_cfg_modify_file(s
, "bootorder", (uint8_t *)buf
, len
);
963 if (!mc
->legacy_fw_cfg_order
) {
964 buf
= get_boot_devices_lchs_list(&len
);
965 ptr
= fw_cfg_modify_file(s
, "bios-geometry", (uint8_t *)buf
, len
);
970 static void fw_cfg_machine_ready(struct Notifier
*n
, void *data
)
972 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
973 qemu_register_reset(fw_cfg_machine_reset
, s
);
978 static void fw_cfg_common_realize(DeviceState
*dev
, Error
**errp
)
980 FWCfgState
*s
= FW_CFG(dev
);
981 MachineState
*machine
= MACHINE(qdev_get_machine());
982 uint32_t version
= FW_CFG_VERSION
;
984 if (!fw_cfg_find()) {
985 error_setg(errp
, "at most one %s device is permitted", TYPE_FW_CFG
);
989 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (char *)"QEMU", 4);
990 fw_cfg_add_bytes(s
, FW_CFG_UUID
, &qemu_uuid
, 16);
991 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)!machine
->enable_graphics
);
992 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
993 fw_cfg_bootsplash(s
);
996 if (s
->dma_enabled
) {
997 version
|= FW_CFG_VERSION_DMA
;
1000 fw_cfg_add_i32(s
, FW_CFG_ID
, version
);
1002 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
1003 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
1006 FWCfgState
*fw_cfg_init_io_dma(uint32_t iobase
, uint32_t dma_iobase
,
1007 AddressSpace
*dma_as
)
1013 bool dma_requested
= dma_iobase
&& dma_as
;
1015 dev
= qdev_create(NULL
, TYPE_FW_CFG_IO
);
1016 if (!dma_requested
) {
1017 qdev_prop_set_bit(dev
, "dma_enabled", false);
1020 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
1022 qdev_init_nofail(dev
);
1024 sbd
= SYS_BUS_DEVICE(dev
);
1025 ios
= FW_CFG_IO(dev
);
1026 sysbus_add_io(sbd
, iobase
, &ios
->comb_iomem
);
1030 if (s
->dma_enabled
) {
1031 /* 64 bits for the address field */
1034 sysbus_add_io(sbd
, dma_iobase
, &s
->dma_iomem
);
1040 FWCfgState
*fw_cfg_init_io(uint32_t iobase
)
1042 return fw_cfg_init_io_dma(iobase
, 0, NULL
);
1045 FWCfgState
*fw_cfg_init_mem_wide(hwaddr ctl_addr
,
1046 hwaddr data_addr
, uint32_t data_width
,
1047 hwaddr dma_addr
, AddressSpace
*dma_as
)
1052 bool dma_requested
= dma_addr
&& dma_as
;
1054 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
1055 qdev_prop_set_uint32(dev
, "data_width", data_width
);
1056 if (!dma_requested
) {
1057 qdev_prop_set_bit(dev
, "dma_enabled", false);
1060 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
1062 qdev_init_nofail(dev
);
1064 sbd
= SYS_BUS_DEVICE(dev
);
1065 sysbus_mmio_map(sbd
, 0, ctl_addr
);
1066 sysbus_mmio_map(sbd
, 1, data_addr
);
1070 if (s
->dma_enabled
) {
1073 sysbus_mmio_map(sbd
, 2, dma_addr
);
1079 FWCfgState
*fw_cfg_init_mem(hwaddr ctl_addr
, hwaddr data_addr
)
1081 return fw_cfg_init_mem_wide(ctl_addr
, data_addr
,
1082 fw_cfg_data_mem_ops
.valid
.max_access_size
,
1087 FWCfgState
*fw_cfg_find(void)
1089 /* Returns NULL unless there is exactly one fw_cfg device */
1090 return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG
, NULL
));
1094 static void fw_cfg_class_init(ObjectClass
*klass
, void *data
)
1096 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1098 dc
->reset
= fw_cfg_reset
;
1099 dc
->vmsd
= &vmstate_fw_cfg
;
1102 static const TypeInfo fw_cfg_info
= {
1103 .name
= TYPE_FW_CFG
,
1104 .parent
= TYPE_SYS_BUS_DEVICE
,
1106 .instance_size
= sizeof(FWCfgState
),
1107 .class_init
= fw_cfg_class_init
,
1110 static void fw_cfg_file_slots_allocate(FWCfgState
*s
, Error
**errp
)
1112 uint16_t file_slots_max
;
1114 if (fw_cfg_file_slots(s
) < FW_CFG_FILE_SLOTS_MIN
) {
1115 error_setg(errp
, "\"file_slots\" must be at least 0x%x",
1116 FW_CFG_FILE_SLOTS_MIN
);
1120 /* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
1121 * that we permit. The actual (exclusive) value coming from the
1122 * configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
1123 file_slots_max
= (UINT16_MAX
& FW_CFG_ENTRY_MASK
) - FW_CFG_FILE_FIRST
+ 1;
1124 if (fw_cfg_file_slots(s
) > file_slots_max
) {
1125 error_setg(errp
, "\"file_slots\" must not exceed 0x%" PRIx16
,
1130 s
->entries
[0] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1131 s
->entries
[1] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1132 s
->entry_order
= g_new0(int, fw_cfg_max_entry(s
));
1135 static Property fw_cfg_io_properties
[] = {
1136 DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState
, parent_obj
.dma_enabled
,
1138 DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState
, parent_obj
.file_slots
,
1139 FW_CFG_FILE_SLOTS_DFLT
),
1140 DEFINE_PROP_END_OF_LIST(),
1143 static void fw_cfg_io_realize(DeviceState
*dev
, Error
**errp
)
1145 FWCfgIoState
*s
= FW_CFG_IO(dev
);
1146 Error
*local_err
= NULL
;
1148 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1150 error_propagate(errp
, local_err
);
1154 /* when using port i/o, the 8-bit data register ALWAYS overlaps
1155 * with half of the 16-bit control register. Hence, the total size
1156 * of the i/o region used is FW_CFG_CTL_SIZE */
1157 memory_region_init_io(&s
->comb_iomem
, OBJECT(s
), &fw_cfg_comb_mem_ops
,
1158 FW_CFG(s
), "fwcfg", FW_CFG_CTL_SIZE
);
1160 if (FW_CFG(s
)->dma_enabled
) {
1161 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1162 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1163 sizeof(dma_addr_t
));
1166 fw_cfg_common_realize(dev
, errp
);
1169 static void fw_cfg_io_class_init(ObjectClass
*klass
, void *data
)
1171 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1173 dc
->realize
= fw_cfg_io_realize
;
1174 dc
->props
= fw_cfg_io_properties
;
1177 static const TypeInfo fw_cfg_io_info
= {
1178 .name
= TYPE_FW_CFG_IO
,
1179 .parent
= TYPE_FW_CFG
,
1180 .instance_size
= sizeof(FWCfgIoState
),
1181 .class_init
= fw_cfg_io_class_init
,
1185 static Property fw_cfg_mem_properties
[] = {
1186 DEFINE_PROP_UINT32("data_width", FWCfgMemState
, data_width
, -1),
1187 DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState
, parent_obj
.dma_enabled
,
1189 DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState
, parent_obj
.file_slots
,
1190 FW_CFG_FILE_SLOTS_DFLT
),
1191 DEFINE_PROP_END_OF_LIST(),
1194 static void fw_cfg_mem_realize(DeviceState
*dev
, Error
**errp
)
1196 FWCfgMemState
*s
= FW_CFG_MEM(dev
);
1197 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
1198 const MemoryRegionOps
*data_ops
= &fw_cfg_data_mem_ops
;
1199 Error
*local_err
= NULL
;
1201 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1203 error_propagate(errp
, local_err
);
1207 memory_region_init_io(&s
->ctl_iomem
, OBJECT(s
), &fw_cfg_ctl_mem_ops
,
1208 FW_CFG(s
), "fwcfg.ctl", FW_CFG_CTL_SIZE
);
1209 sysbus_init_mmio(sbd
, &s
->ctl_iomem
);
1211 if (s
->data_width
> data_ops
->valid
.max_access_size
) {
1212 s
->wide_data_ops
= *data_ops
;
1214 s
->wide_data_ops
.valid
.max_access_size
= s
->data_width
;
1215 s
->wide_data_ops
.impl
.max_access_size
= s
->data_width
;
1216 data_ops
= &s
->wide_data_ops
;
1218 memory_region_init_io(&s
->data_iomem
, OBJECT(s
), data_ops
, FW_CFG(s
),
1219 "fwcfg.data", data_ops
->valid
.max_access_size
);
1220 sysbus_init_mmio(sbd
, &s
->data_iomem
);
1222 if (FW_CFG(s
)->dma_enabled
) {
1223 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1224 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1225 sizeof(dma_addr_t
));
1226 sysbus_init_mmio(sbd
, &FW_CFG(s
)->dma_iomem
);
1229 fw_cfg_common_realize(dev
, errp
);
1232 static void fw_cfg_mem_class_init(ObjectClass
*klass
, void *data
)
1234 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1236 dc
->realize
= fw_cfg_mem_realize
;
1237 dc
->props
= fw_cfg_mem_properties
;
1240 static const TypeInfo fw_cfg_mem_info
= {
1241 .name
= TYPE_FW_CFG_MEM
,
1242 .parent
= TYPE_FW_CFG
,
1243 .instance_size
= sizeof(FWCfgMemState
),
1244 .class_init
= fw_cfg_mem_class_init
,
1248 static void fw_cfg_register_types(void)
1250 type_register_static(&fw_cfg_info
);
1251 type_register_static(&fw_cfg_io_info
);
1252 type_register_static(&fw_cfg_mem_info
);
1255 type_init(fw_cfg_register_types
)