2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu-common.h"
28 #include "sysemu/sysemu.h"
29 #include "sysemu/dma.h"
30 #include "sysemu/reset.h"
31 #include "hw/boards.h"
32 #include "hw/nvram/fw_cfg.h"
33 #include "hw/sysbus.h"
35 #include "qemu/error-report.h"
36 #include "qemu/option.h"
37 #include "qemu/config-file.h"
38 #include "qemu/cutils.h"
39 #include "qapi/error.h"
41 #define FW_CFG_FILE_SLOTS_DFLT 0x20
43 /* FW_CFG_VERSION bits */
44 #define FW_CFG_VERSION 0x01
45 #define FW_CFG_VERSION_DMA 0x02
47 /* FW_CFG_DMA_CONTROL bits */
48 #define FW_CFG_DMA_CTL_ERROR 0x01
49 #define FW_CFG_DMA_CTL_READ 0x02
50 #define FW_CFG_DMA_CTL_SKIP 0x04
51 #define FW_CFG_DMA_CTL_SELECT 0x08
52 #define FW_CFG_DMA_CTL_WRITE 0x10
54 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
60 void *callback_opaque
;
61 FWCfgCallback select_cb
;
62 FWCfgWriteCallback write_cb
;
68 * @key: The uint16 selector key.
70 * Returns: The stringified name if the selector refers to a well-known
71 * numerically defined item, or NULL on key lookup failure.
73 static const char *key_name(uint16_t key
)
75 static const char *fw_cfg_wellknown_keys
[FW_CFG_FILE_FIRST
] = {
76 [FW_CFG_SIGNATURE
] = "signature",
78 [FW_CFG_UUID
] = "uuid",
79 [FW_CFG_RAM_SIZE
] = "ram_size",
80 [FW_CFG_NOGRAPHIC
] = "nographic",
81 [FW_CFG_NB_CPUS
] = "nb_cpus",
82 [FW_CFG_MACHINE_ID
] = "machine_id",
83 [FW_CFG_KERNEL_ADDR
] = "kernel_addr",
84 [FW_CFG_KERNEL_SIZE
] = "kernel_size",
85 [FW_CFG_KERNEL_CMDLINE
] = "kernel_cmdline",
86 [FW_CFG_INITRD_ADDR
] = "initrd_addr",
87 [FW_CFG_INITRD_SIZE
] = "initdr_size",
88 [FW_CFG_BOOT_DEVICE
] = "boot_device",
89 [FW_CFG_NUMA
] = "numa",
90 [FW_CFG_BOOT_MENU
] = "boot_menu",
91 [FW_CFG_MAX_CPUS
] = "max_cpus",
92 [FW_CFG_KERNEL_ENTRY
] = "kernel_entry",
93 [FW_CFG_KERNEL_DATA
] = "kernel_data",
94 [FW_CFG_INITRD_DATA
] = "initrd_data",
95 [FW_CFG_CMDLINE_ADDR
] = "cmdline_addr",
96 [FW_CFG_CMDLINE_SIZE
] = "cmdline_size",
97 [FW_CFG_CMDLINE_DATA
] = "cmdline_data",
98 [FW_CFG_SETUP_ADDR
] = "setup_addr",
99 [FW_CFG_SETUP_SIZE
] = "setup_size",
100 [FW_CFG_SETUP_DATA
] = "setup_data",
101 [FW_CFG_FILE_DIR
] = "file_dir",
104 if (key
& FW_CFG_ARCH_LOCAL
) {
105 return fw_cfg_arch_key_name(key
);
107 if (key
< FW_CFG_FILE_FIRST
) {
108 return fw_cfg_wellknown_keys
[key
];
114 static inline const char *trace_key_name(uint16_t key
)
116 const char *name
= key_name(key
);
118 return name
? name
: "unknown";
124 static char *read_splashfile(char *filename
, gsize
*file_sizep
,
130 unsigned int filehead
;
133 if (!g_file_get_contents(filename
, &content
, file_sizep
, &err
)) {
134 error_report("failed to read splash file '%s': %s",
135 filename
, err
->message
);
140 /* check file size */
141 if (*file_sizep
< 30) {
146 filehead
= lduw_le_p(content
);
147 if (filehead
== 0xd8ff) {
148 file_type
= JPG_FILE
;
149 } else if (filehead
== 0x4d42) {
150 file_type
= BMP_FILE
;
156 if (file_type
== BMP_FILE
) {
157 bmp_bpp
= lduw_le_p(&content
[28]);
164 *file_typep
= file_type
;
169 error_report("splash file '%s' format not recognized; must be JPEG "
170 "or 24 bit BMP", filename
);
175 static void fw_cfg_bootsplash(FWCfgState
*s
)
177 const char *boot_splash_filename
= NULL
;
178 const char *boot_splash_time
= NULL
;
179 char *filename
, *file_data
;
183 /* get user configuration */
184 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
185 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
186 boot_splash_filename
= qemu_opt_get(opts
, "splash");
187 boot_splash_time
= qemu_opt_get(opts
, "splash-time");
189 /* insert splash time if user configurated */
190 if (boot_splash_time
) {
191 int64_t bst_val
= qemu_opt_get_number(opts
, "splash-time", -1);
194 /* validate the input */
195 if (bst_val
< 0 || bst_val
> 0xffff) {
196 error_report("splash-time is invalid,"
197 "it should be a value between 0 and 65535");
200 /* use little endian format */
201 bst_le16
= cpu_to_le16(bst_val
);
202 fw_cfg_add_file(s
, "etc/boot-menu-wait",
203 g_memdup(&bst_le16
, sizeof bst_le16
), sizeof bst_le16
);
206 /* insert splash file if user configurated */
207 if (boot_splash_filename
) {
208 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, boot_splash_filename
);
209 if (filename
== NULL
) {
210 error_report("failed to find file '%s'", boot_splash_filename
);
214 /* loading file data */
215 file_data
= read_splashfile(filename
, &file_size
, &file_type
);
216 if (file_data
== NULL
) {
220 g_free(boot_splash_filedata
);
221 boot_splash_filedata
= (uint8_t *)file_data
;
224 if (file_type
== JPG_FILE
) {
225 fw_cfg_add_file(s
, "bootsplash.jpg",
226 boot_splash_filedata
, file_size
);
228 fw_cfg_add_file(s
, "bootsplash.bmp",
229 boot_splash_filedata
, file_size
);
235 static void fw_cfg_reboot(FWCfgState
*s
)
237 const char *reboot_timeout
= NULL
;
241 /* get user configuration */
242 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
243 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
244 reboot_timeout
= qemu_opt_get(opts
, "reboot-timeout");
246 if (reboot_timeout
) {
247 rt_val
= qemu_opt_get_number(opts
, "reboot-timeout", -1);
248 /* validate the input */
249 if (rt_val
< 0 || rt_val
> 0xffff) {
250 error_report("reboot timeout is invalid,"
251 "it should be a value between 0 and 65535");
256 rt_le32
= cpu_to_le32(rt_val
);
257 fw_cfg_add_file(s
, "etc/boot-fail-wait", g_memdup(&rt_le32
, 4), 4);
260 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
262 /* nothing, write support removed in QEMU v2.4+ */
265 static inline uint16_t fw_cfg_file_slots(const FWCfgState
*s
)
267 return s
->file_slots
;
270 /* Note: this function returns an exclusive limit. */
271 static inline uint32_t fw_cfg_max_entry(const FWCfgState
*s
)
273 return FW_CFG_FILE_FIRST
+ fw_cfg_file_slots(s
);
276 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
282 if ((key
& FW_CFG_ENTRY_MASK
) >= fw_cfg_max_entry(s
)) {
283 s
->cur_entry
= FW_CFG_INVALID
;
288 /* entry successfully selected, now run callback if present */
289 arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
290 e
= &s
->entries
[arch
][key
& FW_CFG_ENTRY_MASK
];
292 e
->select_cb(e
->callback_opaque
);
296 trace_fw_cfg_select(s
, key
, trace_key_name(key
), ret
);
300 static uint64_t fw_cfg_data_read(void *opaque
, hwaddr addr
, unsigned size
)
302 FWCfgState
*s
= opaque
;
303 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
304 FWCfgEntry
*e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
305 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
308 assert(size
> 0 && size
<= sizeof(value
));
309 if (s
->cur_entry
!= FW_CFG_INVALID
&& e
->data
&& s
->cur_offset
< e
->len
) {
310 /* The least significant 'size' bytes of the return value are
311 * expected to contain a string preserving portion of the item
312 * data, padded with zeros on the right in case we run out early.
313 * In technical terms, we're composing the host-endian representation
314 * of the big endian interpretation of the fw_cfg string.
317 value
= (value
<< 8) | e
->data
[s
->cur_offset
++];
318 } while (--size
&& s
->cur_offset
< e
->len
);
319 /* If size is still not zero, we *did* run out early, so continue
320 * left-shifting, to add the appropriate number of padding zeros
326 trace_fw_cfg_read(s
, value
);
330 static void fw_cfg_data_mem_write(void *opaque
, hwaddr addr
,
331 uint64_t value
, unsigned size
)
333 FWCfgState
*s
= opaque
;
337 fw_cfg_write(s
, value
>> (8 * --i
));
341 static void fw_cfg_dma_transfer(FWCfgState
*s
)
347 int read
= 0, write
= 0;
350 /* Reset the address before the next access */
351 dma_addr
= s
->dma_addr
;
354 if (dma_memory_read(s
->dma_as
, dma_addr
, &dma
, sizeof(dma
))) {
355 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
356 FW_CFG_DMA_CTL_ERROR
);
360 dma
.address
= be64_to_cpu(dma
.address
);
361 dma
.length
= be32_to_cpu(dma
.length
);
362 dma
.control
= be32_to_cpu(dma
.control
);
364 if (dma
.control
& FW_CFG_DMA_CTL_SELECT
) {
365 fw_cfg_select(s
, dma
.control
>> 16);
368 arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
369 e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
370 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
372 if (dma
.control
& FW_CFG_DMA_CTL_READ
) {
375 } else if (dma
.control
& FW_CFG_DMA_CTL_WRITE
) {
378 } else if (dma
.control
& FW_CFG_DMA_CTL_SKIP
) {
387 while (dma
.length
> 0 && !(dma
.control
& FW_CFG_DMA_CTL_ERROR
)) {
388 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
||
389 s
->cur_offset
>= e
->len
) {
392 /* If the access is not a read access, it will be a skip access,
396 if (dma_memory_set(s
->dma_as
, dma
.address
, 0, len
)) {
397 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
401 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
404 if (dma
.length
<= (e
->len
- s
->cur_offset
)) {
407 len
= (e
->len
- s
->cur_offset
);
410 /* If the access is not a read access, it will be a skip access,
414 if (dma_memory_write(s
->dma_as
, dma
.address
,
415 &e
->data
[s
->cur_offset
], len
)) {
416 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
420 if (!e
->allow_write
||
422 dma_memory_read(s
->dma_as
, dma
.address
,
423 &e
->data
[s
->cur_offset
], len
)) {
424 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
425 } else if (e
->write_cb
) {
426 e
->write_cb(e
->callback_opaque
, s
->cur_offset
, len
);
430 s
->cur_offset
+= len
;
438 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
441 trace_fw_cfg_read(s
, 0);
444 static uint64_t fw_cfg_dma_mem_read(void *opaque
, hwaddr addr
,
447 /* Return a signature value (and handle various read sizes) */
448 return extract64(FW_CFG_DMA_SIGNATURE
, (8 - addr
- size
) * 8, size
* 8);
451 static void fw_cfg_dma_mem_write(void *opaque
, hwaddr addr
,
452 uint64_t value
, unsigned size
)
454 FWCfgState
*s
= opaque
;
458 /* FWCfgDmaAccess high address */
459 s
->dma_addr
= value
<< 32;
460 } else if (addr
== 4) {
461 /* FWCfgDmaAccess low address */
462 s
->dma_addr
|= value
;
463 fw_cfg_dma_transfer(s
);
465 } else if (size
== 8 && addr
== 0) {
467 fw_cfg_dma_transfer(s
);
471 static bool fw_cfg_dma_mem_valid(void *opaque
, hwaddr addr
,
472 unsigned size
, bool is_write
,
475 return !is_write
|| ((size
== 4 && (addr
== 0 || addr
== 4)) ||
476 (size
== 8 && addr
== 0));
479 static bool fw_cfg_data_mem_valid(void *opaque
, hwaddr addr
,
480 unsigned size
, bool is_write
,
486 static uint64_t fw_cfg_ctl_mem_read(void *opaque
, hwaddr addr
, unsigned size
)
491 static void fw_cfg_ctl_mem_write(void *opaque
, hwaddr addr
,
492 uint64_t value
, unsigned size
)
494 fw_cfg_select(opaque
, (uint16_t)value
);
497 static bool fw_cfg_ctl_mem_valid(void *opaque
, hwaddr addr
,
498 unsigned size
, bool is_write
,
501 return is_write
&& size
== 2;
504 static void fw_cfg_comb_write(void *opaque
, hwaddr addr
,
505 uint64_t value
, unsigned size
)
509 fw_cfg_write(opaque
, (uint8_t)value
);
512 fw_cfg_select(opaque
, (uint16_t)value
);
517 static bool fw_cfg_comb_valid(void *opaque
, hwaddr addr
,
518 unsigned size
, bool is_write
,
521 return (size
== 1) || (is_write
&& size
== 2);
524 static const MemoryRegionOps fw_cfg_ctl_mem_ops
= {
525 .read
= fw_cfg_ctl_mem_read
,
526 .write
= fw_cfg_ctl_mem_write
,
527 .endianness
= DEVICE_BIG_ENDIAN
,
528 .valid
.accepts
= fw_cfg_ctl_mem_valid
,
531 static const MemoryRegionOps fw_cfg_data_mem_ops
= {
532 .read
= fw_cfg_data_read
,
533 .write
= fw_cfg_data_mem_write
,
534 .endianness
= DEVICE_BIG_ENDIAN
,
536 .min_access_size
= 1,
537 .max_access_size
= 1,
538 .accepts
= fw_cfg_data_mem_valid
,
542 static const MemoryRegionOps fw_cfg_comb_mem_ops
= {
543 .read
= fw_cfg_data_read
,
544 .write
= fw_cfg_comb_write
,
545 .endianness
= DEVICE_LITTLE_ENDIAN
,
546 .valid
.accepts
= fw_cfg_comb_valid
,
549 static const MemoryRegionOps fw_cfg_dma_mem_ops
= {
550 .read
= fw_cfg_dma_mem_read
,
551 .write
= fw_cfg_dma_mem_write
,
552 .endianness
= DEVICE_BIG_ENDIAN
,
553 .valid
.accepts
= fw_cfg_dma_mem_valid
,
554 .valid
.max_access_size
= 8,
555 .impl
.max_access_size
= 8,
558 static void fw_cfg_reset(DeviceState
*d
)
560 FWCfgState
*s
= FW_CFG(d
);
562 /* we never register a read callback for FW_CFG_SIGNATURE */
563 fw_cfg_select(s
, FW_CFG_SIGNATURE
);
566 /* Save restore 32 bit int as uint16_t
567 This is a Big hack, but it is how the old state did it.
568 Or we broke compatibility in the state, or we can't use struct tm
571 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
,
572 const VMStateField
*field
)
575 *v
= qemu_get_be16(f
);
579 static int put_unused(QEMUFile
*f
, void *pv
, size_t size
,
580 const VMStateField
*field
, QJSON
*vmdesc
)
582 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
583 fprintf(stderr
, "This functions shouldn't be called.\n");
588 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
589 .name
= "int32_as_uint16",
590 .get
= get_uint32_as_uint16
,
594 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
595 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
598 static bool is_version_1(void *opaque
, int version_id
)
600 return version_id
== 1;
603 bool fw_cfg_dma_enabled(void *opaque
)
605 FWCfgState
*s
= opaque
;
607 return s
->dma_enabled
;
610 static const VMStateDescription vmstate_fw_cfg_dma
= {
611 .name
= "fw_cfg/dma",
612 .needed
= fw_cfg_dma_enabled
,
613 .fields
= (VMStateField
[]) {
614 VMSTATE_UINT64(dma_addr
, FWCfgState
),
615 VMSTATE_END_OF_LIST()
619 static const VMStateDescription vmstate_fw_cfg
= {
622 .minimum_version_id
= 1,
623 .fields
= (VMStateField
[]) {
624 VMSTATE_UINT16(cur_entry
, FWCfgState
),
625 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
626 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
627 VMSTATE_END_OF_LIST()
629 .subsections
= (const VMStateDescription
*[]) {
635 static void fw_cfg_add_bytes_callback(FWCfgState
*s
, uint16_t key
,
636 FWCfgCallback select_cb
,
637 FWCfgWriteCallback write_cb
,
638 void *callback_opaque
,
639 void *data
, size_t len
,
642 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
644 key
&= FW_CFG_ENTRY_MASK
;
646 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
647 assert(s
->entries
[arch
][key
].data
== NULL
); /* avoid key conflict */
649 s
->entries
[arch
][key
].data
= data
;
650 s
->entries
[arch
][key
].len
= (uint32_t)len
;
651 s
->entries
[arch
][key
].select_cb
= select_cb
;
652 s
->entries
[arch
][key
].write_cb
= write_cb
;
653 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
654 s
->entries
[arch
][key
].allow_write
= !read_only
;
657 static void *fw_cfg_modify_bytes_read(FWCfgState
*s
, uint16_t key
,
658 void *data
, size_t len
)
661 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
663 key
&= FW_CFG_ENTRY_MASK
;
665 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
667 /* return the old data to the function caller, avoid memory leak */
668 ptr
= s
->entries
[arch
][key
].data
;
669 s
->entries
[arch
][key
].data
= data
;
670 s
->entries
[arch
][key
].len
= len
;
671 s
->entries
[arch
][key
].callback_opaque
= NULL
;
672 s
->entries
[arch
][key
].allow_write
= false;
677 void fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, void *data
, size_t len
)
679 trace_fw_cfg_add_bytes(key
, trace_key_name(key
), len
);
680 fw_cfg_add_bytes_callback(s
, key
, NULL
, NULL
, NULL
, data
, len
, true);
683 void fw_cfg_add_string(FWCfgState
*s
, uint16_t key
, const char *value
)
685 size_t sz
= strlen(value
) + 1;
687 trace_fw_cfg_add_string(key
, trace_key_name(key
), value
);
688 fw_cfg_add_bytes(s
, key
, g_memdup(value
, sz
), sz
);
691 void fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
695 copy
= g_malloc(sizeof(value
));
696 *copy
= cpu_to_le16(value
);
697 trace_fw_cfg_add_i16(key
, trace_key_name(key
), value
);
698 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
701 void fw_cfg_modify_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
703 uint16_t *copy
, *old
;
705 copy
= g_malloc(sizeof(value
));
706 *copy
= cpu_to_le16(value
);
707 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
711 void fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
715 copy
= g_malloc(sizeof(value
));
716 *copy
= cpu_to_le32(value
);
717 trace_fw_cfg_add_i32(key
, trace_key_name(key
), value
);
718 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
721 void fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
725 copy
= g_malloc(sizeof(value
));
726 *copy
= cpu_to_le64(value
);
727 trace_fw_cfg_add_i64(key
, trace_key_name(key
), value
);
728 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
731 void fw_cfg_set_order_override(FWCfgState
*s
, int order
)
733 assert(s
->fw_cfg_order_override
== 0);
734 s
->fw_cfg_order_override
= order
;
737 void fw_cfg_reset_order_override(FWCfgState
*s
)
739 assert(s
->fw_cfg_order_override
!= 0);
740 s
->fw_cfg_order_override
= 0;
744 * This is the legacy order list. For legacy systems, files are in
745 * the fw_cfg in the order defined below, by the "order" value. Note
746 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
747 * specific area, but there may be more than one and they occur in the
748 * order that the user specifies them on the command line. Those are
749 * handled in a special manner, using the order override above.
751 * For non-legacy, the files are sorted by filename to avoid this kind
752 * of complexity in the future.
754 * This is only for x86, other arches don't implement versioning so
755 * they won't set legacy mode.
761 { "etc/boot-menu-wait", 10 },
762 { "bootsplash.jpg", 11 },
763 { "bootsplash.bmp", 12 },
764 { "etc/boot-fail-wait", 15 },
765 { "etc/smbios/smbios-tables", 20 },
766 { "etc/smbios/smbios-anchor", 30 },
768 { "etc/reserved-memory-end", 50 },
769 { "genroms/kvmvapic.bin", 55 },
770 { "genroms/linuxboot.bin", 60 },
771 { }, /* VGA ROMs from pc_vga_init come here, 70. */
772 { }, /* NIC option ROMs from pc_nic_init come here, 80. */
773 { "etc/system-states", 90 },
774 { }, /* User ROMs come here, 100. */
775 { }, /* Device FW comes here, 110. */
776 { "etc/extra-pci-roots", 120 },
777 { "etc/acpi/tables", 130 },
778 { "etc/table-loader", 140 },
779 { "etc/tpm/log", 150 },
780 { "etc/acpi/rsdp", 160 },
781 { "bootorder", 170 },
783 #define FW_CFG_ORDER_OVERRIDE_LAST 200
786 static int get_fw_cfg_order(FWCfgState
*s
, const char *name
)
790 if (s
->fw_cfg_order_override
> 0) {
791 return s
->fw_cfg_order_override
;
794 for (i
= 0; i
< ARRAY_SIZE(fw_cfg_order
); i
++) {
795 if (fw_cfg_order
[i
].name
== NULL
) {
799 if (strcmp(name
, fw_cfg_order
[i
].name
) == 0) {
800 return fw_cfg_order
[i
].order
;
804 /* Stick unknown stuff at the end. */
805 warn_report("Unknown firmware file in legacy mode: %s", name
);
806 return FW_CFG_ORDER_OVERRIDE_LAST
;
809 void fw_cfg_add_file_callback(FWCfgState
*s
, const char *filename
,
810 FWCfgCallback select_cb
,
811 FWCfgWriteCallback write_cb
,
812 void *callback_opaque
,
813 void *data
, size_t len
, bool read_only
)
817 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
821 dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * fw_cfg_file_slots(s
);
822 s
->files
= g_malloc0(dsize
);
823 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, s
->files
, dsize
);
826 count
= be32_to_cpu(s
->files
->count
);
827 assert(count
< fw_cfg_file_slots(s
));
829 /* Find the insertion point. */
830 if (mc
->legacy_fw_cfg_order
) {
832 * Sort by order. For files with the same order, we keep them
833 * in the sequence in which they were added.
835 order
= get_fw_cfg_order(s
, filename
);
837 index
> 0 && order
< s
->entry_order
[index
- 1];
840 /* Sort by file name. */
842 index
> 0 && strcmp(filename
, s
->files
->f
[index
- 1].name
) < 0;
847 * Move all the entries from the index point and after down one
848 * to create a slot for the new entry. Because calculations are
849 * being done with the index, make it so that "i" is the current
850 * index and "i - 1" is the one being copied from, thus the
851 * unusual start and end in the for statement.
853 for (i
= count
; i
> index
; i
--) {
854 s
->files
->f
[i
] = s
->files
->f
[i
- 1];
855 s
->files
->f
[i
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ i
);
856 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
] =
857 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
- 1];
858 s
->entry_order
[i
] = s
->entry_order
[i
- 1];
861 memset(&s
->files
->f
[index
], 0, sizeof(FWCfgFile
));
862 memset(&s
->entries
[0][FW_CFG_FILE_FIRST
+ index
], 0, sizeof(FWCfgEntry
));
864 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
), filename
);
865 for (i
= 0; i
<= count
; i
++) {
867 strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
868 error_report("duplicate fw_cfg file name: %s",
869 s
->files
->f
[index
].name
);
874 fw_cfg_add_bytes_callback(s
, FW_CFG_FILE_FIRST
+ index
,
876 callback_opaque
, data
, len
,
879 s
->files
->f
[index
].size
= cpu_to_be32(len
);
880 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
881 s
->entry_order
[index
] = order
;
882 trace_fw_cfg_add_file(s
, index
, s
->files
->f
[index
].name
, len
);
884 s
->files
->count
= cpu_to_be32(count
+1);
887 void fw_cfg_add_file(FWCfgState
*s
, const char *filename
,
888 void *data
, size_t len
)
890 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
893 void *fw_cfg_modify_file(FWCfgState
*s
, const char *filename
,
894 void *data
, size_t len
)
901 index
= be32_to_cpu(s
->files
->count
);
903 for (i
= 0; i
< index
; i
++) {
904 if (strcmp(filename
, s
->files
->f
[i
].name
) == 0) {
905 ptr
= fw_cfg_modify_bytes_read(s
, FW_CFG_FILE_FIRST
+ i
,
907 s
->files
->f
[i
].size
= cpu_to_be32(len
);
912 assert(index
< fw_cfg_file_slots(s
));
915 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
919 static void fw_cfg_machine_reset(void *opaque
)
923 FWCfgState
*s
= opaque
;
924 char *bootindex
= get_boot_devices_list(&len
);
926 ptr
= fw_cfg_modify_file(s
, "bootorder", (uint8_t *)bootindex
, len
);
930 static void fw_cfg_machine_ready(struct Notifier
*n
, void *data
)
932 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
933 qemu_register_reset(fw_cfg_machine_reset
, s
);
938 static void fw_cfg_common_realize(DeviceState
*dev
, Error
**errp
)
940 FWCfgState
*s
= FW_CFG(dev
);
941 MachineState
*machine
= MACHINE(qdev_get_machine());
942 uint32_t version
= FW_CFG_VERSION
;
944 if (!fw_cfg_find()) {
945 error_setg(errp
, "at most one %s device is permitted", TYPE_FW_CFG
);
949 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (char *)"QEMU", 4);
950 fw_cfg_add_bytes(s
, FW_CFG_UUID
, &qemu_uuid
, 16);
951 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)!machine
->enable_graphics
);
952 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
953 fw_cfg_bootsplash(s
);
956 if (s
->dma_enabled
) {
957 version
|= FW_CFG_VERSION_DMA
;
960 fw_cfg_add_i32(s
, FW_CFG_ID
, version
);
962 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
963 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
966 FWCfgState
*fw_cfg_init_io_dma(uint32_t iobase
, uint32_t dma_iobase
,
967 AddressSpace
*dma_as
)
973 bool dma_requested
= dma_iobase
&& dma_as
;
975 dev
= qdev_create(NULL
, TYPE_FW_CFG_IO
);
976 if (!dma_requested
) {
977 qdev_prop_set_bit(dev
, "dma_enabled", false);
980 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
982 qdev_init_nofail(dev
);
984 sbd
= SYS_BUS_DEVICE(dev
);
985 ios
= FW_CFG_IO(dev
);
986 sysbus_add_io(sbd
, iobase
, &ios
->comb_iomem
);
990 if (s
->dma_enabled
) {
991 /* 64 bits for the address field */
994 sysbus_add_io(sbd
, dma_iobase
, &s
->dma_iomem
);
1000 FWCfgState
*fw_cfg_init_io(uint32_t iobase
)
1002 return fw_cfg_init_io_dma(iobase
, 0, NULL
);
1005 FWCfgState
*fw_cfg_init_mem_wide(hwaddr ctl_addr
,
1006 hwaddr data_addr
, uint32_t data_width
,
1007 hwaddr dma_addr
, AddressSpace
*dma_as
)
1012 bool dma_requested
= dma_addr
&& dma_as
;
1014 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
1015 qdev_prop_set_uint32(dev
, "data_width", data_width
);
1016 if (!dma_requested
) {
1017 qdev_prop_set_bit(dev
, "dma_enabled", false);
1020 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
1022 qdev_init_nofail(dev
);
1024 sbd
= SYS_BUS_DEVICE(dev
);
1025 sysbus_mmio_map(sbd
, 0, ctl_addr
);
1026 sysbus_mmio_map(sbd
, 1, data_addr
);
1030 if (s
->dma_enabled
) {
1033 sysbus_mmio_map(sbd
, 2, dma_addr
);
1039 FWCfgState
*fw_cfg_init_mem(hwaddr ctl_addr
, hwaddr data_addr
)
1041 return fw_cfg_init_mem_wide(ctl_addr
, data_addr
,
1042 fw_cfg_data_mem_ops
.valid
.max_access_size
,
1047 FWCfgState
*fw_cfg_find(void)
1049 /* Returns NULL unless there is exactly one fw_cfg device */
1050 return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG
, NULL
));
1054 static void fw_cfg_class_init(ObjectClass
*klass
, void *data
)
1056 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1058 dc
->reset
= fw_cfg_reset
;
1059 dc
->vmsd
= &vmstate_fw_cfg
;
1062 static const TypeInfo fw_cfg_info
= {
1063 .name
= TYPE_FW_CFG
,
1064 .parent
= TYPE_SYS_BUS_DEVICE
,
1066 .instance_size
= sizeof(FWCfgState
),
1067 .class_init
= fw_cfg_class_init
,
1070 static void fw_cfg_file_slots_allocate(FWCfgState
*s
, Error
**errp
)
1072 uint16_t file_slots_max
;
1074 if (fw_cfg_file_slots(s
) < FW_CFG_FILE_SLOTS_MIN
) {
1075 error_setg(errp
, "\"file_slots\" must be at least 0x%x",
1076 FW_CFG_FILE_SLOTS_MIN
);
1080 /* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
1081 * that we permit. The actual (exclusive) value coming from the
1082 * configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
1083 file_slots_max
= (UINT16_MAX
& FW_CFG_ENTRY_MASK
) - FW_CFG_FILE_FIRST
+ 1;
1084 if (fw_cfg_file_slots(s
) > file_slots_max
) {
1085 error_setg(errp
, "\"file_slots\" must not exceed 0x%" PRIx16
,
1090 s
->entries
[0] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1091 s
->entries
[1] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1092 s
->entry_order
= g_new0(int, fw_cfg_max_entry(s
));
1095 static Property fw_cfg_io_properties
[] = {
1096 DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState
, parent_obj
.dma_enabled
,
1098 DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState
, parent_obj
.file_slots
,
1099 FW_CFG_FILE_SLOTS_DFLT
),
1100 DEFINE_PROP_END_OF_LIST(),
1103 static void fw_cfg_io_realize(DeviceState
*dev
, Error
**errp
)
1105 FWCfgIoState
*s
= FW_CFG_IO(dev
);
1106 Error
*local_err
= NULL
;
1108 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1110 error_propagate(errp
, local_err
);
1114 /* when using port i/o, the 8-bit data register ALWAYS overlaps
1115 * with half of the 16-bit control register. Hence, the total size
1116 * of the i/o region used is FW_CFG_CTL_SIZE */
1117 memory_region_init_io(&s
->comb_iomem
, OBJECT(s
), &fw_cfg_comb_mem_ops
,
1118 FW_CFG(s
), "fwcfg", FW_CFG_CTL_SIZE
);
1120 if (FW_CFG(s
)->dma_enabled
) {
1121 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1122 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1123 sizeof(dma_addr_t
));
1126 fw_cfg_common_realize(dev
, errp
);
1129 static void fw_cfg_io_class_init(ObjectClass
*klass
, void *data
)
1131 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1133 dc
->realize
= fw_cfg_io_realize
;
1134 dc
->props
= fw_cfg_io_properties
;
1137 static const TypeInfo fw_cfg_io_info
= {
1138 .name
= TYPE_FW_CFG_IO
,
1139 .parent
= TYPE_FW_CFG
,
1140 .instance_size
= sizeof(FWCfgIoState
),
1141 .class_init
= fw_cfg_io_class_init
,
1145 static Property fw_cfg_mem_properties
[] = {
1146 DEFINE_PROP_UINT32("data_width", FWCfgMemState
, data_width
, -1),
1147 DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState
, parent_obj
.dma_enabled
,
1149 DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState
, parent_obj
.file_slots
,
1150 FW_CFG_FILE_SLOTS_DFLT
),
1151 DEFINE_PROP_END_OF_LIST(),
1154 static void fw_cfg_mem_realize(DeviceState
*dev
, Error
**errp
)
1156 FWCfgMemState
*s
= FW_CFG_MEM(dev
);
1157 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
1158 const MemoryRegionOps
*data_ops
= &fw_cfg_data_mem_ops
;
1159 Error
*local_err
= NULL
;
1161 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1163 error_propagate(errp
, local_err
);
1167 memory_region_init_io(&s
->ctl_iomem
, OBJECT(s
), &fw_cfg_ctl_mem_ops
,
1168 FW_CFG(s
), "fwcfg.ctl", FW_CFG_CTL_SIZE
);
1169 sysbus_init_mmio(sbd
, &s
->ctl_iomem
);
1171 if (s
->data_width
> data_ops
->valid
.max_access_size
) {
1172 s
->wide_data_ops
= *data_ops
;
1174 s
->wide_data_ops
.valid
.max_access_size
= s
->data_width
;
1175 s
->wide_data_ops
.impl
.max_access_size
= s
->data_width
;
1176 data_ops
= &s
->wide_data_ops
;
1178 memory_region_init_io(&s
->data_iomem
, OBJECT(s
), data_ops
, FW_CFG(s
),
1179 "fwcfg.data", data_ops
->valid
.max_access_size
);
1180 sysbus_init_mmio(sbd
, &s
->data_iomem
);
1182 if (FW_CFG(s
)->dma_enabled
) {
1183 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1184 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1185 sizeof(dma_addr_t
));
1186 sysbus_init_mmio(sbd
, &FW_CFG(s
)->dma_iomem
);
1189 fw_cfg_common_realize(dev
, errp
);
1192 static void fw_cfg_mem_class_init(ObjectClass
*klass
, void *data
)
1194 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1196 dc
->realize
= fw_cfg_mem_realize
;
1197 dc
->props
= fw_cfg_mem_properties
;
1200 static const TypeInfo fw_cfg_mem_info
= {
1201 .name
= TYPE_FW_CFG_MEM
,
1202 .parent
= TYPE_FW_CFG
,
1203 .instance_size
= sizeof(FWCfgMemState
),
1204 .class_init
= fw_cfg_mem_class_init
,
1208 static void fw_cfg_register_types(void)
1210 type_register_static(&fw_cfg_info
);
1211 type_register_static(&fw_cfg_io_info
);
1212 type_register_static(&fw_cfg_mem_info
);
1215 type_init(fw_cfg_register_types
)