2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "vmware_vga.h"
33 #include "hpet_emul.h"
37 #include "multiboot.h"
38 #include "mc146818rtc.h"
48 #include "hw/block-common.h"
49 #include "ui/qemu-spice.h"
51 #include "exec-memory.h"
52 #include "arch_init.h"
56 /* output Bochs bios info messages */
59 /* debug PC/ISA interrupts */
63 #define DPRINTF(fmt, ...) \
64 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
66 #define DPRINTF(fmt, ...)
69 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
70 #define ACPI_DATA_SIZE 0x10000
71 #define BIOS_CFG_IOPORT 0x510
72 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
73 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
74 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
75 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
76 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
78 #define MSI_ADDR_BASE 0xfee00000
80 #define E820_NR_ENTRIES 16
86 } QEMU_PACKED
__attribute((__aligned__(4)));
90 struct e820_entry entry
[E820_NR_ENTRIES
];
91 } QEMU_PACKED
__attribute((__aligned__(4)));
93 static struct e820_table e820_table
;
94 struct hpet_fw_config hpet_cfg
= {.count
= UINT8_MAX
};
96 void gsi_handler(void *opaque
, int n
, int level
)
100 DPRINTF("pc: %s GSI %d\n", level
? "raising" : "lowering", n
);
101 if (n
< ISA_NUM_IRQS
) {
102 qemu_set_irq(s
->i8259_irq
[n
], level
);
104 qemu_set_irq(s
->ioapic_irq
[n
], level
);
107 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
111 /* MSDOS compatibility mode FPU exception support */
112 static qemu_irq ferr_irq
;
114 void pc_register_ferr_irq(qemu_irq irq
)
119 /* XXX: add IGNNE support */
120 void cpu_set_ferr(CPUX86State
*s
)
122 qemu_irq_raise(ferr_irq
);
125 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
127 qemu_irq_lower(ferr_irq
);
131 uint64_t cpu_get_tsc(CPUX86State
*env
)
133 return cpu_get_ticks();
138 static cpu_set_smm_t smm_set
;
139 static void *smm_arg
;
141 void cpu_smm_register(cpu_set_smm_t callback
, void *arg
)
143 assert(smm_set
== NULL
);
144 assert(smm_arg
== NULL
);
149 void cpu_smm_update(CPUX86State
*env
)
151 if (smm_set
&& smm_arg
&& env
== first_cpu
)
152 smm_set(!!(env
->hflags
& HF_SMM_MASK
), smm_arg
);
157 int cpu_get_pic_interrupt(CPUX86State
*env
)
161 intno
= apic_get_interrupt(env
->apic_state
);
165 /* read the irq from the PIC */
166 if (!apic_accept_pic_intr(env
->apic_state
)) {
170 intno
= pic_read_irq(isa_pic
);
174 static void pic_irq_request(void *opaque
, int irq
, int level
)
176 CPUX86State
*env
= first_cpu
;
178 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
179 if (env
->apic_state
) {
181 if (apic_accept_pic_intr(env
->apic_state
)) {
182 apic_deliver_pic_intr(env
->apic_state
, level
);
188 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
190 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
194 /* PC cmos mappings */
196 #define REG_EQUIPMENT_BYTE 0x14
198 static int cmos_get_fd_drive_type(FDriveType fd0
)
204 /* 1.44 Mb 3"5 drive */
208 /* 2.88 Mb 3"5 drive */
212 /* 1.2 Mb 5"5 drive */
215 case FDRIVE_DRV_NONE
:
223 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
224 int16_t cylinders
, int8_t heads
, int8_t sectors
)
226 rtc_set_memory(s
, type_ofs
, 47);
227 rtc_set_memory(s
, info_ofs
, cylinders
);
228 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
229 rtc_set_memory(s
, info_ofs
+ 2, heads
);
230 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
231 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
232 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
233 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
234 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
235 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
238 /* convert boot_device letter to something recognizable by the bios */
239 static int boot_device2nibble(char boot_device
)
241 switch(boot_device
) {
244 return 0x01; /* floppy boot */
246 return 0x02; /* hard drive boot */
248 return 0x03; /* CD-ROM boot */
250 return 0x04; /* Network boot */
255 static int set_boot_dev(ISADevice
*s
, const char *boot_device
, int fd_bootchk
)
257 #define PC_MAX_BOOT_DEVICES 3
258 int nbds
, bds
[3] = { 0, };
261 nbds
= strlen(boot_device
);
262 if (nbds
> PC_MAX_BOOT_DEVICES
) {
263 error_report("Too many boot devices for PC");
266 for (i
= 0; i
< nbds
; i
++) {
267 bds
[i
] = boot_device2nibble(boot_device
[i
]);
269 error_report("Invalid boot device for PC: '%c'",
274 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
275 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
279 static int pc_boot_set(void *opaque
, const char *boot_device
)
281 return set_boot_dev(opaque
, boot_device
, 0);
284 typedef struct pc_cmos_init_late_arg
{
285 ISADevice
*rtc_state
;
287 } pc_cmos_init_late_arg
;
289 static void pc_cmos_init_late(void *opaque
)
291 pc_cmos_init_late_arg
*arg
= opaque
;
292 ISADevice
*s
= arg
->rtc_state
;
294 int8_t heads
, sectors
;
299 if (ide_get_geometry(arg
->idebus
[0], 0,
300 &cylinders
, &heads
, §ors
) >= 0) {
301 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
304 if (ide_get_geometry(arg
->idebus
[0], 1,
305 &cylinders
, &heads
, §ors
) >= 0) {
306 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
309 rtc_set_memory(s
, 0x12, val
);
312 for (i
= 0; i
< 4; i
++) {
313 /* NOTE: ide_get_geometry() returns the physical
314 geometry. It is always such that: 1 <= sects <= 63, 1
315 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
316 geometry can be different if a translation is done. */
317 if (ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
318 &cylinders
, &heads
, §ors
) >= 0) {
319 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
320 assert((trans
& ~3) == 0);
321 val
|= trans
<< (i
* 2);
324 rtc_set_memory(s
, 0x39, val
);
326 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
329 void pc_cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
330 const char *boot_device
,
331 ISADevice
*floppy
, BusState
*idebus0
, BusState
*idebus1
,
335 FDriveType fd_type
[2] = { FDRIVE_DRV_NONE
, FDRIVE_DRV_NONE
};
336 static pc_cmos_init_late_arg arg
;
338 /* various important CMOS locations needed by PC/Bochs bios */
341 /* base memory (first MiB) */
342 val
= MIN(ram_size
/ 1024, 640);
343 rtc_set_memory(s
, 0x15, val
);
344 rtc_set_memory(s
, 0x16, val
>> 8);
345 /* extended memory (next 64MiB) */
346 if (ram_size
> 1024 * 1024) {
347 val
= (ram_size
- 1024 * 1024) / 1024;
353 rtc_set_memory(s
, 0x17, val
);
354 rtc_set_memory(s
, 0x18, val
>> 8);
355 rtc_set_memory(s
, 0x30, val
);
356 rtc_set_memory(s
, 0x31, val
>> 8);
357 /* memory between 16MiB and 4GiB */
358 if (ram_size
> 16 * 1024 * 1024) {
359 val
= (ram_size
- 16 * 1024 * 1024) / 65536;
365 rtc_set_memory(s
, 0x34, val
);
366 rtc_set_memory(s
, 0x35, val
>> 8);
367 /* memory above 4GiB */
368 val
= above_4g_mem_size
/ 65536;
369 rtc_set_memory(s
, 0x5b, val
);
370 rtc_set_memory(s
, 0x5c, val
>> 8);
371 rtc_set_memory(s
, 0x5d, val
>> 16);
373 /* set the number of CPU */
374 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
376 /* set boot devices, and disable floppy signature check if requested */
377 if (set_boot_dev(s
, boot_device
, fd_bootchk
)) {
383 for (i
= 0; i
< 2; i
++) {
384 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
387 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
388 cmos_get_fd_drive_type(fd_type
[1]);
389 rtc_set_memory(s
, 0x10, val
);
393 if (fd_type
[0] < FDRIVE_DRV_NONE
) {
396 if (fd_type
[1] < FDRIVE_DRV_NONE
) {
403 val
|= 0x01; /* 1 drive, ready for boot */
406 val
|= 0x41; /* 2 drives, ready for boot */
409 val
|= 0x02; /* FPU is there */
410 val
|= 0x04; /* PS/2 mouse installed */
411 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
415 arg
.idebus
[0] = idebus0
;
416 arg
.idebus
[1] = idebus1
;
417 qemu_register_reset(pc_cmos_init_late
, &arg
);
420 /* port 92 stuff: could be split off */
421 typedef struct Port92State
{
428 static void port92_write(void *opaque
, uint32_t addr
, uint32_t val
)
430 Port92State
*s
= opaque
;
432 DPRINTF("port92: write 0x%02x\n", val
);
434 qemu_set_irq(*s
->a20_out
, (val
>> 1) & 1);
436 qemu_system_reset_request();
440 static uint32_t port92_read(void *opaque
, uint32_t addr
)
442 Port92State
*s
= opaque
;
446 DPRINTF("port92: read 0x%02x\n", ret
);
450 static void port92_init(ISADevice
*dev
, qemu_irq
*a20_out
)
452 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
454 s
->a20_out
= a20_out
;
457 static const VMStateDescription vmstate_port92_isa
= {
460 .minimum_version_id
= 1,
461 .minimum_version_id_old
= 1,
462 .fields
= (VMStateField
[]) {
463 VMSTATE_UINT8(outport
, Port92State
),
464 VMSTATE_END_OF_LIST()
468 static void port92_reset(DeviceState
*d
)
470 Port92State
*s
= container_of(d
, Port92State
, dev
.qdev
);
475 static const MemoryRegionPortio port92_portio
[] = {
476 { 0, 1, 1, .read
= port92_read
, .write
= port92_write
},
477 PORTIO_END_OF_LIST(),
480 static const MemoryRegionOps port92_ops
= {
481 .old_portio
= port92_portio
484 static int port92_initfn(ISADevice
*dev
)
486 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
488 memory_region_init_io(&s
->io
, &port92_ops
, s
, "port92", 1);
489 isa_register_ioport(dev
, &s
->io
, 0x92);
495 static void port92_class_initfn(ObjectClass
*klass
, void *data
)
497 DeviceClass
*dc
= DEVICE_CLASS(klass
);
498 ISADeviceClass
*ic
= ISA_DEVICE_CLASS(klass
);
499 ic
->init
= port92_initfn
;
501 dc
->reset
= port92_reset
;
502 dc
->vmsd
= &vmstate_port92_isa
;
505 static TypeInfo port92_info
= {
507 .parent
= TYPE_ISA_DEVICE
,
508 .instance_size
= sizeof(Port92State
),
509 .class_init
= port92_class_initfn
,
512 static void port92_register_types(void)
514 type_register_static(&port92_info
);
517 type_init(port92_register_types
)
519 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
521 CPUX86State
*cpu
= opaque
;
523 /* XXX: send to all CPUs ? */
524 /* XXX: add logic to handle multiple A20 line sources */
525 cpu_x86_set_a20(cpu
, level
);
528 /***********************************************************/
529 /* Bochs BIOS debug ports */
531 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
533 static const char shutdown_str
[8] = "Shutdown";
534 static int shutdown_index
= 0;
537 /* Bochs BIOS messages */
540 /* used to be panic, now unused */
545 fprintf(stderr
, "%c", val
);
549 /* same as Bochs power off */
550 if (val
== shutdown_str
[shutdown_index
]) {
552 if (shutdown_index
== 8) {
554 qemu_system_shutdown_request();
561 /* LGPL'ed VGA BIOS messages */
564 exit((val
<< 1) | 1);
568 fprintf(stderr
, "%c", val
);
574 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
576 int index
= le32_to_cpu(e820_table
.count
);
577 struct e820_entry
*entry
;
579 if (index
>= E820_NR_ENTRIES
)
581 entry
= &e820_table
.entry
[index
++];
583 entry
->address
= cpu_to_le64(address
);
584 entry
->length
= cpu_to_le64(length
);
585 entry
->type
= cpu_to_le32(type
);
587 e820_table
.count
= cpu_to_le32(index
);
591 static void *bochs_bios_init(void)
594 uint8_t *smbios_table
;
596 uint64_t *numa_fw_cfg
;
599 register_ioport_write(0x400, 1, 2, bochs_bios_write
, NULL
);
600 register_ioport_write(0x401, 1, 2, bochs_bios_write
, NULL
);
601 register_ioport_write(0x402, 1, 1, bochs_bios_write
, NULL
);
602 register_ioport_write(0x403, 1, 1, bochs_bios_write
, NULL
);
603 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
605 register_ioport_write(0x501, 1, 1, bochs_bios_write
, NULL
);
606 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
607 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
608 register_ioport_write(0x500, 1, 1, bochs_bios_write
, NULL
);
609 register_ioport_write(0x503, 1, 1, bochs_bios_write
, NULL
);
611 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
613 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
614 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
615 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
617 fw_cfg_add_i32(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, kvm_allows_irq0_override());
619 smbios_table
= smbios_get_table(&smbios_len
);
621 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
622 smbios_table
, smbios_len
);
623 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
, (uint8_t *)&e820_table
,
624 sizeof(struct e820_table
));
626 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, (uint8_t *)&hpet_cfg
,
627 sizeof(struct hpet_fw_config
));
628 /* allocate memory for the NUMA channel: one (64bit) word for the number
629 * of nodes, one word for each VCPU->node and one word for each node to
630 * hold the amount of memory.
632 numa_fw_cfg
= g_malloc0((1 + max_cpus
+ nb_numa_nodes
) * 8);
633 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
634 for (i
= 0; i
< max_cpus
; i
++) {
635 for (j
= 0; j
< nb_numa_nodes
; j
++) {
636 if (test_bit(i
, node_cpumask
[j
])) {
637 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
642 for (i
= 0; i
< nb_numa_nodes
; i
++) {
643 numa_fw_cfg
[max_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
645 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
646 (1 + max_cpus
+ nb_numa_nodes
) * 8);
651 static long get_file_size(FILE *f
)
655 /* XXX: on Unix systems, using fstat() probably makes more sense */
658 fseek(f
, 0, SEEK_END
);
660 fseek(f
, where
, SEEK_SET
);
665 static void load_linux(void *fw_cfg
,
666 const char *kernel_filename
,
667 const char *initrd_filename
,
668 const char *kernel_cmdline
,
669 target_phys_addr_t max_ram_size
)
672 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
674 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
675 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
679 /* Align to 16 bytes as a paranoia measure */
680 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
682 /* load the kernel header */
683 f
= fopen(kernel_filename
, "rb");
684 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
685 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
686 MIN(ARRAY_SIZE(header
), kernel_size
)) {
687 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
688 kernel_filename
, strerror(errno
));
692 /* kernel protocol version */
694 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
696 if (ldl_p(header
+0x202) == 0x53726448)
697 protocol
= lduw_p(header
+0x206);
699 /* This looks like a multiboot kernel. If it is, let's stop
700 treating it like a Linux kernel. */
701 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
702 kernel_cmdline
, kernel_size
, header
))
707 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
710 cmdline_addr
= 0x9a000 - cmdline_size
;
712 } else if (protocol
< 0x202) {
713 /* High but ancient kernel */
715 cmdline_addr
= 0x9a000 - cmdline_size
;
716 prot_addr
= 0x100000;
718 /* High and recent kernel */
720 cmdline_addr
= 0x20000;
721 prot_addr
= 0x100000;
726 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
727 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
728 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
734 /* highest address for loading the initrd */
735 if (protocol
>= 0x203)
736 initrd_max
= ldl_p(header
+0x22c);
738 initrd_max
= 0x37ffffff;
740 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
741 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
743 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
744 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
745 fw_cfg_add_bytes(fw_cfg
, FW_CFG_CMDLINE_DATA
,
746 (uint8_t*)strdup(kernel_cmdline
),
747 strlen(kernel_cmdline
)+1);
749 if (protocol
>= 0x202) {
750 stl_p(header
+0x228, cmdline_addr
);
752 stw_p(header
+0x20, 0xA33F);
753 stw_p(header
+0x22, cmdline_addr
-real_addr
);
756 /* handle vga= parameter */
757 vmode
= strstr(kernel_cmdline
, "vga=");
759 unsigned int video_mode
;
762 if (!strncmp(vmode
, "normal", 6)) {
764 } else if (!strncmp(vmode
, "ext", 3)) {
766 } else if (!strncmp(vmode
, "ask", 3)) {
769 video_mode
= strtol(vmode
, NULL
, 0);
771 stw_p(header
+0x1fa, video_mode
);
775 /* High nybble = B reserved for QEMU; low nybble is revision number.
776 If this code is substantially changed, you may want to consider
777 incrementing the revision. */
778 if (protocol
>= 0x200)
779 header
[0x210] = 0xB0;
782 if (protocol
>= 0x201) {
783 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
784 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
788 if (initrd_filename
) {
789 if (protocol
< 0x200) {
790 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
794 initrd_size
= get_image_size(initrd_filename
);
795 if (initrd_size
< 0) {
796 fprintf(stderr
, "qemu: error reading initrd %s\n",
801 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
803 initrd_data
= g_malloc(initrd_size
);
804 load_image(initrd_filename
, initrd_data
);
806 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
807 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
808 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
810 stl_p(header
+0x218, initrd_addr
);
811 stl_p(header
+0x21c, initrd_size
);
814 /* load kernel and setup */
815 setup_size
= header
[0x1f1];
818 setup_size
= (setup_size
+1)*512;
819 kernel_size
-= setup_size
;
821 setup
= g_malloc(setup_size
);
822 kernel
= g_malloc(kernel_size
);
823 fseek(f
, 0, SEEK_SET
);
824 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
825 fprintf(stderr
, "fread() failed\n");
828 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
829 fprintf(stderr
, "fread() failed\n");
833 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
835 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
836 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
837 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
839 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
840 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
841 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
843 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
844 option_rom
[nb_option_roms
].bootindex
= 0;
848 #define NE2000_NB_MAX 6
850 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
852 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
854 static const int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
855 static const int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
857 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
859 static int nb_ne2k
= 0;
861 if (nb_ne2k
== NE2000_NB_MAX
)
863 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
864 ne2000_irq
[nb_ne2k
], nd
);
868 DeviceState
*cpu_get_current_apic(void)
870 if (cpu_single_env
) {
871 return cpu_single_env
->apic_state
;
877 static DeviceState
*apic_init(void *env
, uint8_t apic_id
)
880 static int apic_mapped
;
882 if (kvm_irqchip_in_kernel()) {
883 dev
= qdev_create(NULL
, "kvm-apic");
884 } else if (xen_enabled()) {
885 dev
= qdev_create(NULL
, "xen-apic");
887 dev
= qdev_create(NULL
, "apic");
890 qdev_prop_set_uint8(dev
, "id", apic_id
);
891 qdev_prop_set_ptr(dev
, "cpu_env", env
);
892 qdev_init_nofail(dev
);
894 /* XXX: mapping more APICs at the same memory location */
895 if (apic_mapped
== 0) {
896 /* NOTE: the APIC is directly connected to the CPU - it is not
897 on the global memory bus. */
898 /* XXX: what if the base changes? */
899 sysbus_mmio_map(sysbus_from_qdev(dev
), 0, MSI_ADDR_BASE
);
906 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
908 CPUX86State
*s
= opaque
;
911 cpu_interrupt(s
, CPU_INTERRUPT_SMI
);
915 static X86CPU
*pc_new_cpu(const char *cpu_model
)
920 cpu
= cpu_x86_init(cpu_model
);
922 fprintf(stderr
, "Unable to find x86 CPU definition\n");
926 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
927 env
->apic_state
= apic_init(env
, env
->cpuid_apic_id
);
933 void pc_cpus_init(const char *cpu_model
)
938 if (cpu_model
== NULL
) {
940 cpu_model
= "qemu64";
942 cpu_model
= "qemu32";
946 for(i
= 0; i
< smp_cpus
; i
++) {
947 pc_new_cpu(cpu_model
);
951 void *pc_memory_init(MemoryRegion
*system_memory
,
952 const char *kernel_filename
,
953 const char *kernel_cmdline
,
954 const char *initrd_filename
,
955 ram_addr_t below_4g_mem_size
,
956 ram_addr_t above_4g_mem_size
,
957 MemoryRegion
*rom_memory
,
958 MemoryRegion
**ram_memory
)
961 MemoryRegion
*ram
, *option_rom_mr
;
962 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
965 linux_boot
= (kernel_filename
!= NULL
);
967 /* Allocate RAM. We allocate it as a single memory region and use
968 * aliases to address portions of it, mostly for backwards compatibility
969 * with older qemus that used qemu_ram_alloc().
971 ram
= g_malloc(sizeof(*ram
));
972 memory_region_init_ram(ram
, "pc.ram",
973 below_4g_mem_size
+ above_4g_mem_size
);
974 vmstate_register_ram_global(ram
);
976 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
977 memory_region_init_alias(ram_below_4g
, "ram-below-4g", ram
,
978 0, below_4g_mem_size
);
979 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
980 if (above_4g_mem_size
> 0) {
981 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
982 memory_region_init_alias(ram_above_4g
, "ram-above-4g", ram
,
983 below_4g_mem_size
, above_4g_mem_size
);
984 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
989 /* Initialize PC system firmware */
990 pc_system_firmware_init(rom_memory
);
992 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
993 memory_region_init_ram(option_rom_mr
, "pc.rom", PC_ROM_SIZE
);
994 vmstate_register_ram_global(option_rom_mr
);
995 memory_region_add_subregion_overlap(rom_memory
,
1000 fw_cfg
= bochs_bios_init();
1004 load_linux(fw_cfg
, kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
1007 for (i
= 0; i
< nb_option_roms
; i
++) {
1008 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1013 qemu_irq
*pc_allocate_cpu_irq(void)
1015 return qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
1018 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1020 DeviceState
*dev
= NULL
;
1022 if (cirrus_vga_enabled
) {
1024 dev
= pci_cirrus_vga_init(pci_bus
);
1026 dev
= &isa_create_simple(isa_bus
, "isa-cirrus-vga")->qdev
;
1028 } else if (vmsvga_enabled
) {
1030 dev
= pci_vmsvga_init(pci_bus
);
1032 fprintf(stderr
, "%s: vmware_vga: no PCI bus\n", __FUNCTION__
);
1035 } else if (qxl_enabled
) {
1037 dev
= &pci_create_simple(pci_bus
, -1, "qxl-vga")->qdev
;
1039 fprintf(stderr
, "%s: qxl: no PCI bus\n", __FUNCTION__
);
1042 } else if (std_vga_enabled
) {
1044 dev
= pci_vga_init(pci_bus
);
1046 dev
= isa_vga_init(isa_bus
);
1053 static void cpu_request_exit(void *opaque
, int irq
, int level
)
1055 CPUX86State
*env
= cpu_single_env
;
1062 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
1063 ISADevice
**rtc_state
,
1068 DriveInfo
*fd
[MAX_FD
];
1069 DeviceState
*hpet
= NULL
;
1070 int pit_isa_irq
= 0;
1071 qemu_irq pit_alt_irq
= NULL
;
1072 qemu_irq rtc_irq
= NULL
;
1074 ISADevice
*i8042
, *port92
, *vmmouse
, *pit
= NULL
;
1075 qemu_irq
*cpu_exit_irq
;
1077 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1079 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1082 * Check if an HPET shall be created.
1084 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1085 * when the HPET wants to take over. Thus we have to disable the latter.
1087 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1088 hpet
= sysbus_try_create_simple("hpet", HPET_BASE
, NULL
);
1091 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1092 sysbus_connect_irq(sysbus_from_qdev(hpet
), i
, gsi
[i
]);
1095 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1096 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1099 *rtc_state
= rtc_init(isa_bus
, 2000, rtc_irq
);
1101 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1103 if (!xen_enabled()) {
1104 if (kvm_irqchip_in_kernel()) {
1105 pit
= kvm_pit_init(isa_bus
, 0x40);
1107 pit
= pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1110 /* connect PIT to output control line of the HPET */
1111 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(&pit
->qdev
, 0));
1113 pcspk_init(isa_bus
, pit
);
1116 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1117 if (serial_hds
[i
]) {
1118 serial_isa_init(isa_bus
, i
, serial_hds
[i
]);
1122 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1123 if (parallel_hds
[i
]) {
1124 parallel_init(isa_bus
, i
, parallel_hds
[i
]);
1128 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1129 i8042
= isa_create_simple(isa_bus
, "i8042");
1130 i8042_setup_a20_line(i8042
, &a20_line
[0]);
1132 vmport_init(isa_bus
);
1133 vmmouse
= isa_try_create(isa_bus
, "vmmouse");
1138 qdev_prop_set_ptr(&vmmouse
->qdev
, "ps2_mouse", i8042
);
1139 qdev_init_nofail(&vmmouse
->qdev
);
1141 port92
= isa_create_simple(isa_bus
, "port92");
1142 port92_init(port92
, &a20_line
[1]);
1144 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
1145 DMA_init(0, cpu_exit_irq
);
1147 for(i
= 0; i
< MAX_FD
; i
++) {
1148 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1150 *floppy
= fdctrl_init_isa(isa_bus
, fd
);
1153 void pc_pci_device_init(PCIBus
*pci_bus
)
1158 max_bus
= drive_get_max_bus(IF_SCSI
);
1159 for (bus
= 0; bus
<= max_bus
; bus
++) {
1160 pci_create_simple(pci_bus
, -1, "lsi53c895a");