hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  32
  33 #define KERNEL_LOAD_ADDR     0x00100000
  34 #define INITRD_LOAD_ADDR     0x00400000
  35 #define KERNEL_PARAMS_ADDR   0x00090000
  36 #define KERNEL_CMDLINE_ADDR  0x00099000
  37
  38 int speaker_data_on;
  39 int dummy_refresh_clock;
  40 static fdctrl_t *floppy_controller;
  41 static RTCState *rtc_state;
  42 static PITState *pit;
  43
  44 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  45 {
  46 }
  47
  48 /* MSDOS compatibility mode FPU exception support */
  49 /* XXX: add IGNNE support */
  50 void cpu_set_ferr(CPUX86State *s)
  51 {
  52     pic_set_irq(13, 1);
  53 }
  54
  55 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  56 {
  57     pic_set_irq(13, 0);
  58 }
  59
  60 /* PC cmos mappings */
  61
  62 #define REG_EQUIPMENT_BYTE          0x14
  63 #define REG_IBM_CENTURY_BYTE        0x32
  64 #define REG_IBM_PS2_CENTURY_BYTE    0x37
  65
  66
  67 static inline int to_bcd(RTCState *s, int a)
  68 {
  69     return ((a / 10) << 4) | (a % 10);
  70 }
  71
  72 static void cmos_init(int ram_size, int boot_device)
  73 {
  74     RTCState *s = rtc_state;
  75     int val;
  76     int fd0, fd1, nb;
  77     time_t ti;
  78     struct tm *tm;
  79
  80     /* set the CMOS date */
  81     time(&ti);
  82     tm = gmtime(&ti);
  83     rtc_set_date(s, tm);
  84
  85     val = to_bcd(s, (tm->tm_year / 100) + 19);
  86     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
  87     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
  88
  89     /* various important CMOS locations needed by PC/Bochs bios */
  90
  91     /* memory size */
  92     val = 640; /* base memory in K */
  93     rtc_set_memory(s, 0x15, val);
  94     rtc_set_memory(s, 0x16, val >> 8);
  95
  96     val = (ram_size / 1024) - 1024;
  97     if (val > 65535)
  98         val = 65535;
  99     rtc_set_memory(s, 0x17, val);
 100     rtc_set_memory(s, 0x18, val >> 8);
 101     rtc_set_memory(s, 0x30, val);
 102     rtc_set_memory(s, 0x31, val >> 8);
 103
 104     val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 105     if (val > 65535)
 106         val = 65535;
 107     rtc_set_memory(s, 0x34, val);
 108     rtc_set_memory(s, 0x35, val >> 8);
 109
 110     switch(boot_device) {
 111     case 'a':
 112     case 'b':
 113         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 114         break;
 115     default:
 116     case 'c':
 117         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 118         break;
 119     case 'd':
 120         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 121         break;
 122     }
 123
 124     /* floppy type */
 125
 126     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 127     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 128
 129     val = 0;
 130     switch (fd0) {
 131     case 0:
 132         /* 1.44 Mb 3"5 drive */
 133         val |= 0x40;
 134         break;
 135     case 1:
 136         /* 2.88 Mb 3"5 drive */
 137         val |= 0x60;
 138         break;
 139     case 2:
 140         /* 1.2 Mb 5"5 drive */
 141         val |= 0x20;
 142         break;
 143     }
 144     switch (fd1) {
 145     case 0:
 146         /* 1.44 Mb 3"5 drive */
 147         val |= 0x04;
 148         break;
 149     case 1:
 150         /* 2.88 Mb 3"5 drive */
 151         val |= 0x06;
 152         break;
 153     case 2:
 154         /* 1.2 Mb 5"5 drive */
 155         val |= 0x02;
 156         break;
 157     }
 158     rtc_set_memory(s, 0x10, val);
 159
 160     val = 0;
 161     nb = 0;
 162     if (fd0 < 3)
 163         nb++;
 164     if (fd1 < 3)
 165         nb++;
 166     switch (nb) {
 167     case 0:
 168         break;
 169     case 1:
 170         val |= 0x01; /* 1 drive, ready for boot */
 171         break;
 172     case 2:
 173         val |= 0x41; /* 2 drives, ready for boot */
 174         break;
 175     }
 176     val |= 0x02; /* FPU is there */
 177     val |= 0x04; /* PS/2 mouse installed */
 178     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 179
 180 }
 181
 182 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 183 {
 184     speaker_data_on = (val >> 1) & 1;
 185     pit_set_gate(pit, 2, val & 1);
 186 }
 187
 188 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
 189 {
 190     int out;
 191     out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
 192     dummy_refresh_clock ^= 1;
 193     return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
 194       (dummy_refresh_clock << 4);
 195 }
 196
 197 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 198 {
 199     cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
 200     /* XXX: bit 0 is fast reset */
 201 }
 202
 203 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 204 {
 205     return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
 206 }
 207
 208 /***********************************************************/
 209 /* Bochs BIOS debug ports */
 210
 211 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 212 {
 213     switch(addr) {
 214         /* Bochs BIOS messages */
 215     case 0x400:
 216     case 0x401:
 217         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 218         exit(1);
 219     case 0x402:
 220     case 0x403:
 221 #ifdef DEBUG_BIOS
 222         fprintf(stderr, "%c", val);
 223 #endif
 224         break;
 225
 226         /* LGPL'ed VGA BIOS messages */
 227     case 0x501:
 228     case 0x502:
 229         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 230         exit(1);
 231     case 0x500:
 232     case 0x503:
 233 #ifdef DEBUG_BIOS
 234         fprintf(stderr, "%c", val);
 235 #endif
 236         break;
 237     }
 238 }
 239
 240 void bochs_bios_init(void)
 241 {
 242     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 243     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 244     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 245     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 246
 247     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 248     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 249     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 250     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 251 }
 252
 253
 254 int load_kernel(const char *filename, uint8_t *addr,
 255                 uint8_t *real_addr)
 256 {
 257     int fd, size;
 258     int setup_sects;
 259
 260     fd = open(filename, O_RDONLY);
 261     if (fd < 0)
 262         return -1;
 263
 264     /* load 16 bit code */
 265     if (read(fd, real_addr, 512) != 512)
 266         goto fail;
 267     setup_sects = real_addr[0x1F1];
 268     if (!setup_sects)
 269         setup_sects = 4;
 270     if (read(fd, real_addr + 512, setup_sects * 512) !=
 271         setup_sects * 512)
 272         goto fail;
 273
 274     /* load 32 bit code */
 275     size = read(fd, addr, 16 * 1024 * 1024);
 276     if (size < 0)
 277         goto fail;
 278     close(fd);
 279     return size;
 280  fail:
 281     close(fd);
 282     return -1;
 283 }
 284
 285 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 286 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 287 static const int ide_irq[2] = { 14, 15 };
 288
 289 #define NE2000_NB_MAX 6
 290
 291 static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 292 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 293
 294 /* PC hardware initialisation */
 295 void pc_init(int ram_size, int vga_ram_size, int boot_device,
 296              DisplayState *ds, const char **fd_filename, int snapshot,
 297              const char *kernel_filename, const char *kernel_cmdline,
 298              const char *initrd_filename)
 299 {
 300     char buf[1024];
 301     int ret, linux_boot, initrd_size, i, nb_nics1, fd;
 302
 303     linux_boot = (kernel_filename != NULL);
 304
 305     /* allocate RAM */
 306     cpu_register_physical_memory(0, ram_size, 0);
 307
 308     /* BIOS load */
 309     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 310     ret = load_image(buf, phys_ram_base + 0x000f0000);
 311     if (ret != 0x10000) {
 312         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 313         exit(1);
 314     }
 315
 316     /* VGA BIOS load */
 317     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 318     ret = load_image(buf, phys_ram_base + 0x000c0000);
 319
 320     /* setup basic memory access */
 321     cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
 322     cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
 323     cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
 324
 325     bochs_bios_init();
 326
 327     if (linux_boot) {
 328         uint8_t bootsect[512];
 329         uint8_t old_bootsect[512];
 330
 331         if (bs_table[0] == NULL) {
 332             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 333             exit(1);
 334         }
 335         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 336         ret = load_image(buf, bootsect);
 337         if (ret != sizeof(bootsect)) {
 338             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 339                     buf);
 340             exit(1);
 341         }
 342
 343         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 344             /* copy the MSDOS partition table */
 345             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 346         }
 347
 348         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 349
 350         /* now we can load the kernel */
 351         ret = load_kernel(kernel_filename,
 352                           phys_ram_base + KERNEL_LOAD_ADDR,
 353                           phys_ram_base + KERNEL_PARAMS_ADDR);
 354         if (ret < 0) {
 355             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 356                     kernel_filename);
 357             exit(1);
 358         }
 359
 360         /* load initrd */
 361         initrd_size = 0;
 362         if (initrd_filename) {
 363             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 364             if (initrd_size < 0) {
 365                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 366                         initrd_filename);
 367                 exit(1);
 368             }
 369         }
 370         if (initrd_size > 0) {
 371             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 372             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 373         }
 374         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 375                 kernel_cmdline);
 376         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 377         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 378                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 379         /* loader type */
 380         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 381     }
 382
 383     /* init basic PC hardware */
 384     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 385
 386     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 387
 388     vga_initialize(ds, phys_ram_base + ram_size, ram_size,
 389                    vga_ram_size);
 390
 391     rtc_state = rtc_init(0x70, 8);
 392     register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
 393     register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
 394
 395     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 396     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 397
 398     pic_init();
 399     pit = pit_init(0x40, 0);
 400
 401     fd = serial_open_device();
 402     serial_init(0x3f8, 4, fd);
 403
 404     nb_nics1 = nb_nics;
 405     if (nb_nics1 > NE2000_NB_MAX)
 406         nb_nics1 = NE2000_NB_MAX;
 407     for(i = 0; i < nb_nics1; i++) {
 408         ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
 409     }
 410
 411     for(i = 0; i < 2; i++) {
 412         ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 413                  bs_table[2 * i], bs_table[2 * i + 1]);
 414     }
 415     kbd_init();
 416     DMA_init();
 417
 418 #ifndef _WIN32
 419     if (audio_enabled) {
 420         /* no audio supported yet for win32 */
 421         AUD_init();
 422         SB16_init();
 423     }
 424 #endif
 425
 426     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 427
 428     cmos_init(ram_size, boot_device);
 429 }