hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "apic.h"
  27 #include "fdc.h"
  28 #include "pci.h"
  29 #include "vmware_vga.h"
  30 #include "monitor.h"
  31 #include "fw_cfg.h"
  32 #include "hpet_emul.h"
  33 #include "smbios.h"
  34 #include "loader.h"
  35 #include "elf.h"
  36 #include "multiboot.h"
  37 #include "mc146818rtc.h"
  38 #include "sysbus.h"
  39 #include "sysemu.h"
  40
  41 /* output Bochs bios info messages */
  42 //#define DEBUG_BIOS
  43
  44 /* debug PC/ISA interrupts */
  45 //#define DEBUG_IRQ
  46
  47 #ifdef DEBUG_IRQ
  48 #define DPRINTF(fmt, ...)                                       \
  49     do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
  50 #else
  51 #define DPRINTF(fmt, ...)
  52 #endif
  53
  54 #define BIOS_FILENAME "bios.bin"
  55
  56 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  57
  58 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  59 #define ACPI_DATA_SIZE       0x10000
  60 #define BIOS_CFG_IOPORT 0x510
  61 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  62 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
  63 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
  64 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
  65 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
  66
  67 #define E820_NR_ENTRIES         16
  68
  69 struct e820_entry {
  70     uint64_t address;
  71     uint64_t length;
  72     uint32_t type;
  73 };
  74
  75 struct e820_table {
  76     uint32_t count;
  77     struct e820_entry entry[E820_NR_ENTRIES];
  78 };
  79
  80 static struct e820_table e820_table;
  81
  82 void isa_irq_handler(void *opaque, int n, int level)
  83 {
  84     IsaIrqState *isa = (IsaIrqState *)opaque;
  85
  86     DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n);
  87     if (n < 16) {
  88         qemu_set_irq(isa->i8259[n], level);
  89     }
  90     if (isa->ioapic)
  91         qemu_set_irq(isa->ioapic[n], level);
  92 };
  93
  94 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  95 {
  96 }
  97
  98 /* MSDOS compatibility mode FPU exception support */
  99 static qemu_irq ferr_irq;
 100
 101 void pc_register_ferr_irq(qemu_irq irq)
 102 {
 103     ferr_irq = irq;
 104 }
 105
 106 /* XXX: add IGNNE support */
 107 void cpu_set_ferr(CPUX86State *s)
 108 {
 109     qemu_irq_raise(ferr_irq);
 110 }
 111
 112 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
 113 {
 114     qemu_irq_lower(ferr_irq);
 115 }
 116
 117 /* TSC handling */
 118 uint64_t cpu_get_tsc(CPUX86State *env)
 119 {
 120     return cpu_get_ticks();
 121 }
 122
 123 /* SMM support */
 124
 125 static cpu_set_smm_t smm_set;
 126 static void *smm_arg;
 127
 128 void cpu_smm_register(cpu_set_smm_t callback, void *arg)
 129 {
 130     assert(smm_set == NULL);
 131     assert(smm_arg == NULL);
 132     smm_set = callback;
 133     smm_arg = arg;
 134 }
 135
 136 void cpu_smm_update(CPUState *env)
 137 {
 138     if (smm_set && smm_arg && env == first_cpu)
 139         smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
 140 }
 141
 142
 143 /* IRQ handling */
 144 int cpu_get_pic_interrupt(CPUState *env)
 145 {
 146     int intno;
 147
 148     intno = apic_get_interrupt(env->apic_state);
 149     if (intno >= 0) {
 150         /* set irq request if a PIC irq is still pending */
 151         /* XXX: improve that */
 152         pic_update_irq(isa_pic);
 153         return intno;
 154     }
 155     /* read the irq from the PIC */
 156     if (!apic_accept_pic_intr(env->apic_state)) {
 157         return -1;
 158     }
 159
 160     intno = pic_read_irq(isa_pic);
 161     return intno;
 162 }
 163
 164 static void pic_irq_request(void *opaque, int irq, int level)
 165 {
 166     CPUState *env = first_cpu;
 167
 168     DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
 169     if (env->apic_state) {
 170         while (env) {
 171             if (apic_accept_pic_intr(env->apic_state)) {
 172                 apic_deliver_pic_intr(env->apic_state, level);
 173             }
 174             env = env->next_cpu;
 175         }
 176     } else {
 177         if (level)
 178             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 179         else
 180             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 181     }
 182 }
 183
 184 /* PC cmos mappings */
 185
 186 #define REG_EQUIPMENT_BYTE          0x14
 187
 188 static int cmos_get_fd_drive_type(int fd0)
 189 {
 190     int val;
 191
 192     switch (fd0) {
 193     case 0:
 194         /* 1.44 Mb 3"5 drive */
 195         val = 4;
 196         break;
 197     case 1:
 198         /* 2.88 Mb 3"5 drive */
 199         val = 5;
 200         break;
 201     case 2:
 202         /* 1.2 Mb 5"5 drive */
 203         val = 2;
 204         break;
 205     default:
 206         val = 0;
 207         break;
 208     }
 209     return val;
 210 }
 211
 212 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
 213                          ISADevice *s)
 214 {
 215     int cylinders, heads, sectors;
 216     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 217     rtc_set_memory(s, type_ofs, 47);
 218     rtc_set_memory(s, info_ofs, cylinders);
 219     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 220     rtc_set_memory(s, info_ofs + 2, heads);
 221     rtc_set_memory(s, info_ofs + 3, 0xff);
 222     rtc_set_memory(s, info_ofs + 4, 0xff);
 223     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 224     rtc_set_memory(s, info_ofs + 6, cylinders);
 225     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 226     rtc_set_memory(s, info_ofs + 8, sectors);
 227 }
 228
 229 /* convert boot_device letter to something recognizable by the bios */
 230 static int boot_device2nibble(char boot_device)
 231 {
 232     switch(boot_device) {
 233     case 'a':
 234     case 'b':
 235         return 0x01; /* floppy boot */
 236     case 'c':
 237         return 0x02; /* hard drive boot */
 238     case 'd':
 239         return 0x03; /* CD-ROM boot */
 240     case 'n':
 241         return 0x04; /* Network boot */
 242     }
 243     return 0;
 244 }
 245
 246 static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk)
 247 {
 248 #define PC_MAX_BOOT_DEVICES 3
 249     int nbds, bds[3] = { 0, };
 250     int i;
 251
 252     nbds = strlen(boot_device);
 253     if (nbds > PC_MAX_BOOT_DEVICES) {
 254         error_report("Too many boot devices for PC");
 255         return(1);
 256     }
 257     for (i = 0; i < nbds; i++) {
 258         bds[i] = boot_device2nibble(boot_device[i]);
 259         if (bds[i] == 0) {
 260             error_report("Invalid boot device for PC: '%c'",
 261                          boot_device[i]);
 262             return(1);
 263         }
 264     }
 265     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 266     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
 267     return(0);
 268 }
 269
 270 static int pc_boot_set(void *opaque, const char *boot_device)
 271 {
 272     return set_boot_dev(opaque, boot_device, 0);
 273 }
 274
 275 /* hd_table must contain 4 block drivers */
 276 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 277                   const char *boot_device, DriveInfo **hd_table,
 278                   FDCtrl *floppy_controller, ISADevice *s)
 279 {
 280     int val;
 281     int fd0, fd1, nb;
 282     int i;
 283
 284     /* various important CMOS locations needed by PC/Bochs bios */
 285
 286     /* memory size */
 287     val = 640; /* base memory in K */
 288     rtc_set_memory(s, 0x15, val);
 289     rtc_set_memory(s, 0x16, val >> 8);
 290
 291     val = (ram_size / 1024) - 1024;
 292     if (val > 65535)
 293         val = 65535;
 294     rtc_set_memory(s, 0x17, val);
 295     rtc_set_memory(s, 0x18, val >> 8);
 296     rtc_set_memory(s, 0x30, val);
 297     rtc_set_memory(s, 0x31, val >> 8);
 298
 299     if (above_4g_mem_size) {
 300         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 301         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 302         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 303     }
 304
 305     if (ram_size > (16 * 1024 * 1024))
 306         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 307     else
 308         val = 0;
 309     if (val > 65535)
 310         val = 65535;
 311     rtc_set_memory(s, 0x34, val);
 312     rtc_set_memory(s, 0x35, val >> 8);
 313
 314     /* set the number of CPU */
 315     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 316
 317     /* set boot devices, and disable floppy signature check if requested */
 318     if (set_boot_dev(s, boot_device, fd_bootchk)) {
 319         exit(1);
 320     }
 321
 322     /* floppy type */
 323
 324     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 325     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 326
 327     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 328     rtc_set_memory(s, 0x10, val);
 329
 330     val = 0;
 331     nb = 0;
 332     if (fd0 < 3)
 333         nb++;
 334     if (fd1 < 3)
 335         nb++;
 336     switch (nb) {
 337     case 0:
 338         break;
 339     case 1:
 340         val |= 0x01; /* 1 drive, ready for boot */
 341         break;
 342     case 2:
 343         val |= 0x41; /* 2 drives, ready for boot */
 344         break;
 345     }
 346     val |= 0x02; /* FPU is there */
 347     val |= 0x04; /* PS/2 mouse installed */
 348     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 349
 350     /* hard drives */
 351
 352     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 353     if (hd_table[0])
 354         cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv, s);
 355     if (hd_table[1])
 356         cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv, s);
 357
 358     val = 0;
 359     for (i = 0; i < 4; i++) {
 360         if (hd_table[i]) {
 361             int cylinders, heads, sectors, translation;
 362             /* NOTE: bdrv_get_geometry_hint() returns the physical
 363                 geometry.  It is always such that: 1 <= sects <= 63, 1
 364                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 365                 geometry can be different if a translation is done. */
 366             translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
 367             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 368                 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
 369                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 370                     /* No translation. */
 371                     translation = 0;
 372                 } else {
 373                     /* LBA translation. */
 374                     translation = 1;
 375                 }
 376             } else {
 377                 translation--;
 378             }
 379             val |= translation << (i * 2);
 380         }
 381     }
 382     rtc_set_memory(s, 0x39, val);
 383 }
 384
 385 static void handle_a20_line_change(void *opaque, int irq, int level)
 386 {
 387     CPUState *cpu = opaque;
 388
 389     /* XXX: send to all CPUs ? */
 390     cpu_x86_set_a20(cpu, level);
 391 }
 392
 393 /***********************************************************/
 394 /* Bochs BIOS debug ports */
 395
 396 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 397 {
 398     static const char shutdown_str[8] = "Shutdown";
 399     static int shutdown_index = 0;
 400
 401     switch(addr) {
 402         /* Bochs BIOS messages */
 403     case 0x400:
 404     case 0x401:
 405         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 406         exit(1);
 407     case 0x402:
 408     case 0x403:
 409 #ifdef DEBUG_BIOS
 410         fprintf(stderr, "%c", val);
 411 #endif
 412         break;
 413     case 0x8900:
 414         /* same as Bochs power off */
 415         if (val == shutdown_str[shutdown_index]) {
 416             shutdown_index++;
 417             if (shutdown_index == 8) {
 418                 shutdown_index = 0;
 419                 qemu_system_shutdown_request();
 420             }
 421         } else {
 422             shutdown_index = 0;
 423         }
 424         break;
 425
 426         /* LGPL'ed VGA BIOS messages */
 427     case 0x501:
 428     case 0x502:
 429         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 430         exit(1);
 431     case 0x500:
 432     case 0x503:
 433 #ifdef DEBUG_BIOS
 434         fprintf(stderr, "%c", val);
 435 #endif
 436         break;
 437     }
 438 }
 439
 440 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 441 {
 442     int index = e820_table.count;
 443     struct e820_entry *entry;
 444
 445     if (index >= E820_NR_ENTRIES)
 446         return -EBUSY;
 447     entry = &e820_table.entry[index];
 448
 449     entry->address = address;
 450     entry->length = length;
 451     entry->type = type;
 452
 453     e820_table.count++;
 454     return e820_table.count;
 455 }
 456
 457 static void *bochs_bios_init(void)
 458 {
 459     void *fw_cfg;
 460     uint8_t *smbios_table;
 461     size_t smbios_len;
 462     uint64_t *numa_fw_cfg;
 463     int i, j;
 464
 465     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 466     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 467     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 468     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 469     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 470
 471     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 472     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 473     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 474     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 475
 476     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 477
 478     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 479     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 480     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
 481                      acpi_tables_len);
 482     fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
 483
 484     smbios_table = smbios_get_table(&smbios_len);
 485     if (smbios_table)
 486         fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
 487                          smbios_table, smbios_len);
 488     fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table,
 489                      sizeof(struct e820_table));
 490
 491     fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, (uint8_t *)&hpet_cfg,
 492                      sizeof(struct hpet_fw_config));
 493     /* allocate memory for the NUMA channel: one (64bit) word for the number
 494      * of nodes, one word for each VCPU->node and one word for each node to
 495      * hold the amount of memory.
 496      */
 497     numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
 498     numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
 499     for (i = 0; i < smp_cpus; i++) {
 500         for (j = 0; j < nb_numa_nodes; j++) {
 501             if (node_cpumask[j] & (1 << i)) {
 502                 numa_fw_cfg[i + 1] = cpu_to_le64(j);
 503                 break;
 504             }
 505         }
 506     }
 507     for (i = 0; i < nb_numa_nodes; i++) {
 508         numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
 509     }
 510     fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
 511                      (1 + smp_cpus + nb_numa_nodes) * 8);
 512
 513     return fw_cfg;
 514 }
 515
 516 static long get_file_size(FILE *f)
 517 {
 518     long where, size;
 519
 520     /* XXX: on Unix systems, using fstat() probably makes more sense */
 521
 522     where = ftell(f);
 523     fseek(f, 0, SEEK_END);
 524     size = ftell(f);
 525     fseek(f, where, SEEK_SET);
 526
 527     return size;
 528 }
 529
 530 static void load_linux(void *fw_cfg,
 531                        const char *kernel_filename,
 532                        const char *initrd_filename,
 533                        const char *kernel_cmdline,
 534                        target_phys_addr_t max_ram_size)
 535 {
 536     uint16_t protocol;
 537     int setup_size, kernel_size, initrd_size = 0, cmdline_size;
 538     uint32_t initrd_max;
 539     uint8_t header[8192], *setup, *kernel, *initrd_data;
 540     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
 541     FILE *f;
 542     char *vmode;
 543
 544     /* Align to 16 bytes as a paranoia measure */
 545     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 546
 547     /* load the kernel header */
 548     f = fopen(kernel_filename, "rb");
 549     if (!f || !(kernel_size = get_file_size(f)) ||
 550         fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
 551         MIN(ARRAY_SIZE(header), kernel_size)) {
 552         fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
 553                 kernel_filename, strerror(errno));
 554         exit(1);
 555     }
 556
 557     /* kernel protocol version */
 558 #if 0
 559     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 560 #endif
 561     if (ldl_p(header+0x202) == 0x53726448)
 562         protocol = lduw_p(header+0x206);
 563     else {
 564         /* This looks like a multiboot kernel. If it is, let's stop
 565            treating it like a Linux kernel. */
 566         if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
 567                            kernel_cmdline, kernel_size, header))
 568             return;
 569         protocol = 0;
 570     }
 571
 572     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 573         /* Low kernel */
 574         real_addr    = 0x90000;
 575         cmdline_addr = 0x9a000 - cmdline_size;
 576         prot_addr    = 0x10000;
 577     } else if (protocol < 0x202) {
 578         /* High but ancient kernel */
 579         real_addr    = 0x90000;
 580         cmdline_addr = 0x9a000 - cmdline_size;
 581         prot_addr    = 0x100000;
 582     } else {
 583         /* High and recent kernel */
 584         real_addr    = 0x10000;
 585         cmdline_addr = 0x20000;
 586         prot_addr    = 0x100000;
 587     }
 588
 589 #if 0
 590     fprintf(stderr,
 591             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 592             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 593             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 594             real_addr,
 595             cmdline_addr,
 596             prot_addr);
 597 #endif
 598
 599     /* highest address for loading the initrd */
 600     if (protocol >= 0x203)
 601         initrd_max = ldl_p(header+0x22c);
 602     else
 603         initrd_max = 0x37ffffff;
 604
 605     if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
 606         initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
 607
 608     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
 609     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
 610     fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
 611                      (uint8_t*)strdup(kernel_cmdline),
 612                      strlen(kernel_cmdline)+1);
 613
 614     if (protocol >= 0x202) {
 615         stl_p(header+0x228, cmdline_addr);
 616     } else {
 617         stw_p(header+0x20, 0xA33F);
 618         stw_p(header+0x22, cmdline_addr-real_addr);
 619     }
 620
 621     /* handle vga= parameter */
 622     vmode = strstr(kernel_cmdline, "vga=");
 623     if (vmode) {
 624         unsigned int video_mode;
 625         /* skip "vga=" */
 626         vmode += 4;
 627         if (!strncmp(vmode, "normal", 6)) {
 628             video_mode = 0xffff;
 629         } else if (!strncmp(vmode, "ext", 3)) {
 630             video_mode = 0xfffe;
 631         } else if (!strncmp(vmode, "ask", 3)) {
 632             video_mode = 0xfffd;
 633         } else {
 634             video_mode = strtol(vmode, NULL, 0);
 635         }
 636         stw_p(header+0x1fa, video_mode);
 637     }
 638
 639     /* loader type */
 640     /* High nybble = B reserved for Qemu; low nybble is revision number.
 641        If this code is substantially changed, you may want to consider
 642        incrementing the revision. */
 643     if (protocol >= 0x200)
 644         header[0x210] = 0xB0;
 645
 646     /* heap */
 647     if (protocol >= 0x201) {
 648         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 649         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 650     }
 651
 652     /* load initrd */
 653     if (initrd_filename) {
 654         if (protocol < 0x200) {
 655             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 656             exit(1);
 657         }
 658
 659         initrd_size = get_image_size(initrd_filename);
 660         if (initrd_size < 0) {
 661             fprintf(stderr, "qemu: error reading initrd %s\n",
 662                     initrd_filename);
 663             exit(1);
 664         }
 665
 666         initrd_addr = (initrd_max-initrd_size) & ~4095;
 667
 668         initrd_data = qemu_malloc(initrd_size);
 669         load_image(initrd_filename, initrd_data);
 670
 671         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
 672         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 673         fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
 674
 675         stl_p(header+0x218, initrd_addr);
 676         stl_p(header+0x21c, initrd_size);
 677     }
 678
 679     /* load kernel and setup */
 680     setup_size = header[0x1f1];
 681     if (setup_size == 0)
 682         setup_size = 4;
 683     setup_size = (setup_size+1)*512;
 684     kernel_size -= setup_size;
 685
 686     setup  = qemu_malloc(setup_size);
 687     kernel = qemu_malloc(kernel_size);
 688     fseek(f, 0, SEEK_SET);
 689     if (fread(setup, 1, setup_size, f) != setup_size) {
 690         fprintf(stderr, "fread() failed\n");
 691         exit(1);
 692     }
 693     if (fread(kernel, 1, kernel_size, f) != kernel_size) {
 694         fprintf(stderr, "fread() failed\n");
 695         exit(1);
 696     }
 697     fclose(f);
 698     memcpy(setup, header, MIN(sizeof(header), setup_size));
 699
 700     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
 701     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 702     fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
 703
 704     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
 705     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
 706     fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
 707
 708     option_rom[nb_option_roms] = "linuxboot.bin";
 709     nb_option_roms++;
 710 }
 711
 712 #define NE2000_NB_MAX 6
 713
 714 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
 715                                               0x280, 0x380 };
 716 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 717
 718 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 719 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 720
 721 #ifdef HAS_AUDIO
 722 void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic)
 723 {
 724     struct soundhw *c;
 725
 726     for (c = soundhw; c->name; ++c) {
 727         if (c->enabled) {
 728             if (c->isa) {
 729                 c->init.init_isa(pic);
 730             } else {
 731                 if (pci_bus) {
 732                     c->init.init_pci(pci_bus);
 733                 }
 734             }
 735         }
 736     }
 737 }
 738 #endif
 739
 740 void pc_init_ne2k_isa(NICInfo *nd)
 741 {
 742     static int nb_ne2k = 0;
 743
 744     if (nb_ne2k == NE2000_NB_MAX)
 745         return;
 746     isa_ne2000_init(ne2000_io[nb_ne2k],
 747                     ne2000_irq[nb_ne2k], nd);
 748     nb_ne2k++;
 749 }
 750
 751 int cpu_is_bsp(CPUState *env)
 752 {
 753     /* We hard-wire the BSP to the first CPU. */
 754     return env->cpu_index == 0;
 755 }
 756
 757 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
 758    BIOS will read it and start S3 resume at POST Entry */
 759 void pc_cmos_set_s3_resume(void *opaque, int irq, int level)
 760 {
 761     ISADevice *s = opaque;
 762
 763     if (level) {
 764         rtc_set_memory(s, 0xF, 0xFE);
 765     }
 766 }
 767
 768 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
 769 {
 770     CPUState *s = opaque;
 771
 772     if (level) {
 773         cpu_interrupt(s, CPU_INTERRUPT_SMI);
 774     }
 775 }
 776
 777 static CPUState *pc_new_cpu(const char *cpu_model)
 778 {
 779     CPUState *env;
 780
 781     env = cpu_init(cpu_model);
 782     if (!env) {
 783         fprintf(stderr, "Unable to find x86 CPU definition\n");
 784         exit(1);
 785     }
 786     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
 787         env->cpuid_apic_id = env->cpu_index;
 788         /* APIC reset callback resets cpu */
 789         apic_init(env);
 790     } else {
 791         qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
 792     }
 793     return env;
 794 }
 795
 796 void pc_cpus_init(const char *cpu_model)
 797 {
 798     int i;
 799
 800     /* init CPUs */
 801     if (cpu_model == NULL) {
 802 #ifdef TARGET_X86_64
 803         cpu_model = "qemu64";
 804 #else
 805         cpu_model = "qemu32";
 806 #endif
 807     }
 808
 809     for(i = 0; i < smp_cpus; i++) {
 810         pc_new_cpu(cpu_model);
 811     }
 812 }
 813
 814 void pc_memory_init(ram_addr_t ram_size,
 815                     const char *kernel_filename,
 816                     const char *kernel_cmdline,
 817                     const char *initrd_filename,
 818                     ram_addr_t *below_4g_mem_size_p,
 819                     ram_addr_t *above_4g_mem_size_p)
 820 {
 821     char *filename;
 822     int ret, linux_boot, i;
 823     ram_addr_t ram_addr, bios_offset, option_rom_offset;
 824     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 825     int bios_size, isa_bios_size;
 826     void *fw_cfg;
 827
 828     if (ram_size >= 0xe0000000 ) {
 829         above_4g_mem_size = ram_size - 0xe0000000;
 830         below_4g_mem_size = 0xe0000000;
 831     } else {
 832         below_4g_mem_size = ram_size;
 833     }
 834     *above_4g_mem_size_p = above_4g_mem_size;
 835     *below_4g_mem_size_p = below_4g_mem_size;
 836
 837     linux_boot = (kernel_filename != NULL);
 838
 839     /* allocate RAM */
 840     ram_addr = qemu_ram_alloc(below_4g_mem_size);
 841     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 842     cpu_register_physical_memory(0x100000,
 843                  below_4g_mem_size - 0x100000,
 844                  ram_addr + 0x100000);
 845
 846     /* above 4giga memory allocation */
 847     if (above_4g_mem_size > 0) {
 848 #if TARGET_PHYS_ADDR_BITS == 32
 849         hw_error("To much RAM for 32-bit physical address");
 850 #else
 851         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 852         cpu_register_physical_memory(0x100000000ULL,
 853                                      above_4g_mem_size,
 854                                      ram_addr);
 855 #endif
 856     }
 857
 858
 859     /* BIOS load */
 860     if (bios_name == NULL)
 861         bios_name = BIOS_FILENAME;
 862     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 863     if (filename) {
 864         bios_size = get_image_size(filename);
 865     } else {
 866         bios_size = -1;
 867     }
 868     if (bios_size <= 0 ||
 869         (bios_size % 65536) != 0) {
 870         goto bios_error;
 871     }
 872     bios_offset = qemu_ram_alloc(bios_size);
 873     ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
 874     if (ret != 0) {
 875     bios_error:
 876         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
 877         exit(1);
 878     }
 879     if (filename) {
 880         qemu_free(filename);
 881     }
 882     /* map the last 128KB of the BIOS in ISA space */
 883     isa_bios_size = bios_size;
 884     if (isa_bios_size > (128 * 1024))
 885         isa_bios_size = 128 * 1024;
 886     cpu_register_physical_memory(0x100000 - isa_bios_size,
 887                                  isa_bios_size,
 888                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 889
 890     option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
 891     cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
 892
 893     /* map all the bios at the top of memory */
 894     cpu_register_physical_memory((uint32_t)(-bios_size),
 895                                  bios_size, bios_offset | IO_MEM_ROM);
 896
 897     fw_cfg = bochs_bios_init();
 898     rom_set_fw(fw_cfg);
 899
 900     if (linux_boot) {
 901         load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
 902     }
 903
 904     for (i = 0; i < nb_option_roms; i++) {
 905         rom_add_option(option_rom[i]);
 906     }
 907 }
 908
 909 qemu_irq *pc_allocate_cpu_irq(void)
 910 {
 911     return qemu_allocate_irqs(pic_irq_request, NULL, 1);
 912 }
 913
 914 void pc_vga_init(PCIBus *pci_bus)
 915 {
 916     if (cirrus_vga_enabled) {
 917         if (pci_bus) {
 918             pci_cirrus_vga_init(pci_bus);
 919         } else {
 920             isa_cirrus_vga_init();
 921         }
 922     } else if (vmsvga_enabled) {
 923         if (pci_bus)
 924             pci_vmsvga_init(pci_bus);
 925         else
 926             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 927     } else if (std_vga_enabled) {
 928         if (pci_bus) {
 929             pci_vga_init(pci_bus, 0, 0);
 930         } else {
 931             isa_vga_init();
 932         }
 933     }
 934 }
 935
 936 static void cpu_request_exit(void *opaque, int irq, int level)
 937 {
 938     CPUState *env = cpu_single_env;
 939
 940     if (env && level) {
 941         cpu_exit(env);
 942     }
 943 }
 944
 945 void pc_basic_device_init(qemu_irq *isa_irq,
 946                           FDCtrl **floppy_controller,
 947                           ISADevice **rtc_state)
 948 {
 949     int i;
 950     DriveInfo *fd[MAX_FD];
 951     PITState *pit;
 952     qemu_irq rtc_irq = NULL;
 953     qemu_irq *a20_line;
 954     ISADevice *i8042;
 955     qemu_irq *cpu_exit_irq;
 956
 957     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 958
 959     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 960
 961     if (!no_hpet) {
 962         DeviceState *hpet = sysbus_create_simple("hpet", HPET_BASE, NULL);
 963
 964         for (i = 0; i < 24; i++) {
 965             sysbus_connect_irq(sysbus_from_qdev(hpet), i, isa_irq[i]);
 966         }
 967         rtc_irq = qdev_get_gpio_in(hpet, 0);
 968     }
 969     *rtc_state = rtc_init(2000, rtc_irq);
 970
 971     qemu_register_boot_set(pc_boot_set, *rtc_state);
 972
 973     pit = pit_init(0x40, isa_reserve_irq(0));
 974     pcspk_init(pit);
 975
 976     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 977         if (serial_hds[i]) {
 978             serial_isa_init(i, serial_hds[i]);
 979         }
 980     }
 981
 982     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 983         if (parallel_hds[i]) {
 984             parallel_init(i, parallel_hds[i]);
 985         }
 986     }
 987
 988     a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1);
 989     i8042 = isa_create_simple("i8042");
 990     i8042_setup_a20_line(i8042, a20_line);
 991     vmmouse_init(i8042);
 992
 993     cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
 994     DMA_init(0, cpu_exit_irq);
 995
 996     for(i = 0; i < MAX_FD; i++) {
 997         fd[i] = drive_get(IF_FLOPPY, 0, i);
 998     }
 999     *floppy_controller = fdctrl_init_isa(fd);
1000 }
1001
1002 void pc_pci_device_init(PCIBus *pci_bus)
1003 {
1004     int max_bus;
1005     int bus;
1006
1007     max_bus = drive_get_max_bus(IF_SCSI);
1008     for (bus = 0; bus <= max_bus; bus++) {
1009         pci_create_simple(pci_bus, -1, "lsi53c895a");
1010     }
1011 }