hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  33
  34 #define KERNEL_LOAD_ADDR     0x00100000
  35 #define INITRD_LOAD_ADDR     0x00400000
  36 #define KERNEL_PARAMS_ADDR   0x00090000
  37 #define KERNEL_CMDLINE_ADDR  0x00099000
  38
  39 int speaker_data_on;
  40 int dummy_refresh_clock;
  41 static fdctrl_t *floppy_controller;
  42 static RTCState *rtc_state;
  43 static PITState *pit;
  44
  45 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  46 {
  47 }
  48
  49 /* MSDOS compatibility mode FPU exception support */
  50 /* XXX: add IGNNE support */
  51 void cpu_set_ferr(CPUX86State *s)
  52 {
  53     pic_set_irq(13, 1);
  54 }
  55
  56 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  57 {
  58     pic_set_irq(13, 0);
  59 }
  60
  61 /* TSC handling */
  62
  63 uint64_t cpu_get_tsc(CPUX86State *env)
  64 {
  65     return qemu_get_clock(vm_clock);
  66 }
  67
  68 /* PC cmos mappings */
  69
  70 #define REG_EQUIPMENT_BYTE          0x14
  71 #define REG_IBM_CENTURY_BYTE        0x32
  72 #define REG_IBM_PS2_CENTURY_BYTE    0x37
  73
  74
  75 static inline int to_bcd(RTCState *s, int a)
  76 {
  77     return ((a / 10) << 4) | (a % 10);
  78 }
  79
  80 static int cmos_get_fd_drive_type(int fd0)
  81 {
  82     int val;
  83
  84     switch (fd0) {
  85     case 0:
  86         /* 1.44 Mb 3"5 drive */
  87         val = 4;
  88         break;
  89     case 1:
  90         /* 2.88 Mb 3"5 drive */
  91         val = 5;
  92         break;
  93     case 2:
  94         /* 1.2 Mb 5"5 drive */
  95         val = 2;
  96         break;
  97     default:
  98         val = 0;
  99         break;
 100     }
 101     return val;
 102 }
 103
 104 static void cmos_init(int ram_size, int boot_device)
 105 {
 106     RTCState *s = rtc_state;
 107     int val;
 108     int fd0, fd1, nb;
 109     time_t ti;
 110     struct tm *tm;
 111
 112     /* set the CMOS date */
 113     time(&ti);
 114     if (rtc_utc)
 115         tm = gmtime(&ti);
 116     else
 117         tm = localtime(&ti);
 118     rtc_set_date(s, tm);
 119
 120     val = to_bcd(s, (tm->tm_year / 100) + 19);
 121     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
 122     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
 123
 124     /* various important CMOS locations needed by PC/Bochs bios */
 125
 126     /* memory size */
 127     val = 640; /* base memory in K */
 128     rtc_set_memory(s, 0x15, val);
 129     rtc_set_memory(s, 0x16, val >> 8);
 130
 131     val = (ram_size / 1024) - 1024;
 132     if (val > 65535)
 133         val = 65535;
 134     rtc_set_memory(s, 0x17, val);
 135     rtc_set_memory(s, 0x18, val >> 8);
 136     rtc_set_memory(s, 0x30, val);
 137     rtc_set_memory(s, 0x31, val >> 8);
 138
 139     val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 140     if (val > 65535)
 141         val = 65535;
 142     rtc_set_memory(s, 0x34, val);
 143     rtc_set_memory(s, 0x35, val >> 8);
 144
 145     switch(boot_device) {
 146     case 'a':
 147     case 'b':
 148         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 149         break;
 150     default:
 151     case 'c':
 152         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 153         break;
 154     case 'd':
 155         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 156         break;
 157     }
 158
 159     /* floppy type */
 160
 161     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 162     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 163
 164     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 165     rtc_set_memory(s, 0x10, val);
 166
 167     val = 0;
 168     nb = 0;
 169     if (fd0 < 3)
 170         nb++;
 171     if (fd1 < 3)
 172         nb++;
 173     switch (nb) {
 174     case 0:
 175         break;
 176     case 1:
 177         val |= 0x01; /* 1 drive, ready for boot */
 178         break;
 179     case 2:
 180         val |= 0x41; /* 2 drives, ready for boot */
 181         break;
 182     }
 183     val |= 0x02; /* FPU is there */
 184     val |= 0x04; /* PS/2 mouse installed */
 185     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 186
 187 }
 188
 189 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 190 {
 191     speaker_data_on = (val >> 1) & 1;
 192     pit_set_gate(pit, 2, val & 1);
 193 }
 194
 195 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
 196 {
 197     int out;
 198     out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
 199     dummy_refresh_clock ^= 1;
 200     return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
 201       (dummy_refresh_clock << 4);
 202 }
 203
 204 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 205 {
 206     cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
 207     /* XXX: bit 0 is fast reset */
 208 }
 209
 210 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 211 {
 212     return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
 213 }
 214
 215 /***********************************************************/
 216 /* Bochs BIOS debug ports */
 217
 218 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 219 {
 220     switch(addr) {
 221         /* Bochs BIOS messages */
 222     case 0x400:
 223     case 0x401:
 224         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 225         exit(1);
 226     case 0x402:
 227     case 0x403:
 228 #ifdef DEBUG_BIOS
 229         fprintf(stderr, "%c", val);
 230 #endif
 231         break;
 232
 233         /* LGPL'ed VGA BIOS messages */
 234     case 0x501:
 235     case 0x502:
 236         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 237         exit(1);
 238     case 0x500:
 239     case 0x503:
 240 #ifdef DEBUG_BIOS
 241         fprintf(stderr, "%c", val);
 242 #endif
 243         break;
 244     }
 245 }
 246
 247 void bochs_bios_init(void)
 248 {
 249     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 250     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 251     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 252     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 253
 254     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 255     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 256     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 257     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 258 }
 259
 260
 261 int load_kernel(const char *filename, uint8_t *addr,
 262                 uint8_t *real_addr)
 263 {
 264     int fd, size;
 265     int setup_sects;
 266
 267     fd = open(filename, O_RDONLY);
 268     if (fd < 0)
 269         return -1;
 270
 271     /* load 16 bit code */
 272     if (read(fd, real_addr, 512) != 512)
 273         goto fail;
 274     setup_sects = real_addr[0x1F1];
 275     if (!setup_sects)
 276         setup_sects = 4;
 277     if (read(fd, real_addr + 512, setup_sects * 512) !=
 278         setup_sects * 512)
 279         goto fail;
 280
 281     /* load 32 bit code */
 282     size = read(fd, addr, 16 * 1024 * 1024);
 283     if (size < 0)
 284         goto fail;
 285     close(fd);
 286     return size;
 287  fail:
 288     close(fd);
 289     return -1;
 290 }
 291
 292 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 293 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 294 static const int ide_irq[2] = { 14, 15 };
 295
 296 #define NE2000_NB_MAX 6
 297
 298 static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 299 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 300
 301 /* PC hardware initialisation */
 302 void pc_init(int ram_size, int vga_ram_size, int boot_device,
 303              DisplayState *ds, const char **fd_filename, int snapshot,
 304              const char *kernel_filename, const char *kernel_cmdline,
 305              const char *initrd_filename)
 306 {
 307     char buf[1024];
 308     int ret, linux_boot, initrd_size, i, nb_nics1, fd;
 309
 310     linux_boot = (kernel_filename != NULL);
 311
 312     /* allocate RAM */
 313     cpu_register_physical_memory(0, ram_size, 0);
 314
 315     /* BIOS load */
 316     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 317     ret = load_image(buf, phys_ram_base + 0x000f0000);
 318     if (ret != 0x10000) {
 319         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 320         exit(1);
 321     }
 322
 323     /* VGA BIOS load */
 324     if (cirrus_vga_enabled) {
 325         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 326     } else {
 327         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 328     }
 329     ret = load_image(buf, phys_ram_base + 0x000c0000);
 330
 331     /* setup basic memory access */
 332     cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
 333     cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
 334     cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
 335
 336     bochs_bios_init();
 337
 338     if (linux_boot) {
 339         uint8_t bootsect[512];
 340         uint8_t old_bootsect[512];
 341
 342         if (bs_table[0] == NULL) {
 343             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 344             exit(1);
 345         }
 346         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 347         ret = load_image(buf, bootsect);
 348         if (ret != sizeof(bootsect)) {
 349             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 350                     buf);
 351             exit(1);
 352         }
 353
 354         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 355             /* copy the MSDOS partition table */
 356             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 357         }
 358
 359         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 360
 361         /* now we can load the kernel */
 362         ret = load_kernel(kernel_filename,
 363                           phys_ram_base + KERNEL_LOAD_ADDR,
 364                           phys_ram_base + KERNEL_PARAMS_ADDR);
 365         if (ret < 0) {
 366             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 367                     kernel_filename);
 368             exit(1);
 369         }
 370
 371         /* load initrd */
 372         initrd_size = 0;
 373         if (initrd_filename) {
 374             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 375             if (initrd_size < 0) {
 376                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 377                         initrd_filename);
 378                 exit(1);
 379             }
 380         }
 381         if (initrd_size > 0) {
 382             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 383             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 384         }
 385         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 386                 kernel_cmdline);
 387         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 388         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 389                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 390         /* loader type */
 391         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 392     }
 393
 394     if (pci_enabled) {
 395         i440fx_init();
 396         piix3_init();
 397     }
 398
 399     /* init basic PC hardware */
 400     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 401
 402     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 403
 404     if (cirrus_vga_enabled) {
 405         if (pci_enabled) {
 406             pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
 407                                 vga_ram_size);
 408         } else {
 409             isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
 410                                 vga_ram_size);
 411         }
 412     } else {
 413         vga_initialize(ds, phys_ram_base + ram_size, ram_size,
 414                        vga_ram_size, pci_enabled);
 415     }
 416
 417     rtc_state = rtc_init(0x70, 8);
 418     register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
 419     register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
 420
 421     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 422     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 423
 424     pic_init();
 425     pit = pit_init(0x40, 0);
 426
 427     fd = serial_open_device();
 428     serial_init(0x3f8, 4, fd);
 429
 430     if (pci_enabled) {
 431         for(i = 0; i < nb_nics; i++) {
 432             pci_ne2000_init(&nd_table[i]);
 433         }
 434         pci_piix3_ide_init(bs_table);
 435     } else {
 436         nb_nics1 = nb_nics;
 437         if (nb_nics1 > NE2000_NB_MAX)
 438             nb_nics1 = NE2000_NB_MAX;
 439         for(i = 0; i < nb_nics1; i++) {
 440             isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
 441         }
 442
 443         for(i = 0; i < 2; i++) {
 444             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 445                          bs_table[2 * i], bs_table[2 * i + 1]);
 446         }
 447     }
 448
 449     kbd_init();
 450     DMA_init();
 451
 452 #ifndef _WIN32
 453     if (audio_enabled) {
 454         /* no audio supported yet for win32 */
 455         AUD_init();
 456         SB16_init();
 457     }
 458 #endif
 459
 460     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 461
 462     cmos_init(ram_size, boot_device);
 463
 464     /* must be done after all PCI devices are instanciated */
 465     /* XXX: should be done in the Bochs BIOS */
 466     if (pci_enabled) {
 467         pci_bios_init();
 468     }
 469 }