hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  32
  33 #define KERNEL_LOAD_ADDR     0x00100000
  34 #define INITRD_LOAD_ADDR     0x00400000
  35 #define KERNEL_PARAMS_ADDR   0x00090000
  36 #define KERNEL_CMDLINE_ADDR  0x00099000
  37
  38 int speaker_data_on;
  39 int dummy_refresh_clock;
  40 static fdctrl_t *floppy_controller;
  41 static RTCState *rtc_state;
  42 static PITState *pit;
  43
  44 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  45 {
  46 }
  47
  48 /* PC cmos mappings */
  49
  50 #define REG_EQUIPMENT_BYTE          0x14
  51 #define REG_IBM_CENTURY_BYTE        0x32
  52 #define REG_IBM_PS2_CENTURY_BYTE    0x37
  53
  54
  55 static inline int to_bcd(RTCState *s, int a)
  56 {
  57     return ((a / 10) << 4) | (a % 10);
  58 }
  59
  60 static void cmos_init(int ram_size, int boot_device)
  61 {
  62     RTCState *s = rtc_state;
  63     int val;
  64     int fd0, fd1, nb;
  65     time_t ti;
  66     struct tm *tm;
  67
  68     /* set the CMOS date */
  69     time(&ti);
  70     tm = gmtime(&ti);
  71     rtc_set_date(s, tm);
  72
  73     val = to_bcd(s, (tm->tm_year / 100) + 19);
  74     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
  75     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
  76
  77     /* various important CMOS locations needed by PC/Bochs bios */
  78
  79     /* memory size */
  80     val = 640; /* base memory in K */
  81     rtc_set_memory(s, 0x15, val);
  82     rtc_set_memory(s, 0x16, val >> 8);
  83
  84     val = (ram_size / 1024) - 1024;
  85     if (val > 65535)
  86         val = 65535;
  87     rtc_set_memory(s, 0x17, val);
  88     rtc_set_memory(s, 0x18, val >> 8);
  89     rtc_set_memory(s, 0x30, val);
  90     rtc_set_memory(s, 0x31, val >> 8);
  91
  92     val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
  93     if (val > 65535)
  94         val = 65535;
  95     rtc_set_memory(s, 0x34, val);
  96     rtc_set_memory(s, 0x35, val >> 8);
  97
  98     switch(boot_device) {
  99     case 'a':
 100     case 'b':
 101         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 102         break;
 103     default:
 104     case 'c':
 105         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 106         break;
 107     case 'd':
 108         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 109         break;
 110     }
 111
 112     /* floppy type */
 113
 114     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 115     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 116
 117     val = 0;
 118     switch (fd0) {
 119     case 0:
 120         /* 1.44 Mb 3"5 drive */
 121         val |= 0x40;
 122         break;
 123     case 1:
 124         /* 2.88 Mb 3"5 drive */
 125         val |= 0x60;
 126         break;
 127     case 2:
 128         /* 1.2 Mb 5"5 drive */
 129         val |= 0x20;
 130         break;
 131     }
 132     switch (fd1) {
 133     case 0:
 134         /* 1.44 Mb 3"5 drive */
 135         val |= 0x04;
 136         break;
 137     case 1:
 138         /* 2.88 Mb 3"5 drive */
 139         val |= 0x06;
 140         break;
 141     case 2:
 142         /* 1.2 Mb 5"5 drive */
 143         val |= 0x02;
 144         break;
 145     }
 146     rtc_set_memory(s, 0x10, val);
 147
 148     val = 0;
 149     nb = 0;
 150     if (fd0 < 3)
 151         nb++;
 152     if (fd1 < 3)
 153         nb++;
 154     switch (nb) {
 155     case 0:
 156         break;
 157     case 1:
 158         val |= 0x01; /* 1 drive, ready for boot */
 159         break;
 160     case 2:
 161         val |= 0x41; /* 2 drives, ready for boot */
 162         break;
 163     }
 164     val |= 0x02; /* FPU is there */
 165     val |= 0x04; /* PS/2 mouse installed */
 166     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 167
 168 }
 169
 170 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 171 {
 172     speaker_data_on = (val >> 1) & 1;
 173     pit_set_gate(pit, 2, val & 1);
 174 }
 175
 176 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
 177 {
 178     int out;
 179     out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
 180     dummy_refresh_clock ^= 1;
 181     return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
 182       (dummy_refresh_clock << 4);
 183 }
 184
 185 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 186 {
 187     cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
 188     /* XXX: bit 0 is fast reset */
 189 }
 190
 191 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 192 {
 193     return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
 194 }
 195
 196 /***********************************************************/
 197 /* Bochs BIOS debug ports */
 198
 199 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 200 {
 201     switch(addr) {
 202         /* Bochs BIOS messages */
 203     case 0x400:
 204     case 0x401:
 205         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 206         exit(1);
 207     case 0x402:
 208     case 0x403:
 209 #ifdef DEBUG_BIOS
 210         fprintf(stderr, "%c", val);
 211 #endif
 212         break;
 213
 214         /* LGPL'ed VGA BIOS messages */
 215     case 0x501:
 216     case 0x502:
 217         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 218         exit(1);
 219     case 0x500:
 220     case 0x503:
 221 #ifdef DEBUG_BIOS
 222         fprintf(stderr, "%c", val);
 223 #endif
 224         break;
 225     }
 226 }
 227
 228 void bochs_bios_init(void)
 229 {
 230     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 231     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 232     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 233     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 234
 235     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 236     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 237     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 238     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 239 }
 240
 241
 242 int load_kernel(const char *filename, uint8_t *addr,
 243                 uint8_t *real_addr)
 244 {
 245     int fd, size;
 246     int setup_sects;
 247
 248     fd = open(filename, O_RDONLY);
 249     if (fd < 0)
 250         return -1;
 251
 252     /* load 16 bit code */
 253     if (read(fd, real_addr, 512) != 512)
 254         goto fail;
 255     setup_sects = real_addr[0x1F1];
 256     if (!setup_sects)
 257         setup_sects = 4;
 258     if (read(fd, real_addr + 512, setup_sects * 512) !=
 259         setup_sects * 512)
 260         goto fail;
 261
 262     /* load 32 bit code */
 263     size = read(fd, addr, 16 * 1024 * 1024);
 264     if (size < 0)
 265         goto fail;
 266     close(fd);
 267     return size;
 268  fail:
 269     close(fd);
 270     return -1;
 271 }
 272
 273 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 274 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 275 static const int ide_irq[2] = { 14, 15 };
 276
 277 #define NE2000_NB_MAX 6
 278
 279 static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 280 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 281
 282 /* PC hardware initialisation */
 283 void pc_init(int ram_size, int vga_ram_size, int boot_device,
 284              DisplayState *ds, const char **fd_filename, int snapshot,
 285              const char *kernel_filename, const char *kernel_cmdline,
 286              const char *initrd_filename)
 287 {
 288     char buf[1024];
 289     int ret, linux_boot, initrd_size, i, nb_nics1, fd;
 290
 291     linux_boot = (kernel_filename != NULL);
 292
 293     /* allocate RAM */
 294     cpu_register_physical_memory(0, ram_size, 0);
 295
 296     /* BIOS load */
 297     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 298     ret = load_image(buf, phys_ram_base + 0x000f0000);
 299     if (ret != 0x10000) {
 300         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 301         exit(1);
 302     }
 303
 304     /* VGA BIOS load */
 305     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 306     ret = load_image(buf, phys_ram_base + 0x000c0000);
 307
 308     /* setup basic memory access */
 309     cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
 310     cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
 311     cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
 312
 313     bochs_bios_init();
 314
 315     if (linux_boot) {
 316         uint8_t bootsect[512];
 317         uint8_t old_bootsect[512];
 318
 319         if (bs_table[0] == NULL) {
 320             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 321             exit(1);
 322         }
 323         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 324         ret = load_image(buf, bootsect);
 325         if (ret != sizeof(bootsect)) {
 326             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 327                     buf);
 328             exit(1);
 329         }
 330
 331         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 332             /* copy the MSDOS partition table */
 333             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 334         }
 335
 336         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 337
 338         /* now we can load the kernel */
 339         ret = load_kernel(kernel_filename,
 340                           phys_ram_base + KERNEL_LOAD_ADDR,
 341                           phys_ram_base + KERNEL_PARAMS_ADDR);
 342         if (ret < 0) {
 343             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 344                     kernel_filename);
 345             exit(1);
 346         }
 347
 348         /* load initrd */
 349         initrd_size = 0;
 350         if (initrd_filename) {
 351             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 352             if (initrd_size < 0) {
 353                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 354                         initrd_filename);
 355                 exit(1);
 356             }
 357         }
 358         if (initrd_size > 0) {
 359             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 360             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 361         }
 362         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 363                 kernel_cmdline);
 364         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 365         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 366                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 367         /* loader type */
 368         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 369     }
 370
 371     /* init basic PC hardware */
 372     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 373
 374     vga_initialize(ds, phys_ram_base + ram_size, ram_size,
 375                    vga_ram_size);
 376
 377     rtc_state = rtc_init(0x70, 8);
 378     register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
 379     register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
 380
 381     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 382     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 383
 384     pic_init();
 385     pit = pit_init(0x40, 0);
 386
 387     fd = serial_open_device();
 388     serial_init(0x3f8, 4, fd);
 389
 390     nb_nics1 = nb_nics;
 391     if (nb_nics1 > NE2000_NB_MAX)
 392         nb_nics1 = NE2000_NB_MAX;
 393     for(i = 0; i < nb_nics1; i++) {
 394         ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
 395     }
 396
 397     for(i = 0; i < 2; i++) {
 398         ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 399                  bs_table[2 * i], bs_table[2 * i + 1]);
 400     }
 401     kbd_init();
 402     DMA_init();
 403
 404 #ifndef _WIN32
 405     if (audio_enabled) {
 406         /* no audio supported yet for win32 */
 407         AUD_init();
 408         SB16_init();
 409     }
 410 #endif
 411
 412     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 413
 414     cmos_init(ram_size, boot_device);
 415 }