hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "monitor.h"
  35 #include "fw_cfg.h"
  36 #include "virtio-blk.h"
  37 #include "virtio-balloon.h"
  38 #include "virtio-console.h"
  39 #include "hpet_emul.h"
  40
  41 /* output Bochs bios info messages */
  42 //#define DEBUG_BIOS
  43
  44 #define BIOS_FILENAME "bios.bin"
  45 #define VGABIOS_FILENAME "vgabios.bin"
  46 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  47
  48 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  49
  50 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  51 #define ACPI_DATA_SIZE       0x10000
  52 #define BIOS_CFG_IOPORT 0x510
  53 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  54
  55 #define MAX_IDE_BUS 2
  56
  57 static fdctrl_t *floppy_controller;
  58 static RTCState *rtc_state;
  59 static PITState *pit;
  60 static IOAPICState *ioapic;
  61 static PCIDevice *i440fx_state;
  62
  63 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  64 {
  65 }
  66
  67 /* MSDOS compatibility mode FPU exception support */
  68 static qemu_irq ferr_irq;
  69 /* XXX: add IGNNE support */
  70 void cpu_set_ferr(CPUX86State *s)
  71 {
  72     qemu_irq_raise(ferr_irq);
  73 }
  74
  75 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  76 {
  77     qemu_irq_lower(ferr_irq);
  78 }
  79
  80 /* TSC handling */
  81 uint64_t cpu_get_tsc(CPUX86State *env)
  82 {
  83     /* Note: when using kqemu, it is more logical to return the host TSC
  84        because kqemu does not trap the RDTSC instruction for
  85        performance reasons */
  86 #ifdef USE_KQEMU
  87     if (env->kqemu_enabled) {
  88         return cpu_get_real_ticks();
  89     } else
  90 #endif
  91     {
  92         return cpu_get_ticks();
  93     }
  94 }
  95
  96 /* SMM support */
  97 void cpu_smm_update(CPUState *env)
  98 {
  99     if (i440fx_state && env == first_cpu)
 100         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
 101 }
 102
 103
 104 /* IRQ handling */
 105 int cpu_get_pic_interrupt(CPUState *env)
 106 {
 107     int intno;
 108
 109     intno = apic_get_interrupt(env);
 110     if (intno >= 0) {
 111         /* set irq request if a PIC irq is still pending */
 112         /* XXX: improve that */
 113         pic_update_irq(isa_pic);
 114         return intno;
 115     }
 116     /* read the irq from the PIC */
 117     if (!apic_accept_pic_intr(env))
 118         return -1;
 119
 120     intno = pic_read_irq(isa_pic);
 121     return intno;
 122 }
 123
 124 static void pic_irq_request(void *opaque, int irq, int level)
 125 {
 126     CPUState *env = first_cpu;
 127
 128     if (env->apic_state) {
 129         while (env) {
 130             if (apic_accept_pic_intr(env))
 131                 apic_deliver_pic_intr(env, level);
 132             env = env->next_cpu;
 133         }
 134     } else {
 135         if (level)
 136             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 137         else
 138             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 139     }
 140 }
 141
 142 /* PC cmos mappings */
 143
 144 #define REG_EQUIPMENT_BYTE          0x14
 145
 146 static int cmos_get_fd_drive_type(int fd0)
 147 {
 148     int val;
 149
 150     switch (fd0) {
 151     case 0:
 152         /* 1.44 Mb 3"5 drive */
 153         val = 4;
 154         break;
 155     case 1:
 156         /* 2.88 Mb 3"5 drive */
 157         val = 5;
 158         break;
 159     case 2:
 160         /* 1.2 Mb 5"5 drive */
 161         val = 2;
 162         break;
 163     default:
 164         val = 0;
 165         break;
 166     }
 167     return val;
 168 }
 169
 170 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 171 {
 172     RTCState *s = rtc_state;
 173     int cylinders, heads, sectors;
 174     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 175     rtc_set_memory(s, type_ofs, 47);
 176     rtc_set_memory(s, info_ofs, cylinders);
 177     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 178     rtc_set_memory(s, info_ofs + 2, heads);
 179     rtc_set_memory(s, info_ofs + 3, 0xff);
 180     rtc_set_memory(s, info_ofs + 4, 0xff);
 181     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 182     rtc_set_memory(s, info_ofs + 6, cylinders);
 183     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 184     rtc_set_memory(s, info_ofs + 8, sectors);
 185 }
 186
 187 /* convert boot_device letter to something recognizable by the bios */
 188 static int boot_device2nibble(char boot_device)
 189 {
 190     switch(boot_device) {
 191     case 'a':
 192     case 'b':
 193         return 0x01; /* floppy boot */
 194     case 'c':
 195         return 0x02; /* hard drive boot */
 196     case 'd':
 197         return 0x03; /* CD-ROM boot */
 198     case 'n':
 199         return 0x04; /* Network boot */
 200     }
 201     return 0;
 202 }
 203
 204 /* copy/pasted from cmos_init, should be made a general function
 205  and used there as well */
 206 static int pc_boot_set(void *opaque, const char *boot_device)
 207 {
 208     Monitor *mon = cur_mon;
 209 #define PC_MAX_BOOT_DEVICES 3
 210     RTCState *s = (RTCState *)opaque;
 211     int nbds, bds[3] = { 0, };
 212     int i;
 213
 214     nbds = strlen(boot_device);
 215     if (nbds > PC_MAX_BOOT_DEVICES) {
 216         monitor_printf(mon, "Too many boot devices for PC\n");
 217         return(1);
 218     }
 219     for (i = 0; i < nbds; i++) {
 220         bds[i] = boot_device2nibble(boot_device[i]);
 221         if (bds[i] == 0) {
 222             monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
 223                            boot_device[i]);
 224             return(1);
 225         }
 226     }
 227     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 228     rtc_set_memory(s, 0x38, (bds[2] << 4));
 229     return(0);
 230 }
 231
 232 /* hd_table must contain 4 block drivers */
 233 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 234                       const char *boot_device, BlockDriverState **hd_table)
 235 {
 236     RTCState *s = rtc_state;
 237     int nbds, bds[3] = { 0, };
 238     int val;
 239     int fd0, fd1, nb;
 240     int i;
 241
 242     /* various important CMOS locations needed by PC/Bochs bios */
 243
 244     /* memory size */
 245     val = 640; /* base memory in K */
 246     rtc_set_memory(s, 0x15, val);
 247     rtc_set_memory(s, 0x16, val >> 8);
 248
 249     val = (ram_size / 1024) - 1024;
 250     if (val > 65535)
 251         val = 65535;
 252     rtc_set_memory(s, 0x17, val);
 253     rtc_set_memory(s, 0x18, val >> 8);
 254     rtc_set_memory(s, 0x30, val);
 255     rtc_set_memory(s, 0x31, val >> 8);
 256
 257     if (above_4g_mem_size) {
 258         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 259         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 260         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 261     }
 262
 263     if (ram_size > (16 * 1024 * 1024))
 264         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 265     else
 266         val = 0;
 267     if (val > 65535)
 268         val = 65535;
 269     rtc_set_memory(s, 0x34, val);
 270     rtc_set_memory(s, 0x35, val >> 8);
 271
 272     /* set the number of CPU */
 273     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 274
 275     /* set boot devices, and disable floppy signature check if requested */
 276 #define PC_MAX_BOOT_DEVICES 3
 277     nbds = strlen(boot_device);
 278     if (nbds > PC_MAX_BOOT_DEVICES) {
 279         fprintf(stderr, "Too many boot devices for PC\n");
 280         exit(1);
 281     }
 282     for (i = 0; i < nbds; i++) {
 283         bds[i] = boot_device2nibble(boot_device[i]);
 284         if (bds[i] == 0) {
 285             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 286                     boot_device[i]);
 287             exit(1);
 288         }
 289     }
 290     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 291     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 292
 293     /* floppy type */
 294
 295     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 296     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 297
 298     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 299     rtc_set_memory(s, 0x10, val);
 300
 301     val = 0;
 302     nb = 0;
 303     if (fd0 < 3)
 304         nb++;
 305     if (fd1 < 3)
 306         nb++;
 307     switch (nb) {
 308     case 0:
 309         break;
 310     case 1:
 311         val |= 0x01; /* 1 drive, ready for boot */
 312         break;
 313     case 2:
 314         val |= 0x41; /* 2 drives, ready for boot */
 315         break;
 316     }
 317     val |= 0x02; /* FPU is there */
 318     val |= 0x04; /* PS/2 mouse installed */
 319     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 320
 321     /* hard drives */
 322
 323     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 324     if (hd_table[0])
 325         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 326     if (hd_table[1])
 327         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 328
 329     val = 0;
 330     for (i = 0; i < 4; i++) {
 331         if (hd_table[i]) {
 332             int cylinders, heads, sectors, translation;
 333             /* NOTE: bdrv_get_geometry_hint() returns the physical
 334                 geometry.  It is always such that: 1 <= sects <= 63, 1
 335                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 336                 geometry can be different if a translation is done. */
 337             translation = bdrv_get_translation_hint(hd_table[i]);
 338             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 339                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 340                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 341                     /* No translation. */
 342                     translation = 0;
 343                 } else {
 344                     /* LBA translation. */
 345                     translation = 1;
 346                 }
 347             } else {
 348                 translation--;
 349             }
 350             val |= translation << (i * 2);
 351         }
 352     }
 353     rtc_set_memory(s, 0x39, val);
 354 }
 355
 356 void ioport_set_a20(int enable)
 357 {
 358     /* XXX: send to all CPUs ? */
 359     cpu_x86_set_a20(first_cpu, enable);
 360 }
 361
 362 int ioport_get_a20(void)
 363 {
 364     return ((first_cpu->a20_mask >> 20) & 1);
 365 }
 366
 367 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 368 {
 369     ioport_set_a20((val >> 1) & 1);
 370     /* XXX: bit 0 is fast reset */
 371 }
 372
 373 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 374 {
 375     return ioport_get_a20() << 1;
 376 }
 377
 378 /***********************************************************/
 379 /* Bochs BIOS debug ports */
 380
 381 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 382 {
 383     static const char shutdown_str[8] = "Shutdown";
 384     static int shutdown_index = 0;
 385
 386     switch(addr) {
 387         /* Bochs BIOS messages */
 388     case 0x400:
 389     case 0x401:
 390         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 391         exit(1);
 392     case 0x402:
 393     case 0x403:
 394 #ifdef DEBUG_BIOS
 395         fprintf(stderr, "%c", val);
 396 #endif
 397         break;
 398     case 0x8900:
 399         /* same as Bochs power off */
 400         if (val == shutdown_str[shutdown_index]) {
 401             shutdown_index++;
 402             if (shutdown_index == 8) {
 403                 shutdown_index = 0;
 404                 qemu_system_shutdown_request();
 405             }
 406         } else {
 407             shutdown_index = 0;
 408         }
 409         break;
 410
 411         /* LGPL'ed VGA BIOS messages */
 412     case 0x501:
 413     case 0x502:
 414         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 415         exit(1);
 416     case 0x500:
 417     case 0x503:
 418 #ifdef DEBUG_BIOS
 419         fprintf(stderr, "%c", val);
 420 #endif
 421         break;
 422     }
 423 }
 424
 425 static void bochs_bios_init(void)
 426 {
 427     void *fw_cfg;
 428
 429     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 430     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 431     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 432     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 433     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 434
 435     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 436     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 437     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 438     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 439
 440     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 441     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 442     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 443     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
 444                      acpi_tables_len);
 445 }
 446
 447 /* Generate an initial boot sector which sets state and jump to
 448    a specified vector */
 449 static void generate_bootsect(uint8_t *option_rom,
 450                               uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 451 {
 452     uint8_t rom[512], *p, *reloc;
 453     uint8_t sum;
 454     int i;
 455
 456     memset(rom, 0, sizeof(rom));
 457
 458     p = rom;
 459     /* Make sure we have an option rom signature */
 460     *p++ = 0x55;
 461     *p++ = 0xaa;
 462
 463     /* ROM size in sectors*/
 464     *p++ = 1;
 465
 466     /* Hook int19 */
 467
 468     *p++ = 0x50;                /* push ax */
 469     *p++ = 0x1e;                /* push ds */
 470     *p++ = 0x31; *p++ = 0xc0;   /* xor ax, ax */
 471     *p++ = 0x8e; *p++ = 0xd8;   /* mov ax, ds */
 472
 473     *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
 474     *p++ = 0x64; *p++ = 0x00;
 475     reloc = p;
 476     *p++ = 0x00; *p++ = 0x00;
 477
 478     *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
 479     *p++ = 0x66; *p++ = 0x00;
 480
 481     *p++ = 0x1f;                /* pop ds */
 482     *p++ = 0x58;                /* pop ax */
 483     *p++ = 0xcb;                /* lret */
 484
 485     /* Actual code */
 486     *reloc = (p - rom);
 487
 488     *p++ = 0xfa;                /* CLI */
 489     *p++ = 0xfc;                /* CLD */
 490
 491     for (i = 0; i < 6; i++) {
 492         if (i == 1)             /* Skip CS */
 493             continue;
 494
 495         *p++ = 0xb8;            /* MOV AX,imm16 */
 496         *p++ = segs[i];
 497         *p++ = segs[i] >> 8;
 498         *p++ = 0x8e;            /* MOV <seg>,AX */
 499         *p++ = 0xc0 + (i << 3);
 500     }
 501
 502     for (i = 0; i < 8; i++) {
 503         *p++ = 0x66;            /* 32-bit operand size */
 504         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 505         *p++ = gpr[i];
 506         *p++ = gpr[i] >> 8;
 507         *p++ = gpr[i] >> 16;
 508         *p++ = gpr[i] >> 24;
 509     }
 510
 511     *p++ = 0xea;                /* JMP FAR */
 512     *p++ = ip;                  /* IP */
 513     *p++ = ip >> 8;
 514     *p++ = segs[1];             /* CS */
 515     *p++ = segs[1] >> 8;
 516
 517     /* sign rom */
 518     sum = 0;
 519     for (i = 0; i < (sizeof(rom) - 1); i++)
 520         sum += rom[i];
 521     rom[sizeof(rom) - 1] = -sum;
 522
 523     memcpy(option_rom, rom, sizeof(rom));
 524 }
 525
 526 static long get_file_size(FILE *f)
 527 {
 528     long where, size;
 529
 530     /* XXX: on Unix systems, using fstat() probably makes more sense */
 531
 532     where = ftell(f);
 533     fseek(f, 0, SEEK_END);
 534     size = ftell(f);
 535     fseek(f, where, SEEK_SET);
 536
 537     return size;
 538 }
 539
 540 static void load_linux(uint8_t *option_rom,
 541                        const char *kernel_filename,
 542                        const char *initrd_filename,
 543                        const char *kernel_cmdline)
 544 {
 545     uint16_t protocol;
 546     uint32_t gpr[8];
 547     uint16_t seg[6];
 548     uint16_t real_seg;
 549     int setup_size, kernel_size, initrd_size, cmdline_size;
 550     uint32_t initrd_max;
 551     uint8_t header[1024];
 552     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 553     FILE *f, *fi;
 554
 555     /* Align to 16 bytes as a paranoia measure */
 556     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 557
 558     /* load the kernel header */
 559     f = fopen(kernel_filename, "rb");
 560     if (!f || !(kernel_size = get_file_size(f)) ||
 561         fread(header, 1, 1024, f) != 1024) {
 562         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 563                 kernel_filename);
 564         exit(1);
 565     }
 566
 567     /* kernel protocol version */
 568 #if 0
 569     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 570 #endif
 571     if (ldl_p(header+0x202) == 0x53726448)
 572         protocol = lduw_p(header+0x206);
 573     else
 574         protocol = 0;
 575
 576     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 577         /* Low kernel */
 578         real_addr    = 0x90000;
 579         cmdline_addr = 0x9a000 - cmdline_size;
 580         prot_addr    = 0x10000;
 581     } else if (protocol < 0x202) {
 582         /* High but ancient kernel */
 583         real_addr    = 0x90000;
 584         cmdline_addr = 0x9a000 - cmdline_size;
 585         prot_addr    = 0x100000;
 586     } else {
 587         /* High and recent kernel */
 588         real_addr    = 0x10000;
 589         cmdline_addr = 0x20000;
 590         prot_addr    = 0x100000;
 591     }
 592
 593 #if 0
 594     fprintf(stderr,
 595             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 596             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 597             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 598             real_addr,
 599             cmdline_addr,
 600             prot_addr);
 601 #endif
 602
 603     /* highest address for loading the initrd */
 604     if (protocol >= 0x203)
 605         initrd_max = ldl_p(header+0x22c);
 606     else
 607         initrd_max = 0x37ffffff;
 608
 609     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 610         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 611
 612     /* kernel command line */
 613     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 614
 615     if (protocol >= 0x202) {
 616         stl_p(header+0x228, cmdline_addr);
 617     } else {
 618         stw_p(header+0x20, 0xA33F);
 619         stw_p(header+0x22, cmdline_addr-real_addr);
 620     }
 621
 622     /* loader type */
 623     /* High nybble = B reserved for Qemu; low nybble is revision number.
 624        If this code is substantially changed, you may want to consider
 625        incrementing the revision. */
 626     if (protocol >= 0x200)
 627         header[0x210] = 0xB0;
 628
 629     /* heap */
 630     if (protocol >= 0x201) {
 631         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 632         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 633     }
 634
 635     /* load initrd */
 636     if (initrd_filename) {
 637         if (protocol < 0x200) {
 638             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 639             exit(1);
 640         }
 641
 642         fi = fopen(initrd_filename, "rb");
 643         if (!fi) {
 644             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 645                     initrd_filename);
 646             exit(1);
 647         }
 648
 649         initrd_size = get_file_size(fi);
 650         initrd_addr = (initrd_max-initrd_size) & ~4095;
 651
 652         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 653                 "\n", initrd_size, initrd_addr);
 654
 655         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 656             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 657                     initrd_filename);
 658             exit(1);
 659         }
 660         fclose(fi);
 661
 662         stl_p(header+0x218, initrd_addr);
 663         stl_p(header+0x21c, initrd_size);
 664     }
 665
 666     /* store the finalized header and load the rest of the kernel */
 667     cpu_physical_memory_write(real_addr, header, 1024);
 668
 669     setup_size = header[0x1f1];
 670     if (setup_size == 0)
 671         setup_size = 4;
 672
 673     setup_size = (setup_size+1)*512;
 674     kernel_size -= setup_size;  /* Size of protected-mode code */
 675
 676     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 677         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 678         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 679                 kernel_filename);
 680         exit(1);
 681     }
 682     fclose(f);
 683
 684     /* generate bootsector to set up the initial register state */
 685     real_seg = real_addr >> 4;
 686     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 687     seg[1] = real_seg+0x20;     /* CS */
 688     memset(gpr, 0, sizeof gpr);
 689     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 690
 691     generate_bootsect(option_rom, gpr, seg, 0);
 692 }
 693
 694 static void main_cpu_reset(void *opaque)
 695 {
 696     CPUState *env = opaque;
 697     cpu_reset(env);
 698 }
 699
 700 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 701 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 702 static const int ide_irq[2] = { 14, 15 };
 703
 704 #define NE2000_NB_MAX 6
 705
 706 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 707 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 708
 709 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 710 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 711
 712 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 713 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 714
 715 #ifdef HAS_AUDIO
 716 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 717 {
 718     struct soundhw *c;
 719     int audio_enabled = 0;
 720
 721     for (c = soundhw; !audio_enabled && c->name; ++c) {
 722         audio_enabled = c->enabled;
 723     }
 724
 725     if (audio_enabled) {
 726         AudioState *s;
 727
 728         s = AUD_init ();
 729         if (s) {
 730             for (c = soundhw; c->name; ++c) {
 731                 if (c->enabled) {
 732                     if (c->isa) {
 733                         c->init.init_isa (s, pic);
 734                     }
 735                     else {
 736                         if (pci_bus) {
 737                             c->init.init_pci (pci_bus, s);
 738                         }
 739                     }
 740                 }
 741             }
 742         }
 743     }
 744 }
 745 #endif
 746
 747 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 748 {
 749     static int nb_ne2k = 0;
 750
 751     if (nb_ne2k == NE2000_NB_MAX)
 752         return;
 753     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 754     nb_ne2k++;
 755 }
 756
 757 /* PC hardware initialisation */
 758 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 759                      const char *boot_device,
 760                      const char *kernel_filename, const char *kernel_cmdline,
 761                      const char *initrd_filename,
 762                      int pci_enabled, const char *cpu_model)
 763 {
 764     char buf[1024];
 765     int ret, linux_boot, i;
 766     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset, option_rom_start = 0;
 767     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 768     int bios_size, isa_bios_size, vga_bios_size;
 769     PCIBus *pci_bus;
 770     int piix3_devfn = -1;
 771     CPUState *env;
 772     qemu_irq *cpu_irq;
 773     qemu_irq *i8259;
 774     int index;
 775     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 776     BlockDriverState *fd[MAX_FD];
 777     int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
 778
 779     if (ram_size >= 0xe0000000 ) {
 780         above_4g_mem_size = ram_size - 0xe0000000;
 781         below_4g_mem_size = 0xe0000000;
 782     } else {
 783         below_4g_mem_size = ram_size;
 784     }
 785
 786     linux_boot = (kernel_filename != NULL);
 787
 788     /* init CPUs */
 789     if (cpu_model == NULL) {
 790 #ifdef TARGET_X86_64
 791         cpu_model = "qemu64";
 792 #else
 793         cpu_model = "qemu32";
 794 #endif
 795     }
 796
 797     for(i = 0; i < smp_cpus; i++) {
 798         env = cpu_init(cpu_model);
 799         if (!env) {
 800             fprintf(stderr, "Unable to find x86 CPU definition\n");
 801             exit(1);
 802         }
 803         if (i != 0)
 804             env->halted = 1;
 805         if (smp_cpus > 1) {
 806             /* XXX: enable it in all cases */
 807             env->cpuid_features |= CPUID_APIC;
 808         }
 809         qemu_register_reset(main_cpu_reset, env);
 810         if (pci_enabled) {
 811             apic_init(env);
 812         }
 813     }
 814
 815     vmport_init();
 816
 817     /* allocate RAM */
 818     ram_addr = qemu_ram_alloc(0xa0000);
 819     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 820
 821     /* Allocate, even though we won't register, so we don't break the
 822      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 823      * and some bios areas, which will be registered later
 824      */
 825     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 826     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 827     cpu_register_physical_memory(0x100000,
 828                  below_4g_mem_size - 0x100000,
 829                  ram_addr);
 830
 831     /* above 4giga memory allocation */
 832     if (above_4g_mem_size > 0) {
 833         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 834         cpu_register_physical_memory(0x100000000ULL,
 835                                      above_4g_mem_size,
 836                                      ram_addr);
 837     }
 838
 839
 840     /* allocate VGA RAM */
 841     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 842
 843     /* BIOS load */
 844     if (bios_name == NULL)
 845         bios_name = BIOS_FILENAME;
 846     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 847     bios_size = get_image_size(buf);
 848     if (bios_size <= 0 ||
 849         (bios_size % 65536) != 0) {
 850         goto bios_error;
 851     }
 852     bios_offset = qemu_ram_alloc(bios_size);
 853     ret = load_image(buf, phys_ram_base + bios_offset);
 854     if (ret != bios_size) {
 855     bios_error:
 856         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 857         exit(1);
 858     }
 859
 860     if (using_vga) {
 861         /* VGA BIOS load */
 862         if (cirrus_vga_enabled) {
 863             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 864         } else {
 865             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 866         }
 867         vga_bios_size = get_image_size(buf);
 868         if (vga_bios_size <= 0 || vga_bios_size > 65536)
 869             goto vga_bios_error;
 870         vga_bios_offset = qemu_ram_alloc(65536);
 871
 872         ret = load_image(buf, phys_ram_base + vga_bios_offset);
 873         if (ret != vga_bios_size) {
 874 vga_bios_error:
 875             fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 876             exit(1);
 877         }
 878         /* Round up vga bios size to the next 2k boundary */
 879         vga_bios_size = (vga_bios_size + 2047) & ~2047;
 880         option_rom_start = 0xc0000 + vga_bios_size;
 881
 882         /* setup basic memory access */
 883         cpu_register_physical_memory(0xc0000, vga_bios_size,
 884                                      vga_bios_offset | IO_MEM_ROM);
 885     }
 886
 887     /* No point in placing option roms before this address, since bochs bios
 888      * will only start looking for it at 0xc8000 */
 889     if (option_rom_start < 0xc8000)
 890             option_rom_start = 0xc8000;
 891
 892
 893     /* map the last 128KB of the BIOS in ISA space */
 894     isa_bios_size = bios_size;
 895     if (isa_bios_size > (128 * 1024))
 896         isa_bios_size = 128 * 1024;
 897     cpu_register_physical_memory(0x100000 - isa_bios_size,
 898                                  isa_bios_size,
 899                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 900
 901     {
 902         ram_addr_t option_rom_offset;
 903         int size, offset;
 904
 905         offset = option_rom_start;
 906         if (linux_boot) {
 907             option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
 908             load_linux(phys_ram_base + option_rom_offset,
 909                        kernel_filename, initrd_filename, kernel_cmdline);
 910             cpu_register_physical_memory(option_rom_start, TARGET_PAGE_SIZE,
 911                                          option_rom_offset | IO_MEM_ROM);
 912             offset += TARGET_PAGE_SIZE;
 913         }
 914
 915         for (i = 0; i < nb_option_roms; i++) {
 916             size = get_image_size(option_rom[i]);
 917             if (size < 0) {
 918                 fprintf(stderr, "Could not load option rom '%s'\n",
 919                         option_rom[i]);
 920                 exit(1);
 921             }
 922             if (size > (0xe0000  - offset))
 923                 goto option_rom_error;
 924             option_rom_offset = qemu_ram_alloc(size);
 925             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 926             if (ret != size) {
 927             option_rom_error:
 928                 fprintf(stderr, "Could not fit %soption roms in available space\n", using_vga ? "VGA bios and " : "");
 929                 exit(1);
 930             }
 931             size = (size + 4095) & ~4095;
 932             cpu_register_physical_memory(offset, size, option_rom_offset | IO_MEM_ROM);
 933             offset += size;
 934         }
 935     }
 936
 937     /* map all the bios at the top of memory */
 938     cpu_register_physical_memory((uint32_t)(-bios_size),
 939                                  bios_size, bios_offset | IO_MEM_ROM);
 940
 941     bochs_bios_init();
 942
 943     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 944     i8259 = i8259_init(cpu_irq[0]);
 945     ferr_irq = i8259[13];
 946
 947     if (pci_enabled) {
 948         pci_bus = i440fx_init(&i440fx_state, i8259);
 949         piix3_devfn = piix3_init(pci_bus, -1);
 950     } else {
 951         pci_bus = NULL;
 952     }
 953
 954     /* init basic PC hardware */
 955     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 956
 957     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 958
 959     if (cirrus_vga_enabled) {
 960         if (pci_enabled) {
 961             pci_cirrus_vga_init(pci_bus,
 962                                 phys_ram_base + vga_ram_addr,
 963                                 vga_ram_addr, vga_ram_size);
 964         } else {
 965             isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
 966                                 vga_ram_addr, vga_ram_size);
 967         }
 968     } else if (vmsvga_enabled) {
 969         if (pci_enabled)
 970             pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
 971                             vga_ram_addr, vga_ram_size);
 972         else
 973             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 974     } else if (std_vga_enabled) {
 975         if (pci_enabled) {
 976             pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
 977                          vga_ram_addr, vga_ram_size, 0, 0);
 978         } else {
 979             isa_vga_init(phys_ram_base + vga_ram_addr,
 980                          vga_ram_addr, vga_ram_size);
 981         }
 982     }
 983
 984     rtc_state = rtc_init(0x70, i8259[8], 2000);
 985
 986     qemu_register_boot_set(pc_boot_set, rtc_state);
 987
 988     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 989     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 990
 991     if (pci_enabled) {
 992         ioapic = ioapic_init();
 993     }
 994     pit = pit_init(0x40, i8259[0]);
 995     pcspk_init(pit);
 996     if (!no_hpet) {
 997         hpet_init(i8259);
 998     }
 999     if (pci_enabled) {
1000         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1001     }
1002
1003     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1004         if (serial_hds[i]) {
1005             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1006                         serial_hds[i]);
1007         }
1008     }
1009
1010     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1011         if (parallel_hds[i]) {
1012             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1013                           parallel_hds[i]);
1014         }
1015     }
1016
1017     for(i = 0; i < nb_nics; i++) {
1018         NICInfo *nd = &nd_table[i];
1019
1020         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1021             pc_init_ne2k_isa(nd, i8259);
1022         else
1023             pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1024     }
1025
1026     qemu_system_hot_add_init();
1027
1028     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1029         fprintf(stderr, "qemu: too many IDE bus\n");
1030         exit(1);
1031     }
1032
1033     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1034         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1035         if (index != -1)
1036             hd[i] = drives_table[index].bdrv;
1037         else
1038             hd[i] = NULL;
1039     }
1040
1041     if (pci_enabled) {
1042         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1043     } else {
1044         for(i = 0; i < MAX_IDE_BUS; i++) {
1045             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1046                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1047         }
1048     }
1049
1050     i8042_init(i8259[1], i8259[12], 0x60);
1051     DMA_init(0);
1052 #ifdef HAS_AUDIO
1053     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1054 #endif
1055
1056     for(i = 0; i < MAX_FD; i++) {
1057         index = drive_get_index(IF_FLOPPY, 0, i);
1058         if (index != -1)
1059             fd[i] = drives_table[index].bdrv;
1060         else
1061             fd[i] = NULL;
1062     }
1063     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1064
1065     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1066
1067     if (pci_enabled && usb_enabled) {
1068         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1069     }
1070
1071     if (pci_enabled && acpi_enabled) {
1072         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1073         i2c_bus *smbus;
1074
1075         /* TODO: Populate SPD eeprom data.  */
1076         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1077         for (i = 0; i < 8; i++) {
1078             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1079         }
1080     }
1081
1082     if (i440fx_state) {
1083         i440fx_init_memory_mappings(i440fx_state);
1084     }
1085
1086     if (pci_enabled) {
1087         int max_bus;
1088         int bus, unit;
1089         void *scsi;
1090
1091         max_bus = drive_get_max_bus(IF_SCSI);
1092
1093         for (bus = 0; bus <= max_bus; bus++) {
1094             scsi = lsi_scsi_init(pci_bus, -1);
1095             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1096                 index = drive_get_index(IF_SCSI, bus, unit);
1097                 if (index == -1)
1098                     continue;
1099                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1100             }
1101         }
1102     }
1103
1104     /* Add virtio block devices */
1105     if (pci_enabled) {
1106         int index;
1107         int unit_id = 0;
1108
1109         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1110             virtio_blk_init(pci_bus, drives_table[index].bdrv);
1111             unit_id++;
1112         }
1113     }
1114
1115     /* Add virtio balloon device */
1116     if (pci_enabled)
1117         virtio_balloon_init(pci_bus);
1118
1119     /* Add virtio console devices */
1120     if (pci_enabled) {
1121         for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1122             if (virtcon_hds[i])
1123                 virtio_console_init(pci_bus, virtcon_hds[i]);
1124         }
1125     }
1126 }
1127
1128 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1129                         const char *boot_device,
1130                         const char *kernel_filename,
1131                         const char *kernel_cmdline,
1132                         const char *initrd_filename,
1133                         const char *cpu_model)
1134 {
1135     pc_init1(ram_size, vga_ram_size, boot_device,
1136              kernel_filename, kernel_cmdline,
1137              initrd_filename, 1, cpu_model);
1138 }
1139
1140 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1141                         const char *boot_device,
1142                         const char *kernel_filename,
1143                         const char *kernel_cmdline,
1144                         const char *initrd_filename,
1145                         const char *cpu_model)
1146 {
1147     pc_init1(ram_size, vga_ram_size, boot_device,
1148              kernel_filename, kernel_cmdline,
1149              initrd_filename, 0, cpu_model);
1150 }
1151
1152 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1153    BIOS will read it and start S3 resume at POST Entry */
1154 void cmos_set_s3_resume(void)
1155 {
1156     if (rtc_state)
1157         rtc_set_memory(rtc_state, 0xF, 0xFE);
1158 }
1159
1160 QEMUMachine pc_machine = {
1161     .name = "pc",
1162     .desc = "Standard PC",
1163     .init = pc_init_pci,
1164     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1165     .max_cpus = 255,
1166 };
1167
1168 QEMUMachine isapc_machine = {
1169     .name = "isapc",
1170     .desc = "ISA-only PC",
1171     .init = pc_init_isa,
1172     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1173     .max_cpus = 1,
1174 };