hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  33
  34 #define KERNEL_LOAD_ADDR     0x00100000
  35 #define INITRD_LOAD_ADDR     0x00600000
  36 #define KERNEL_PARAMS_ADDR   0x00090000
  37 #define KERNEL_CMDLINE_ADDR  0x00099000
  38
  39 static fdctrl_t *floppy_controller;
  40 static RTCState *rtc_state;
  41 static PITState *pit;
  42 static IOAPICState *ioapic;
  43 static PCIDevice *i440fx_state;
  44
  45 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  46 {
  47 }
  48
  49 /* MSDOS compatibility mode FPU exception support */
  50 /* XXX: add IGNNE support */
  51 void cpu_set_ferr(CPUX86State *s)
  52 {
  53     pic_set_irq(13, 1);
  54 }
  55
  56 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  57 {
  58     pic_set_irq(13, 0);
  59 }
  60
  61 /* TSC handling */
  62 uint64_t cpu_get_tsc(CPUX86State *env)
  63 {
  64     /* Note: when using kqemu, it is more logical to return the host TSC
  65        because kqemu does not trap the RDTSC instruction for
  66        performance reasons */
  67 #if USE_KQEMU
  68     if (env->kqemu_enabled) {
  69         return cpu_get_real_ticks();
  70     } else
  71 #endif
  72     {
  73         return cpu_get_ticks();
  74     }
  75 }
  76
  77 /* SMM support */
  78 void cpu_smm_update(CPUState *env)
  79 {
  80     if (i440fx_state && env == first_cpu)
  81         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  82 }
  83
  84
  85 /* IRQ handling */
  86 int cpu_get_pic_interrupt(CPUState *env)
  87 {
  88     int intno;
  89
  90     intno = apic_get_interrupt(env);
  91     if (intno >= 0) {
  92         /* set irq request if a PIC irq is still pending */
  93         /* XXX: improve that */
  94         pic_update_irq(isa_pic);
  95         return intno;
  96     }
  97     /* read the irq from the PIC */
  98     intno = pic_read_irq(isa_pic);
  99     return intno;
 100 }
 101
 102 static void pic_irq_request(void *opaque, int level)
 103 {
 104     CPUState *env = opaque;
 105     if (level)
 106         cpu_interrupt(env, CPU_INTERRUPT_HARD);
 107     else
 108         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 109 }
 110
 111 /* PC cmos mappings */
 112
 113 #define REG_EQUIPMENT_BYTE          0x14
 114 #define REG_IBM_CENTURY_BYTE        0x32
 115 #define REG_IBM_PS2_CENTURY_BYTE    0x37
 116
 117
 118 static inline int to_bcd(RTCState *s, int a)
 119 {
 120     return ((a / 10) << 4) | (a % 10);
 121 }
 122
 123 static int cmos_get_fd_drive_type(int fd0)
 124 {
 125     int val;
 126
 127     switch (fd0) {
 128     case 0:
 129         /* 1.44 Mb 3"5 drive */
 130         val = 4;
 131         break;
 132     case 1:
 133         /* 2.88 Mb 3"5 drive */
 134         val = 5;
 135         break;
 136     case 2:
 137         /* 1.2 Mb 5"5 drive */
 138         val = 2;
 139         break;
 140     default:
 141         val = 0;
 142         break;
 143     }
 144     return val;
 145 }
 146
 147 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 148 {
 149     RTCState *s = rtc_state;
 150     int cylinders, heads, sectors;
 151     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 152     rtc_set_memory(s, type_ofs, 47);
 153     rtc_set_memory(s, info_ofs, cylinders);
 154     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 155     rtc_set_memory(s, info_ofs + 2, heads);
 156     rtc_set_memory(s, info_ofs + 3, 0xff);
 157     rtc_set_memory(s, info_ofs + 4, 0xff);
 158     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 159     rtc_set_memory(s, info_ofs + 6, cylinders);
 160     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 161     rtc_set_memory(s, info_ofs + 8, sectors);
 162 }
 163
 164 /* hd_table must contain 4 block drivers */
 165 static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
 166 {
 167     RTCState *s = rtc_state;
 168     int val;
 169     int fd0, fd1, nb;
 170     time_t ti;
 171     struct tm *tm;
 172     int i;
 173
 174     /* set the CMOS date */
 175     time(&ti);
 176     if (rtc_utc)
 177         tm = gmtime(&ti);
 178     else
 179         tm = localtime(&ti);
 180     rtc_set_date(s, tm);
 181
 182     val = to_bcd(s, (tm->tm_year / 100) + 19);
 183     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
 184     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
 185
 186     /* various important CMOS locations needed by PC/Bochs bios */
 187
 188     /* memory size */
 189     val = 640; /* base memory in K */
 190     rtc_set_memory(s, 0x15, val);
 191     rtc_set_memory(s, 0x16, val >> 8);
 192
 193     val = (ram_size / 1024) - 1024;
 194     if (val > 65535)
 195         val = 65535;
 196     rtc_set_memory(s, 0x17, val);
 197     rtc_set_memory(s, 0x18, val >> 8);
 198     rtc_set_memory(s, 0x30, val);
 199     rtc_set_memory(s, 0x31, val >> 8);
 200
 201     if (ram_size > (16 * 1024 * 1024))
 202         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 203     else
 204         val = 0;
 205     if (val > 65535)
 206         val = 65535;
 207     rtc_set_memory(s, 0x34, val);
 208     rtc_set_memory(s, 0x35, val >> 8);
 209
 210     switch(boot_device) {
 211     case 'a':
 212     case 'b':
 213         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 214         if (!fd_bootchk)
 215             rtc_set_memory(s, 0x38, 0x01); /* disable signature check */
 216         break;
 217     default:
 218     case 'c':
 219         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 220         break;
 221     case 'd':
 222         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 223         break;
 224     }
 225
 226     /* floppy type */
 227
 228     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 229     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 230
 231     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 232     rtc_set_memory(s, 0x10, val);
 233
 234     val = 0;
 235     nb = 0;
 236     if (fd0 < 3)
 237         nb++;
 238     if (fd1 < 3)
 239         nb++;
 240     switch (nb) {
 241     case 0:
 242         break;
 243     case 1:
 244         val |= 0x01; /* 1 drive, ready for boot */
 245         break;
 246     case 2:
 247         val |= 0x41; /* 2 drives, ready for boot */
 248         break;
 249     }
 250     val |= 0x02; /* FPU is there */
 251     val |= 0x04; /* PS/2 mouse installed */
 252     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 253
 254     /* hard drives */
 255
 256     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 257     if (hd_table[0])
 258         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 259     if (hd_table[1])
 260         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 261
 262     val = 0;
 263     for (i = 0; i < 4; i++) {
 264         if (hd_table[i]) {
 265             int cylinders, heads, sectors, translation;
 266             /* NOTE: bdrv_get_geometry_hint() returns the physical
 267                 geometry.  It is always such that: 1 <= sects <= 63, 1
 268                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 269                 geometry can be different if a translation is done. */
 270             translation = bdrv_get_translation_hint(hd_table[i]);
 271             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 272                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 273                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 274                     /* No translation. */
 275                     translation = 0;
 276                 } else {
 277                     /* LBA translation. */
 278                     translation = 1;
 279                 }
 280             } else {
 281                 translation--;
 282             }
 283             val |= translation << (i * 2);
 284         }
 285     }
 286     rtc_set_memory(s, 0x39, val);
 287 }
 288
 289 void ioport_set_a20(int enable)
 290 {
 291     /* XXX: send to all CPUs ? */
 292     cpu_x86_set_a20(first_cpu, enable);
 293 }
 294
 295 int ioport_get_a20(void)
 296 {
 297     return ((first_cpu->a20_mask >> 20) & 1);
 298 }
 299
 300 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 301 {
 302     ioport_set_a20((val >> 1) & 1);
 303     /* XXX: bit 0 is fast reset */
 304 }
 305
 306 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 307 {
 308     return ioport_get_a20() << 1;
 309 }
 310
 311 /***********************************************************/
 312 /* Bochs BIOS debug ports */
 313
 314 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 315 {
 316     static const char shutdown_str[8] = "Shutdown";
 317     static int shutdown_index = 0;
 318
 319     switch(addr) {
 320         /* Bochs BIOS messages */
 321     case 0x400:
 322     case 0x401:
 323         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 324         exit(1);
 325     case 0x402:
 326     case 0x403:
 327 #ifdef DEBUG_BIOS
 328         fprintf(stderr, "%c", val);
 329 #endif
 330         break;
 331     case 0x8900:
 332         /* same as Bochs power off */
 333         if (val == shutdown_str[shutdown_index]) {
 334             shutdown_index++;
 335             if (shutdown_index == 8) {
 336                 shutdown_index = 0;
 337                 qemu_system_shutdown_request();
 338             }
 339         } else {
 340             shutdown_index = 0;
 341         }
 342         break;
 343
 344         /* LGPL'ed VGA BIOS messages */
 345     case 0x501:
 346     case 0x502:
 347         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 348         exit(1);
 349     case 0x500:
 350     case 0x503:
 351 #ifdef DEBUG_BIOS
 352         fprintf(stderr, "%c", val);
 353 #endif
 354         break;
 355     }
 356 }
 357
 358 void bochs_bios_init(void)
 359 {
 360     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 361     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 362     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 363     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 364     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 365
 366     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 367     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 368     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 369     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 370 }
 371
 372
 373 int load_kernel(const char *filename, uint8_t *addr,
 374                 uint8_t *real_addr)
 375 {
 376     int fd, size;
 377     int setup_sects;
 378
 379     fd = open(filename, O_RDONLY | O_BINARY);
 380     if (fd < 0)
 381         return -1;
 382
 383     /* load 16 bit code */
 384     if (read(fd, real_addr, 512) != 512)
 385         goto fail;
 386     setup_sects = real_addr[0x1F1];
 387     if (!setup_sects)
 388         setup_sects = 4;
 389     if (read(fd, real_addr + 512, setup_sects * 512) !=
 390         setup_sects * 512)
 391         goto fail;
 392
 393     /* load 32 bit code */
 394     size = read(fd, addr, 16 * 1024 * 1024);
 395     if (size < 0)
 396         goto fail;
 397     close(fd);
 398     return size;
 399  fail:
 400     close(fd);
 401     return -1;
 402 }
 403
 404 static void main_cpu_reset(void *opaque)
 405 {
 406     CPUState *env = opaque;
 407     cpu_reset(env);
 408 }
 409
 410 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 411 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 412 static const int ide_irq[2] = { 14, 15 };
 413
 414 #define NE2000_NB_MAX 6
 415
 416 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 417 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 418
 419 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 420 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 421
 422 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 423 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 424
 425 #ifdef HAS_AUDIO
 426 static void audio_init (PCIBus *pci_bus)
 427 {
 428     struct soundhw *c;
 429     int audio_enabled = 0;
 430
 431     for (c = soundhw; !audio_enabled && c->name; ++c) {
 432         audio_enabled = c->enabled;
 433     }
 434
 435     if (audio_enabled) {
 436         AudioState *s;
 437
 438         s = AUD_init ();
 439         if (s) {
 440             for (c = soundhw; c->name; ++c) {
 441                 if (c->enabled) {
 442                     if (c->isa) {
 443                         c->init.init_isa (s);
 444                     }
 445                     else {
 446                         if (pci_bus) {
 447                             c->init.init_pci (pci_bus, s);
 448                         }
 449                     }
 450                 }
 451             }
 452         }
 453     }
 454 }
 455 #endif
 456
 457 static void pc_init_ne2k_isa(NICInfo *nd)
 458 {
 459     static int nb_ne2k = 0;
 460
 461     if (nb_ne2k == NE2000_NB_MAX)
 462         return;
 463     isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
 464     nb_ne2k++;
 465 }
 466
 467 /* PC hardware initialisation */
 468 static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
 469                      DisplayState *ds, const char **fd_filename, int snapshot,
 470                      const char *kernel_filename, const char *kernel_cmdline,
 471                      const char *initrd_filename,
 472                      int pci_enabled)
 473 {
 474     char buf[1024];
 475     int ret, linux_boot, initrd_size, i;
 476     unsigned long bios_offset, vga_bios_offset;
 477     int bios_size, isa_bios_size;
 478     PCIBus *pci_bus;
 479     int piix3_devfn = -1;
 480     CPUState *env;
 481     NICInfo *nd;
 482
 483     linux_boot = (kernel_filename != NULL);
 484
 485     /* init CPUs */
 486     for(i = 0; i < smp_cpus; i++) {
 487         env = cpu_init();
 488         if (i != 0)
 489             env->hflags |= HF_HALTED_MASK;
 490         if (smp_cpus > 1) {
 491             /* XXX: enable it in all cases */
 492             env->cpuid_features |= CPUID_APIC;
 493         }
 494         register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
 495         qemu_register_reset(main_cpu_reset, env);
 496         if (pci_enabled) {
 497             apic_init(env);
 498         }
 499     }
 500
 501     /* allocate RAM */
 502     cpu_register_physical_memory(0, ram_size, 0);
 503
 504     /* BIOS load */
 505     bios_offset = ram_size + vga_ram_size;
 506     vga_bios_offset = bios_offset + 256 * 1024;
 507
 508     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 509     bios_size = get_image_size(buf);
 510     if (bios_size <= 0 ||
 511         (bios_size % 65536) != 0 ||
 512         bios_size > (256 * 1024)) {
 513         goto bios_error;
 514     }
 515     ret = load_image(buf, phys_ram_base + bios_offset);
 516     if (ret != bios_size) {
 517     bios_error:
 518         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 519         exit(1);
 520     }
 521
 522     /* VGA BIOS load */
 523     if (cirrus_vga_enabled) {
 524         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 525     } else {
 526         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 527     }
 528     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 529
 530     /* setup basic memory access */
 531     cpu_register_physical_memory(0xc0000, 0x10000,
 532                                  vga_bios_offset | IO_MEM_ROM);
 533
 534     /* map the last 128KB of the BIOS in ISA space */
 535     isa_bios_size = bios_size;
 536     if (isa_bios_size > (128 * 1024))
 537         isa_bios_size = 128 * 1024;
 538     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 539                                  IO_MEM_UNASSIGNED);
 540     cpu_register_physical_memory(0x100000 - isa_bios_size,
 541                                  isa_bios_size,
 542                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 543     /* map all the bios at the top of memory */
 544     cpu_register_physical_memory((uint32_t)(-bios_size),
 545                                  bios_size, bios_offset | IO_MEM_ROM);
 546
 547     bochs_bios_init();
 548
 549     if (linux_boot) {
 550         uint8_t bootsect[512];
 551         uint8_t old_bootsect[512];
 552
 553         if (bs_table[0] == NULL) {
 554             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 555             exit(1);
 556         }
 557         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 558         ret = load_image(buf, bootsect);
 559         if (ret != sizeof(bootsect)) {
 560             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 561                     buf);
 562             exit(1);
 563         }
 564
 565         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 566             /* copy the MSDOS partition table */
 567             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 568         }
 569
 570         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 571
 572         /* now we can load the kernel */
 573         ret = load_kernel(kernel_filename,
 574                           phys_ram_base + KERNEL_LOAD_ADDR,
 575                           phys_ram_base + KERNEL_PARAMS_ADDR);
 576         if (ret < 0) {
 577             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 578                     kernel_filename);
 579             exit(1);
 580         }
 581
 582         /* load initrd */
 583         initrd_size = 0;
 584         if (initrd_filename) {
 585             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 586             if (initrd_size < 0) {
 587                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 588                         initrd_filename);
 589                 exit(1);
 590             }
 591         }
 592         if (initrd_size > 0) {
 593             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 594             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 595         }
 596         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 597                 kernel_cmdline);
 598         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 599         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 600                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 601         /* loader type */
 602         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 603     }
 604
 605     if (pci_enabled) {
 606         pci_bus = i440fx_init(&i440fx_state);
 607         piix3_devfn = piix3_init(pci_bus);
 608     } else {
 609         pci_bus = NULL;
 610     }
 611
 612     /* init basic PC hardware */
 613     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 614
 615     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 616
 617     if (cirrus_vga_enabled) {
 618         if (pci_enabled) {
 619             pci_cirrus_vga_init(pci_bus,
 620                                 ds, phys_ram_base + ram_size, ram_size,
 621                                 vga_ram_size);
 622         } else {
 623             isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
 624                                 vga_ram_size);
 625         }
 626     } else {
 627         if (pci_enabled) {
 628             pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, ram_size,
 629                          vga_ram_size, 0, 0);
 630         } else {
 631             isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
 632                          vga_ram_size);
 633         }
 634     }
 635
 636     rtc_state = rtc_init(0x70, 8);
 637
 638     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 639     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 640
 641     if (pci_enabled) {
 642         ioapic = ioapic_init();
 643     }
 644     isa_pic = pic_init(pic_irq_request, first_cpu);
 645     pit = pit_init(0x40, 0);
 646     pcspk_init(pit);
 647     if (pci_enabled) {
 648         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 649     }
 650
 651     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 652         if (serial_hds[i]) {
 653             serial_init(&pic_set_irq_new, isa_pic,
 654                         serial_io[i], serial_irq[i], serial_hds[i]);
 655         }
 656     }
 657
 658     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 659         if (parallel_hds[i]) {
 660             parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
 661         }
 662     }
 663
 664     for(i = 0; i < nb_nics; i++) {
 665         nd = &nd_table[i];
 666         if (!nd->model) {
 667             if (pci_enabled) {
 668                 nd->model = "ne2k_pci";
 669             } else {
 670                 nd->model = "ne2k_isa";
 671             }
 672         }
 673         if (strcmp(nd->model, "ne2k_isa") == 0) {
 674             pc_init_ne2k_isa(nd);
 675         } else if (pci_enabled) {
 676             pci_nic_init(pci_bus, nd);
 677         } else {
 678             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 679             exit(1);
 680         }
 681     }
 682
 683     if (pci_enabled) {
 684         pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
 685     } else {
 686         for(i = 0; i < 2; i++) {
 687             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 688                          bs_table[2 * i], bs_table[2 * i + 1]);
 689         }
 690     }
 691
 692     kbd_init();
 693     DMA_init(0);
 694 #ifdef HAS_AUDIO
 695     audio_init(pci_enabled ? pci_bus : NULL);
 696 #endif
 697
 698     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 699
 700     cmos_init(ram_size, boot_device, bs_table);
 701
 702     if (pci_enabled && usb_enabled) {
 703         usb_uhci_init(pci_bus, piix3_devfn + 2);
 704     }
 705
 706     if (pci_enabled && acpi_enabled) {
 707         piix4_pm_init(pci_bus, piix3_devfn + 3);
 708     }
 709
 710     if (i440fx_state) {
 711         i440fx_init_memory_mappings(i440fx_state);
 712     }
 713 #if 0
 714     /* ??? Need to figure out some way for the user to
 715        specify SCSI devices.  */
 716     if (pci_enabled) {
 717         void *scsi;
 718         BlockDriverState *bdrv;
 719
 720         scsi = lsi_scsi_init(pci_bus, -1);
 721         bdrv = bdrv_new("scsidisk");
 722         bdrv_open(bdrv, "scsi_disk.img", 0);
 723         lsi_scsi_attach(scsi, bdrv, -1);
 724         bdrv = bdrv_new("scsicd");
 725         bdrv_open(bdrv, "scsi_cd.iso", 0);
 726         bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
 727         lsi_scsi_attach(scsi, bdrv, -1);
 728     }
 729 #endif
 730 }
 731
 732 static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
 733                         DisplayState *ds, const char **fd_filename,
 734                         int snapshot,
 735                         const char *kernel_filename,
 736                         const char *kernel_cmdline,
 737                         const char *initrd_filename)
 738 {
 739     pc_init1(ram_size, vga_ram_size, boot_device,
 740              ds, fd_filename, snapshot,
 741              kernel_filename, kernel_cmdline,
 742              initrd_filename, 1);
 743 }
 744
 745 static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
 746                         DisplayState *ds, const char **fd_filename,
 747                         int snapshot,
 748                         const char *kernel_filename,
 749                         const char *kernel_cmdline,
 750                         const char *initrd_filename)
 751 {
 752     pc_init1(ram_size, vga_ram_size, boot_device,
 753              ds, fd_filename, snapshot,
 754              kernel_filename, kernel_cmdline,
 755              initrd_filename, 0);
 756 }
 757
 758 QEMUMachine pc_machine = {
 759     "pc",
 760     "Standard PC",
 761     pc_init_pci,
 762 };
 763
 764 QEMUMachine isapc_machine = {
 765     "isapc",
 766     "ISA-only PC",
 767     pc_init_isa,
 768 };