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added cpu_model parameter to cpu_init()
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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "vl.h"
25
26 /* output Bochs bios info messages */
27 //#define DEBUG_BIOS
28
29 #define BIOS_FILENAME "bios.bin"
30 #define VGABIOS_FILENAME "vgabios.bin"
31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
32
33 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
34 #define ACPI_DATA_SIZE 0x10000
35
36 static fdctrl_t *floppy_controller;
37 static RTCState *rtc_state;
38 static PITState *pit;
39 static IOAPICState *ioapic;
40 static PCIDevice *i440fx_state;
41
42 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
43 {
44 }
45
46 /* MSDOS compatibility mode FPU exception support */
47 static qemu_irq ferr_irq;
48 /* XXX: add IGNNE support */
49 void cpu_set_ferr(CPUX86State *s)
50 {
51 qemu_irq_raise(ferr_irq);
52 }
53
54 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
55 {
56 qemu_irq_lower(ferr_irq);
57 }
58
59 /* TSC handling */
60 uint64_t cpu_get_tsc(CPUX86State *env)
61 {
62 /* Note: when using kqemu, it is more logical to return the host TSC
63 because kqemu does not trap the RDTSC instruction for
64 performance reasons */
65 #if USE_KQEMU
66 if (env->kqemu_enabled) {
67 return cpu_get_real_ticks();
68 } else
69 #endif
70 {
71 return cpu_get_ticks();
72 }
73 }
74
75 /* SMM support */
76 void cpu_smm_update(CPUState *env)
77 {
78 if (i440fx_state && env == first_cpu)
79 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
80 }
81
82
83 /* IRQ handling */
84 int cpu_get_pic_interrupt(CPUState *env)
85 {
86 int intno;
87
88 intno = apic_get_interrupt(env);
89 if (intno >= 0) {
90 /* set irq request if a PIC irq is still pending */
91 /* XXX: improve that */
92 pic_update_irq(isa_pic);
93 return intno;
94 }
95 /* read the irq from the PIC */
96 if (!apic_accept_pic_intr(env))
97 return -1;
98
99 intno = pic_read_irq(isa_pic);
100 return intno;
101 }
102
103 static void pic_irq_request(void *opaque, int irq, int level)
104 {
105 CPUState *env = opaque;
106 if (level && apic_accept_pic_intr(env))
107 cpu_interrupt(env, CPU_INTERRUPT_HARD);
108 }
109
110 /* PC cmos mappings */
111
112 #define REG_EQUIPMENT_BYTE 0x14
113
114 static int cmos_get_fd_drive_type(int fd0)
115 {
116 int val;
117
118 switch (fd0) {
119 case 0:
120 /* 1.44 Mb 3"5 drive */
121 val = 4;
122 break;
123 case 1:
124 /* 2.88 Mb 3"5 drive */
125 val = 5;
126 break;
127 case 2:
128 /* 1.2 Mb 5"5 drive */
129 val = 2;
130 break;
131 default:
132 val = 0;
133 break;
134 }
135 return val;
136 }
137
138 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
139 {
140 RTCState *s = rtc_state;
141 int cylinders, heads, sectors;
142 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
143 rtc_set_memory(s, type_ofs, 47);
144 rtc_set_memory(s, info_ofs, cylinders);
145 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
146 rtc_set_memory(s, info_ofs + 2, heads);
147 rtc_set_memory(s, info_ofs + 3, 0xff);
148 rtc_set_memory(s, info_ofs + 4, 0xff);
149 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
150 rtc_set_memory(s, info_ofs + 6, cylinders);
151 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
152 rtc_set_memory(s, info_ofs + 8, sectors);
153 }
154
155 /* convert boot_device letter to something recognizable by the bios */
156 static int boot_device2nibble(char boot_device)
157 {
158 switch(boot_device) {
159 case 'a':
160 case 'b':
161 return 0x01; /* floppy boot */
162 case 'c':
163 return 0x02; /* hard drive boot */
164 case 'd':
165 return 0x03; /* CD-ROM boot */
166 case 'n':
167 return 0x04; /* Network boot */
168 }
169 return 0;
170 }
171
172 /* hd_table must contain 4 block drivers */
173 static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table)
174 {
175 RTCState *s = rtc_state;
176 int val;
177 int fd0, fd1, nb;
178 int i;
179
180 /* various important CMOS locations needed by PC/Bochs bios */
181
182 /* memory size */
183 val = 640; /* base memory in K */
184 rtc_set_memory(s, 0x15, val);
185 rtc_set_memory(s, 0x16, val >> 8);
186
187 val = (ram_size / 1024) - 1024;
188 if (val > 65535)
189 val = 65535;
190 rtc_set_memory(s, 0x17, val);
191 rtc_set_memory(s, 0x18, val >> 8);
192 rtc_set_memory(s, 0x30, val);
193 rtc_set_memory(s, 0x31, val >> 8);
194
195 if (ram_size > (16 * 1024 * 1024))
196 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
197 else
198 val = 0;
199 if (val > 65535)
200 val = 65535;
201 rtc_set_memory(s, 0x34, val);
202 rtc_set_memory(s, 0x35, val >> 8);
203
204 /* set boot devices, and disable floppy signature check if requested */
205 rtc_set_memory(s, 0x3d,
206 boot_device2nibble(boot_device[1]) << 4 |
207 boot_device2nibble(boot_device[0]) );
208 rtc_set_memory(s, 0x38,
209 boot_device2nibble(boot_device[2]) << 4 | (fd_bootchk ? 0x0 : 0x1));
210
211 /* floppy type */
212
213 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
214 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
215
216 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
217 rtc_set_memory(s, 0x10, val);
218
219 val = 0;
220 nb = 0;
221 if (fd0 < 3)
222 nb++;
223 if (fd1 < 3)
224 nb++;
225 switch (nb) {
226 case 0:
227 break;
228 case 1:
229 val |= 0x01; /* 1 drive, ready for boot */
230 break;
231 case 2:
232 val |= 0x41; /* 2 drives, ready for boot */
233 break;
234 }
235 val |= 0x02; /* FPU is there */
236 val |= 0x04; /* PS/2 mouse installed */
237 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
238
239 /* hard drives */
240
241 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
242 if (hd_table[0])
243 cmos_init_hd(0x19, 0x1b, hd_table[0]);
244 if (hd_table[1])
245 cmos_init_hd(0x1a, 0x24, hd_table[1]);
246
247 val = 0;
248 for (i = 0; i < 4; i++) {
249 if (hd_table[i]) {
250 int cylinders, heads, sectors, translation;
251 /* NOTE: bdrv_get_geometry_hint() returns the physical
252 geometry. It is always such that: 1 <= sects <= 63, 1
253 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
254 geometry can be different if a translation is done. */
255 translation = bdrv_get_translation_hint(hd_table[i]);
256 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
257 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
258 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
259 /* No translation. */
260 translation = 0;
261 } else {
262 /* LBA translation. */
263 translation = 1;
264 }
265 } else {
266 translation--;
267 }
268 val |= translation << (i * 2);
269 }
270 }
271 rtc_set_memory(s, 0x39, val);
272 }
273
274 void ioport_set_a20(int enable)
275 {
276 /* XXX: send to all CPUs ? */
277 cpu_x86_set_a20(first_cpu, enable);
278 }
279
280 int ioport_get_a20(void)
281 {
282 return ((first_cpu->a20_mask >> 20) & 1);
283 }
284
285 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
286 {
287 ioport_set_a20((val >> 1) & 1);
288 /* XXX: bit 0 is fast reset */
289 }
290
291 static uint32_t ioport92_read(void *opaque, uint32_t addr)
292 {
293 return ioport_get_a20() << 1;
294 }
295
296 /***********************************************************/
297 /* Bochs BIOS debug ports */
298
299 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
300 {
301 static const char shutdown_str[8] = "Shutdown";
302 static int shutdown_index = 0;
303
304 switch(addr) {
305 /* Bochs BIOS messages */
306 case 0x400:
307 case 0x401:
308 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
309 exit(1);
310 case 0x402:
311 case 0x403:
312 #ifdef DEBUG_BIOS
313 fprintf(stderr, "%c", val);
314 #endif
315 break;
316 case 0x8900:
317 /* same as Bochs power off */
318 if (val == shutdown_str[shutdown_index]) {
319 shutdown_index++;
320 if (shutdown_index == 8) {
321 shutdown_index = 0;
322 qemu_system_shutdown_request();
323 }
324 } else {
325 shutdown_index = 0;
326 }
327 break;
328
329 /* LGPL'ed VGA BIOS messages */
330 case 0x501:
331 case 0x502:
332 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
333 exit(1);
334 case 0x500:
335 case 0x503:
336 #ifdef DEBUG_BIOS
337 fprintf(stderr, "%c", val);
338 #endif
339 break;
340 }
341 }
342
343 void bochs_bios_init(void)
344 {
345 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
346 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
347 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
348 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
349 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
350
351 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
352 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
353 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
354 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
355 }
356
357 /* Generate an initial boot sector which sets state and jump to
358 a specified vector */
359 static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
360 {
361 uint8_t bootsect[512], *p;
362 int i;
363
364 if (bs_table[0] == NULL) {
365 fprintf(stderr, "A disk image must be given for 'hda' when booting "
366 "a Linux kernel\n");
367 exit(1);
368 }
369
370 memset(bootsect, 0, sizeof(bootsect));
371
372 /* Copy the MSDOS partition table if possible */
373 bdrv_read(bs_table[0], 0, bootsect, 1);
374
375 /* Make sure we have a partition signature */
376 bootsect[510] = 0x55;
377 bootsect[511] = 0xaa;
378
379 /* Actual code */
380 p = bootsect;
381 *p++ = 0xfa; /* CLI */
382 *p++ = 0xfc; /* CLD */
383
384 for (i = 0; i < 6; i++) {
385 if (i == 1) /* Skip CS */
386 continue;
387
388 *p++ = 0xb8; /* MOV AX,imm16 */
389 *p++ = segs[i];
390 *p++ = segs[i] >> 8;
391 *p++ = 0x8e; /* MOV <seg>,AX */
392 *p++ = 0xc0 + (i << 3);
393 }
394
395 for (i = 0; i < 8; i++) {
396 *p++ = 0x66; /* 32-bit operand size */
397 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
398 *p++ = gpr[i];
399 *p++ = gpr[i] >> 8;
400 *p++ = gpr[i] >> 16;
401 *p++ = gpr[i] >> 24;
402 }
403
404 *p++ = 0xea; /* JMP FAR */
405 *p++ = ip; /* IP */
406 *p++ = ip >> 8;
407 *p++ = segs[1]; /* CS */
408 *p++ = segs[1] >> 8;
409
410 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
411 }
412
413 int load_kernel(const char *filename, uint8_t *addr,
414 uint8_t *real_addr)
415 {
416 int fd, size;
417 int setup_sects;
418
419 fd = open(filename, O_RDONLY | O_BINARY);
420 if (fd < 0)
421 return -1;
422
423 /* load 16 bit code */
424 if (read(fd, real_addr, 512) != 512)
425 goto fail;
426 setup_sects = real_addr[0x1F1];
427 if (!setup_sects)
428 setup_sects = 4;
429 if (read(fd, real_addr + 512, setup_sects * 512) !=
430 setup_sects * 512)
431 goto fail;
432
433 /* load 32 bit code */
434 size = read(fd, addr, 16 * 1024 * 1024);
435 if (size < 0)
436 goto fail;
437 close(fd);
438 return size;
439 fail:
440 close(fd);
441 return -1;
442 }
443
444 static long get_file_size(FILE *f)
445 {
446 long where, size;
447
448 /* XXX: on Unix systems, using fstat() probably makes more sense */
449
450 where = ftell(f);
451 fseek(f, 0, SEEK_END);
452 size = ftell(f);
453 fseek(f, where, SEEK_SET);
454
455 return size;
456 }
457
458 static void load_linux(const char *kernel_filename,
459 const char *initrd_filename,
460 const char *kernel_cmdline)
461 {
462 uint16_t protocol;
463 uint32_t gpr[8];
464 uint16_t seg[6];
465 uint16_t real_seg;
466 int setup_size, kernel_size, initrd_size, cmdline_size;
467 uint32_t initrd_max;
468 uint8_t header[1024];
469 uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr;
470 FILE *f, *fi;
471
472 /* Align to 16 bytes as a paranoia measure */
473 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
474
475 /* load the kernel header */
476 f = fopen(kernel_filename, "rb");
477 if (!f || !(kernel_size = get_file_size(f)) ||
478 fread(header, 1, 1024, f) != 1024) {
479 fprintf(stderr, "qemu: could not load kernel '%s'\n",
480 kernel_filename);
481 exit(1);
482 }
483
484 /* kernel protocol version */
485 #if 0
486 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
487 #endif
488 if (ldl_p(header+0x202) == 0x53726448)
489 protocol = lduw_p(header+0x206);
490 else
491 protocol = 0;
492
493 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
494 /* Low kernel */
495 real_addr = phys_ram_base + 0x90000;
496 cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
497 prot_addr = phys_ram_base + 0x10000;
498 } else if (protocol < 0x202) {
499 /* High but ancient kernel */
500 real_addr = phys_ram_base + 0x90000;
501 cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
502 prot_addr = phys_ram_base + 0x100000;
503 } else {
504 /* High and recent kernel */
505 real_addr = phys_ram_base + 0x10000;
506 cmdline_addr = phys_ram_base + 0x20000;
507 prot_addr = phys_ram_base + 0x100000;
508 }
509
510 #if 0
511 fprintf(stderr,
512 "qemu: real_addr = %#zx\n"
513 "qemu: cmdline_addr = %#zx\n"
514 "qemu: prot_addr = %#zx\n",
515 real_addr-phys_ram_base,
516 cmdline_addr-phys_ram_base,
517 prot_addr-phys_ram_base);
518 #endif
519
520 /* highest address for loading the initrd */
521 if (protocol >= 0x203)
522 initrd_max = ldl_p(header+0x22c);
523 else
524 initrd_max = 0x37ffffff;
525
526 if (initrd_max >= ram_size-ACPI_DATA_SIZE)
527 initrd_max = ram_size-ACPI_DATA_SIZE-1;
528
529 /* kernel command line */
530 pstrcpy(cmdline_addr, 4096, kernel_cmdline);
531
532 if (protocol >= 0x202) {
533 stl_p(header+0x228, cmdline_addr-phys_ram_base);
534 } else {
535 stw_p(header+0x20, 0xA33F);
536 stw_p(header+0x22, cmdline_addr-real_addr);
537 }
538
539 /* loader type */
540 /* High nybble = B reserved for Qemu; low nybble is revision number.
541 If this code is substantially changed, you may want to consider
542 incrementing the revision. */
543 if (protocol >= 0x200)
544 header[0x210] = 0xB0;
545
546 /* heap */
547 if (protocol >= 0x201) {
548 header[0x211] |= 0x80; /* CAN_USE_HEAP */
549 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
550 }
551
552 /* load initrd */
553 if (initrd_filename) {
554 if (protocol < 0x200) {
555 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
556 exit(1);
557 }
558
559 fi = fopen(initrd_filename, "rb");
560 if (!fi) {
561 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
562 initrd_filename);
563 exit(1);
564 }
565
566 initrd_size = get_file_size(fi);
567 initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
568
569 fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
570 initrd_size, initrd_addr-phys_ram_base);
571
572 if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) {
573 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
574 initrd_filename);
575 exit(1);
576 }
577 fclose(fi);
578
579 stl_p(header+0x218, initrd_addr-phys_ram_base);
580 stl_p(header+0x21c, initrd_size);
581 }
582
583 /* store the finalized header and load the rest of the kernel */
584 memcpy(real_addr, header, 1024);
585
586 setup_size = header[0x1f1];
587 if (setup_size == 0)
588 setup_size = 4;
589
590 setup_size = (setup_size+1)*512;
591 kernel_size -= setup_size; /* Size of protected-mode code */
592
593 if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 ||
594 fread(prot_addr, 1, kernel_size, f) != kernel_size) {
595 fprintf(stderr, "qemu: read error on kernel '%s'\n",
596 kernel_filename);
597 exit(1);
598 }
599 fclose(f);
600
601 /* generate bootsector to set up the initial register state */
602 real_seg = (real_addr-phys_ram_base) >> 4;
603 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
604 seg[1] = real_seg+0x20; /* CS */
605 memset(gpr, 0, sizeof gpr);
606 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
607
608 generate_bootsect(gpr, seg, 0);
609 }
610
611 static void main_cpu_reset(void *opaque)
612 {
613 CPUState *env = opaque;
614 cpu_reset(env);
615 }
616
617 static const int ide_iobase[2] = { 0x1f0, 0x170 };
618 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
619 static const int ide_irq[2] = { 14, 15 };
620
621 #define NE2000_NB_MAX 6
622
623 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
624 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
625
626 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
627 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
628
629 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
630 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
631
632 #ifdef HAS_AUDIO
633 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
634 {
635 struct soundhw *c;
636 int audio_enabled = 0;
637
638 for (c = soundhw; !audio_enabled && c->name; ++c) {
639 audio_enabled = c->enabled;
640 }
641
642 if (audio_enabled) {
643 AudioState *s;
644
645 s = AUD_init ();
646 if (s) {
647 for (c = soundhw; c->name; ++c) {
648 if (c->enabled) {
649 if (c->isa) {
650 c->init.init_isa (s, pic);
651 }
652 else {
653 if (pci_bus) {
654 c->init.init_pci (pci_bus, s);
655 }
656 }
657 }
658 }
659 }
660 }
661 }
662 #endif
663
664 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
665 {
666 static int nb_ne2k = 0;
667
668 if (nb_ne2k == NE2000_NB_MAX)
669 return;
670 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
671 nb_ne2k++;
672 }
673
674 /* PC hardware initialisation */
675 static void pc_init1(int ram_size, int vga_ram_size, const char *boot_device,
676 DisplayState *ds, const char **fd_filename, int snapshot,
677 const char *kernel_filename, const char *kernel_cmdline,
678 const char *initrd_filename,
679 int pci_enabled, const char *cpu_model)
680 {
681 char buf[1024];
682 int ret, linux_boot, i;
683 ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
684 int bios_size, isa_bios_size, vga_bios_size;
685 PCIBus *pci_bus;
686 int piix3_devfn = -1;
687 CPUState *env;
688 NICInfo *nd;
689 qemu_irq *cpu_irq;
690 qemu_irq *i8259;
691
692 linux_boot = (kernel_filename != NULL);
693
694 /* init CPUs */
695 if (cpu_model == NULL) {
696 #ifdef TARGET_X86_64
697 cpu_model = "qemu64";
698 #else
699 cpu_model = "qemu32";
700 #endif
701 }
702
703 for(i = 0; i < smp_cpus; i++) {
704 env = cpu_init(cpu_model);
705 if (!env) {
706 fprintf(stderr, "Unable to find x86 CPU definition\n");
707 exit(1);
708 }
709 if (i != 0)
710 env->hflags |= HF_HALTED_MASK;
711 if (smp_cpus > 1) {
712 /* XXX: enable it in all cases */
713 env->cpuid_features |= CPUID_APIC;
714 }
715 register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
716 qemu_register_reset(main_cpu_reset, env);
717 if (pci_enabled) {
718 apic_init(env);
719 }
720 vmport_init(env);
721 }
722
723 /* allocate RAM */
724 ram_addr = qemu_ram_alloc(ram_size);
725 cpu_register_physical_memory(0, ram_size, ram_addr);
726
727 /* allocate VGA RAM */
728 vga_ram_addr = qemu_ram_alloc(vga_ram_size);
729
730 /* BIOS load */
731 if (bios_name == NULL)
732 bios_name = BIOS_FILENAME;
733 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
734 bios_size = get_image_size(buf);
735 if (bios_size <= 0 ||
736 (bios_size % 65536) != 0) {
737 goto bios_error;
738 }
739 bios_offset = qemu_ram_alloc(bios_size);
740 ret = load_image(buf, phys_ram_base + bios_offset);
741 if (ret != bios_size) {
742 bios_error:
743 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
744 exit(1);
745 }
746
747 /* VGA BIOS load */
748 if (cirrus_vga_enabled) {
749 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
750 } else {
751 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
752 }
753 vga_bios_size = get_image_size(buf);
754 if (vga_bios_size <= 0 || vga_bios_size > 65536)
755 goto vga_bios_error;
756 vga_bios_offset = qemu_ram_alloc(65536);
757
758 ret = load_image(buf, phys_ram_base + vga_bios_offset);
759 if (ret != vga_bios_size) {
760 vga_bios_error:
761 fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
762 exit(1);
763 }
764
765 /* setup basic memory access */
766 cpu_register_physical_memory(0xc0000, 0x10000,
767 vga_bios_offset | IO_MEM_ROM);
768
769 /* map the last 128KB of the BIOS in ISA space */
770 isa_bios_size = bios_size;
771 if (isa_bios_size > (128 * 1024))
772 isa_bios_size = 128 * 1024;
773 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
774 IO_MEM_UNASSIGNED);
775 cpu_register_physical_memory(0x100000 - isa_bios_size,
776 isa_bios_size,
777 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
778
779 {
780 ram_addr_t option_rom_offset;
781 int size, offset;
782
783 offset = 0;
784 for (i = 0; i < nb_option_roms; i++) {
785 size = get_image_size(option_rom[i]);
786 if (size < 0) {
787 fprintf(stderr, "Could not load option rom '%s'\n",
788 option_rom[i]);
789 exit(1);
790 }
791 if (size > (0x10000 - offset))
792 goto option_rom_error;
793 option_rom_offset = qemu_ram_alloc(size);
794 ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
795 if (ret != size) {
796 option_rom_error:
797 fprintf(stderr, "Too many option ROMS\n");
798 exit(1);
799 }
800 size = (size + 4095) & ~4095;
801 cpu_register_physical_memory(0xd0000 + offset,
802 size, option_rom_offset | IO_MEM_ROM);
803 offset += size;
804 }
805 }
806
807 /* map all the bios at the top of memory */
808 cpu_register_physical_memory((uint32_t)(-bios_size),
809 bios_size, bios_offset | IO_MEM_ROM);
810
811 bochs_bios_init();
812
813 if (linux_boot)
814 load_linux(kernel_filename, initrd_filename, kernel_cmdline);
815
816 cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
817 i8259 = i8259_init(cpu_irq[0]);
818 ferr_irq = i8259[13];
819
820 if (pci_enabled) {
821 pci_bus = i440fx_init(&i440fx_state, i8259);
822 piix3_devfn = piix3_init(pci_bus, -1);
823 } else {
824 pci_bus = NULL;
825 }
826
827 /* init basic PC hardware */
828 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
829
830 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
831
832 if (cirrus_vga_enabled) {
833 if (pci_enabled) {
834 pci_cirrus_vga_init(pci_bus,
835 ds, phys_ram_base + vga_ram_addr,
836 vga_ram_addr, vga_ram_size);
837 } else {
838 isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
839 vga_ram_addr, vga_ram_size);
840 }
841 } else if (vmsvga_enabled) {
842 if (pci_enabled)
843 pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size,
844 ram_size, vga_ram_size);
845 else
846 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
847 } else {
848 if (pci_enabled) {
849 pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
850 vga_ram_addr, vga_ram_size, 0, 0);
851 } else {
852 isa_vga_init(ds, phys_ram_base + vga_ram_addr,
853 vga_ram_addr, vga_ram_size);
854 }
855 }
856
857 rtc_state = rtc_init(0x70, i8259[8]);
858
859 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
860 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
861
862 if (pci_enabled) {
863 ioapic = ioapic_init();
864 }
865 pit = pit_init(0x40, i8259[0]);
866 pcspk_init(pit);
867 if (pci_enabled) {
868 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
869 }
870
871 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
872 if (serial_hds[i]) {
873 serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
874 }
875 }
876
877 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
878 if (parallel_hds[i]) {
879 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
880 parallel_hds[i]);
881 }
882 }
883
884 for(i = 0; i < nb_nics; i++) {
885 nd = &nd_table[i];
886 if (!nd->model) {
887 if (pci_enabled) {
888 nd->model = "ne2k_pci";
889 } else {
890 nd->model = "ne2k_isa";
891 }
892 }
893 if (strcmp(nd->model, "ne2k_isa") == 0) {
894 pc_init_ne2k_isa(nd, i8259);
895 } else if (pci_enabled) {
896 if (strcmp(nd->model, "?") == 0)
897 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
898 pci_nic_init(pci_bus, nd, -1);
899 } else if (strcmp(nd->model, "?") == 0) {
900 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
901 exit(1);
902 } else {
903 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
904 exit(1);
905 }
906 }
907
908 if (pci_enabled) {
909 pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259);
910 } else {
911 for(i = 0; i < 2; i++) {
912 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
913 bs_table[2 * i], bs_table[2 * i + 1]);
914 }
915 }
916
917 i8042_init(i8259[1], i8259[12], 0x60);
918 DMA_init(0);
919 #ifdef HAS_AUDIO
920 audio_init(pci_enabled ? pci_bus : NULL, i8259);
921 #endif
922
923 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table);
924
925 cmos_init(ram_size, boot_device, bs_table);
926
927 if (pci_enabled && usb_enabled) {
928 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
929 }
930
931 if (pci_enabled && acpi_enabled) {
932 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
933 i2c_bus *smbus;
934
935 /* TODO: Populate SPD eeprom data. */
936 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100);
937 for (i = 0; i < 8; i++) {
938 smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
939 }
940 }
941
942 if (i440fx_state) {
943 i440fx_init_memory_mappings(i440fx_state);
944 }
945 #if 0
946 /* ??? Need to figure out some way for the user to
947 specify SCSI devices. */
948 if (pci_enabled) {
949 void *scsi;
950 BlockDriverState *bdrv;
951
952 scsi = lsi_scsi_init(pci_bus, -1);
953 bdrv = bdrv_new("scsidisk");
954 bdrv_open(bdrv, "scsi_disk.img", 0);
955 lsi_scsi_attach(scsi, bdrv, -1);
956 bdrv = bdrv_new("scsicd");
957 bdrv_open(bdrv, "scsi_cd.iso", 0);
958 bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
959 lsi_scsi_attach(scsi, bdrv, -1);
960 }
961 #endif
962 }
963
964 static void pc_init_pci(int ram_size, int vga_ram_size, const char *boot_device,
965 DisplayState *ds, const char **fd_filename,
966 int snapshot,
967 const char *kernel_filename,
968 const char *kernel_cmdline,
969 const char *initrd_filename,
970 const char *cpu_model)
971 {
972 pc_init1(ram_size, vga_ram_size, boot_device,
973 ds, fd_filename, snapshot,
974 kernel_filename, kernel_cmdline,
975 initrd_filename, 1, cpu_model);
976 }
977
978 static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device,
979 DisplayState *ds, const char **fd_filename,
980 int snapshot,
981 const char *kernel_filename,
982 const char *kernel_cmdline,
983 const char *initrd_filename,
984 const char *cpu_model)
985 {
986 pc_init1(ram_size, vga_ram_size, boot_device,
987 ds, fd_filename, snapshot,
988 kernel_filename, kernel_cmdline,
989 initrd_filename, 0, cpu_model);
990 }
991
992 QEMUMachine pc_machine = {
993 "pc",
994 "Standard PC",
995 pc_init_pci,
996 };
997
998 QEMUMachine isapc_machine = {
999 "isapc",
1000 "ISA-only PC",
1001 pc_init_isa,
1002 };