hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5
   6 /* PC-style peripherals (also used by other machines).  */
   7
   8 /* serial.c */
   9
  10 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  11                          CharDriverState *chr);
  12 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  13                              qemu_irq irq, int baudbase,
  14                              CharDriverState *chr, int ioregister);
  15
  16 /* parallel.c */
  17
  18 typedef struct ParallelState ParallelState;
  19 ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
  20 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
  21
  22 /* i8259.c */
  23
  24 typedef struct PicState2 PicState2;
  25 extern PicState2 *isa_pic;
  26 void pic_set_irq(int irq, int level);
  27 void pic_set_irq_new(void *opaque, int irq, int level);
  28 qemu_irq *i8259_init(qemu_irq parent_irq);
  29 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
  30                           void *alt_irq_opaque);
  31 int pic_read_irq(PicState2 *s);
  32 void pic_update_irq(PicState2 *s);
  33 uint32_t pic_intack_read(PicState2 *s);
  34 void pic_info(Monitor *mon);
  35 void irq_info(Monitor *mon);
  36
  37 /* APIC */
  38 typedef struct IOAPICState IOAPICState;
  39 void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
  40                              uint8_t delivery_mode,
  41                              uint8_t vector_num, uint8_t polarity,
  42                              uint8_t trigger_mode);
  43 int apic_init(CPUState *env);
  44 int apic_accept_pic_intr(CPUState *env);
  45 void apic_deliver_pic_intr(CPUState *env, int level);
  46 int apic_get_interrupt(CPUState *env);
  47 IOAPICState *ioapic_init(void);
  48 void ioapic_set_irq(void *opaque, int vector, int level);
  49 void apic_reset_irq_delivered(void);
  50 int apic_get_irq_delivered(void);
  51
  52 /* i8254.c */
  53
  54 #define PIT_FREQ 1193182
  55
  56 typedef struct PITState PITState;
  57
  58 PITState *pit_init(int base, qemu_irq irq);
  59 void pit_set_gate(PITState *pit, int channel, int val);
  60 int pit_get_gate(PITState *pit, int channel);
  61 int pit_get_initial_count(PITState *pit, int channel);
  62 int pit_get_mode(PITState *pit, int channel);
  63 int pit_get_out(PITState *pit, int channel, int64_t current_time);
  64
  65 void hpet_pit_disable(void);
  66 void hpet_pit_enable(void);
  67
  68 /* vmport.c */
  69 void vmport_init(void);
  70 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  71
  72 /* vmmouse.c */
  73 void *vmmouse_init(void *m);
  74
  75 /* pckbd.c */
  76
  77 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  78 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  79                    target_phys_addr_t base, ram_addr_t size,
  80                    target_phys_addr_t mask);
  81
  82 /* mc146818rtc.c */
  83
  84 typedef struct RTCState RTCState;
  85
  86 RTCState *rtc_init(int base, qemu_irq irq, int base_year);
  87 RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year);
  88 RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
  89                       int base_year);
  90 void rtc_set_memory(RTCState *s, int addr, int val);
  91 void rtc_set_date(RTCState *s, const struct tm *tm);
  92 void cmos_set_s3_resume(void);
  93
  94 /* pc.c */
  95 extern int fd_bootchk;
  96
  97 void ioport_set_a20(int enable);
  98 int ioport_get_a20(void);
  99
 100 /* acpi.c */
 101 extern int acpi_enabled;
 102 extern char *acpi_tables;
 103 extern size_t acpi_tables_len;
 104
 105 void acpi_bios_init(void);
 106 int acpi_table_add(const char *table_desc);
 107
 108 /* acpi_piix.c */
 109 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 110                        qemu_irq sci_irq);
 111 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 112 void piix4_acpi_system_hot_add_init(void);
 113
 114 /* hpet.c */
 115 extern int no_hpet;
 116
 117 /* pcspk.c */
 118 void pcspk_init(PITState *);
 119 int pcspk_audio_init(qemu_irq *pic);
 120
 121 /* piix_pci.c */
 122 PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic);
 123 void i440fx_set_smm(PCIDevice *d, int val);
 124 int piix3_init(PCIBus *bus, int devfn);
 125 void i440fx_init_memory_mappings(PCIDevice *d);
 126
 127 extern PCIDevice *piix4_dev;
 128 int piix4_init(PCIBus *bus, int devfn);
 129
 130 /* vga.c */
 131 enum vga_retrace_method {
 132     VGA_RETRACE_DUMB,
 133     VGA_RETRACE_PRECISE
 134 };
 135
 136 extern enum vga_retrace_method vga_retrace_method;
 137
 138 int isa_vga_init(void);
 139 int pci_vga_init(PCIBus *bus,
 140                  unsigned long vga_bios_offset, int vga_bios_size);
 141 int isa_vga_mm_init(target_phys_addr_t vram_base,
 142                     target_phys_addr_t ctrl_base, int it_shift);
 143
 144 /* cirrus_vga.c */
 145 void pci_cirrus_vga_init(PCIBus *bus);
 146 void isa_cirrus_vga_init(void);
 147
 148 /* ide.c */
 149 void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
 150                   BlockDriverState *hd0, BlockDriverState *hd1);
 151 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
 152                          int secondary_ide_enabled);
 153 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 154                         qemu_irq *pic);
 155 void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 156                         qemu_irq *pic);
 157
 158 /* ne2000.c */
 159
 160 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
 161
 162 int cpu_is_bsp(CPUState *env);
 163 #endif