hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "ioport.h"
   6 #include "isa.h"
   7 #include "fdc.h"
   8
   9 /* PC-style peripherals (also used by other machines).  */
  10
  11 /* serial.c */
  12
  13 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  14                          CharDriverState *chr);
  15 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  16                              qemu_irq irq, int baudbase,
  17                              CharDriverState *chr, int ioregister,
  18                              int be);
  19 SerialState *serial_isa_init(int index, CharDriverState *chr);
  20 void serial_set_frequency(SerialState *s, uint32_t frequency);
  21
  22 /* parallel.c */
  23
  24 typedef struct ParallelState ParallelState;
  25 ParallelState *parallel_init(int index, CharDriverState *chr);
  26 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
  27
  28 /* i8259.c */
  29
  30 typedef struct PicState2 PicState2;
  31 extern PicState2 *isa_pic;
  32 void pic_set_irq(int irq, int level);
  33 void pic_set_irq_new(void *opaque, int irq, int level);
  34 qemu_irq *i8259_init(qemu_irq parent_irq);
  35 int pic_read_irq(PicState2 *s);
  36 void pic_update_irq(PicState2 *s);
  37 uint32_t pic_intack_read(PicState2 *s);
  38 void pic_info(Monitor *mon);
  39 void irq_info(Monitor *mon);
  40
  41 /* ISA */
  42 typedef struct isa_irq_state {
  43     qemu_irq *i8259;
  44     qemu_irq *ioapic;
  45 } IsaIrqState;
  46
  47 void isa_irq_handler(void *opaque, int n, int level);
  48
  49 /* i8254.c */
  50
  51 #define PIT_FREQ 1193182
  52
  53 typedef struct PITState PITState;
  54
  55 PITState *pit_init(int base, qemu_irq irq);
  56 void pit_set_gate(PITState *pit, int channel, int val);
  57 int pit_get_gate(PITState *pit, int channel);
  58 int pit_get_initial_count(PITState *pit, int channel);
  59 int pit_get_mode(PITState *pit, int channel);
  60 int pit_get_out(PITState *pit, int channel, int64_t current_time);
  61
  62 void hpet_pit_disable(void);
  63 void hpet_pit_enable(void);
  64
  65 /* vmport.c */
  66 void vmport_init(void);
  67 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  68
  69 /* vmmouse.c */
  70 void *vmmouse_init(void *m);
  71
  72 /* pckbd.c */
  73
  74 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  75 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  76                    target_phys_addr_t base, ram_addr_t size,
  77                    target_phys_addr_t mask);
  78
  79 /* mc146818rtc.c */
  80
  81 typedef struct RTCState RTCState;
  82
  83 RTCState *rtc_init(int base_year);
  84 void rtc_set_memory(RTCState *s, int addr, int val);
  85 void rtc_set_date(RTCState *s, const struct tm *tm);
  86
  87 /* pc.c */
  88 extern int fd_bootchk;
  89
  90 void pc_register_ferr_irq(qemu_irq irq);
  91 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
  92 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
  93
  94 void pc_cpus_init(const char *cpu_model);
  95 void pc_memory_init(ram_addr_t ram_size,
  96                     const char *kernel_filename,
  97                     const char *kernel_cmdline,
  98                     const char *initrd_filename,
  99                     ram_addr_t *below_4g_mem_size_p,
 100                     ram_addr_t *above_4g_mem_size_p);
 101 qemu_irq *pc_allocate_cpu_irq(void);
 102 void pc_vga_init(PCIBus *pci_bus);
 103 void pc_basic_device_init(qemu_irq *isa_irq,
 104                           FDCtrl **floppy_controller,
 105                           RTCState **rtc_state);
 106 void pc_init_ne2k_isa(NICInfo *nd);
 107 #ifdef HAS_AUDIO
 108 void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic);
 109 #endif
 110 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 111                   const char *boot_device, DriveInfo **hd_table,
 112                   FDCtrl *floppy_controller, RTCState *s);
 113 void pc_pci_device_init(PCIBus *pci_bus);
 114
 115 void ioport_set_a20(int enable);
 116 int ioport_get_a20(void);
 117
 118 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 119 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 120
 121 /* acpi.c */
 122 extern int acpi_enabled;
 123 extern char *acpi_tables;
 124 extern size_t acpi_tables_len;
 125
 126 void acpi_bios_init(void);
 127 int acpi_table_add(const char *table_desc);
 128
 129 /* acpi_piix.c */
 130
 131 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 132                        qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
 133                        int kvm_enabled);
 134 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 135 void piix4_acpi_system_hot_add_init(PCIBus *bus);
 136
 137 /* hpet.c */
 138 extern int no_hpet;
 139
 140 /* pcspk.c */
 141 void pcspk_init(PITState *);
 142 int pcspk_audio_init(qemu_irq *pic);
 143
 144 /* piix_pci.c */
 145 struct PCII440FXState;
 146 typedef struct PCII440FXState PCII440FXState;
 147
 148 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, int ram_size);
 149 void i440fx_init_memory_mappings(PCII440FXState *d);
 150
 151 /* piix4.c */
 152 extern PCIDevice *piix4_dev;
 153 int piix4_init(PCIBus *bus, int devfn);
 154
 155 /* vga.c */
 156 enum vga_retrace_method {
 157     VGA_RETRACE_DUMB,
 158     VGA_RETRACE_PRECISE
 159 };
 160
 161 extern enum vga_retrace_method vga_retrace_method;
 162
 163 int isa_vga_init(void);
 164 int pci_vga_init(PCIBus *bus,
 165                  unsigned long vga_bios_offset, int vga_bios_size);
 166 int isa_vga_mm_init(target_phys_addr_t vram_base,
 167                     target_phys_addr_t ctrl_base, int it_shift);
 168
 169 /* cirrus_vga.c */
 170 void pci_cirrus_vga_init(PCIBus *bus);
 171 void isa_cirrus_vga_init(void);
 172
 173 /* ne2000.c */
 174
 175 void isa_ne2000_init(int base, int irq, NICInfo *nd);
 176
 177 /* e820 types */
 178 #define E820_RAM        1
 179 #define E820_RESERVED   2
 180 #define E820_ACPI       3
 181 #define E820_NVS        4
 182 #define E820_UNUSABLE   5
 183
 184 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 185
 186 #endif