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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "hw.h"
26 #include "pc.h"
27 #include "apic.h"
28 #include "pci.h"
29 #include "usb-uhci.h"
30 #include "usb-ohci.h"
31 #include "net.h"
32 #include "boards.h"
33 #include "ide.h"
34 #include "kvm.h"
35 #include "kvmclock.h"
36 #include "sysemu.h"
37 #include "sysbus.h"
38 #include "arch_init.h"
39 #include "blockdev.h"
40 #include "smbus.h"
41
42 #define MAX_IDE_BUS 2
43
44 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
45 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
46 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
47
48 static void ioapic_init(IsaIrqState *isa_irq_state)
49 {
50 DeviceState *dev;
51 SysBusDevice *d;
52 unsigned int i;
53
54 dev = qdev_create(NULL, "ioapic");
55 qdev_init_nofail(dev);
56 d = sysbus_from_qdev(dev);
57 sysbus_mmio_map(d, 0, 0xfec00000);
58
59 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
60 isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
61 }
62 }
63
64 /* PC hardware initialisation */
65 static void pc_init1(ram_addr_t ram_size,
66 const char *boot_device,
67 const char *kernel_filename,
68 const char *kernel_cmdline,
69 const char *initrd_filename,
70 const char *cpu_model,
71 int pci_enabled,
72 int kvmclock_enabled)
73 {
74 int i;
75 ram_addr_t below_4g_mem_size, above_4g_mem_size;
76 PCIBus *pci_bus;
77 PCII440FXState *i440fx_state;
78 int piix3_devfn = -1;
79 qemu_irq *cpu_irq;
80 qemu_irq *isa_irq;
81 qemu_irq *i8259;
82 qemu_irq *cmos_s3;
83 qemu_irq *smi_irq;
84 IsaIrqState *isa_irq_state;
85 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
86 BusState *idebus[MAX_IDE_BUS];
87 ISADevice *rtc_state;
88
89 pc_cpus_init(cpu_model);
90
91 if (kvmclock_enabled) {
92 kvmclock_create();
93 }
94
95 /* allocate ram and load rom/bios */
96 pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
97 &below_4g_mem_size, &above_4g_mem_size);
98
99 cpu_irq = pc_allocate_cpu_irq();
100 i8259 = i8259_init(cpu_irq[0]);
101 isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
102 isa_irq_state->i8259 = i8259;
103 if (pci_enabled) {
104 ioapic_init(isa_irq_state);
105 }
106 isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
107
108 if (pci_enabled) {
109 pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
110 } else {
111 pci_bus = NULL;
112 i440fx_state = NULL;
113 isa_bus_new(NULL);
114 }
115 isa_bus_irqs(isa_irq);
116
117 pc_register_ferr_irq(isa_get_irq(13));
118
119 pc_vga_init(pci_enabled? pci_bus: NULL);
120
121 /* init basic PC hardware */
122 pc_basic_device_init(isa_irq, &rtc_state);
123
124 for(i = 0; i < nb_nics; i++) {
125 NICInfo *nd = &nd_table[i];
126
127 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
128 pc_init_ne2k_isa(nd);
129 else
130 pci_nic_init_nofail(nd, "e1000", NULL);
131 }
132
133 ide_drive_get(hd, MAX_IDE_BUS);
134 if (pci_enabled) {
135 PCIDevice *dev;
136 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
137 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
138 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
139 } else {
140 for(i = 0; i < MAX_IDE_BUS; i++) {
141 ISADevice *dev;
142 dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
143 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
144 idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
145 }
146 }
147
148 audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
149
150 pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
151 idebus[0], idebus[1], rtc_state);
152
153 if (pci_enabled && usb_enabled) {
154 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
155 }
156
157 if (pci_enabled && acpi_enabled) {
158 i2c_bus *smbus;
159
160 cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
161 smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
162 /* TODO: Populate SPD eeprom data. */
163 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
164 isa_get_irq(9), *cmos_s3, *smi_irq,
165 kvm_enabled());
166 smbus_eeprom_init(smbus, 8, NULL, 0);
167 }
168
169 if (i440fx_state) {
170 i440fx_init_memory_mappings(i440fx_state);
171 }
172
173 if (pci_enabled) {
174 pc_pci_device_init(pci_bus);
175 }
176 }
177
178 static void pc_init_pci(ram_addr_t ram_size,
179 const char *boot_device,
180 const char *kernel_filename,
181 const char *kernel_cmdline,
182 const char *initrd_filename,
183 const char *cpu_model)
184 {
185 pc_init1(ram_size, boot_device,
186 kernel_filename, kernel_cmdline,
187 initrd_filename, cpu_model, 1, 1);
188 }
189
190 static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
191 const char *boot_device,
192 const char *kernel_filename,
193 const char *kernel_cmdline,
194 const char *initrd_filename,
195 const char *cpu_model)
196 {
197 pc_init1(ram_size, boot_device,
198 kernel_filename, kernel_cmdline,
199 initrd_filename, cpu_model, 1, 0);
200 }
201
202 static void pc_init_isa(ram_addr_t ram_size,
203 const char *boot_device,
204 const char *kernel_filename,
205 const char *kernel_cmdline,
206 const char *initrd_filename,
207 const char *cpu_model)
208 {
209 if (cpu_model == NULL)
210 cpu_model = "486";
211 pc_init1(ram_size, boot_device,
212 kernel_filename, kernel_cmdline,
213 initrd_filename, cpu_model, 0, 1);
214 }
215
216 static QEMUMachine pc_machine = {
217 .name = "pc-0.14",
218 .alias = "pc",
219 .desc = "Standard PC",
220 .init = pc_init_pci,
221 .max_cpus = 255,
222 .is_default = 1,
223 };
224
225 static QEMUMachine pc_machine_v0_13 = {
226 .name = "pc-0.13",
227 .desc = "Standard PC",
228 .init = pc_init_pci_no_kvmclock,
229 .max_cpus = 255,
230 .compat_props = (GlobalProperty[]) {
231 {
232 .driver = "virtio-9p-pci",
233 .property = "vectors",
234 .value = stringify(0),
235 },{
236 .driver = "VGA",
237 .property = "rombar",
238 .value = stringify(0),
239 },{
240 .driver = "vmware-svga",
241 .property = "rombar",
242 .value = stringify(0),
243 },{
244 .driver = "PCI",
245 .property = "command_serr_enable",
246 .value = "off",
247 },{
248 .driver = "virtio-blk-pci",
249 .property = "event_idx",
250 .value = "off",
251 },{
252 .driver = "virtio-serial-pci",
253 .property = "event_idx",
254 .value = "off",
255 },{
256 .driver = "virtio-net-pci",
257 .property = "event_idx",
258 .value = "off",
259 },
260 { /* end of list */ }
261 },
262 };
263
264 static QEMUMachine pc_machine_v0_12 = {
265 .name = "pc-0.12",
266 .desc = "Standard PC",
267 .init = pc_init_pci_no_kvmclock,
268 .max_cpus = 255,
269 .compat_props = (GlobalProperty[]) {
270 {
271 .driver = "virtio-serial-pci",
272 .property = "max_ports",
273 .value = stringify(1),
274 },{
275 .driver = "virtio-serial-pci",
276 .property = "vectors",
277 .value = stringify(0),
278 },{
279 .driver = "VGA",
280 .property = "rombar",
281 .value = stringify(0),
282 },{
283 .driver = "vmware-svga",
284 .property = "rombar",
285 .value = stringify(0),
286 },{
287 .driver = "PCI",
288 .property = "command_serr_enable",
289 .value = "off",
290 },{
291 .driver = "virtio-blk-pci",
292 .property = "event_idx",
293 .value = "off",
294 },{
295 .driver = "virtio-serial-pci",
296 .property = "event_idx",
297 .value = "off",
298 },{
299 .driver = "virtio-net-pci",
300 .property = "event_idx",
301 .value = "off",
302 },
303 { /* end of list */ }
304 }
305 };
306
307 static QEMUMachine pc_machine_v0_11 = {
308 .name = "pc-0.11",
309 .desc = "Standard PC, qemu 0.11",
310 .init = pc_init_pci_no_kvmclock,
311 .max_cpus = 255,
312 .compat_props = (GlobalProperty[]) {
313 {
314 .driver = "virtio-blk-pci",
315 .property = "vectors",
316 .value = stringify(0),
317 },{
318 .driver = "virtio-serial-pci",
319 .property = "max_ports",
320 .value = stringify(1),
321 },{
322 .driver = "virtio-serial-pci",
323 .property = "vectors",
324 .value = stringify(0),
325 },{
326 .driver = "ide-drive",
327 .property = "ver",
328 .value = "0.11",
329 },{
330 .driver = "scsi-disk",
331 .property = "ver",
332 .value = "0.11",
333 },{
334 .driver = "PCI",
335 .property = "rombar",
336 .value = stringify(0),
337 },{
338 .driver = "PCI",
339 .property = "command_serr_enable",
340 .value = "off",
341 },{
342 .driver = "virtio-blk-pci",
343 .property = "event_idx",
344 .value = "off",
345 },{
346 .driver = "virtio-serial-pci",
347 .property = "event_idx",
348 .value = "off",
349 },{
350 .driver = "virtio-net-pci",
351 .property = "event_idx",
352 .value = "off",
353 },
354 { /* end of list */ }
355 }
356 };
357
358 static QEMUMachine pc_machine_v0_10 = {
359 .name = "pc-0.10",
360 .desc = "Standard PC, qemu 0.10",
361 .init = pc_init_pci_no_kvmclock,
362 .max_cpus = 255,
363 .compat_props = (GlobalProperty[]) {
364 {
365 .driver = "virtio-blk-pci",
366 .property = "class",
367 .value = stringify(PCI_CLASS_STORAGE_OTHER),
368 },{
369 .driver = "virtio-serial-pci",
370 .property = "class",
371 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
372 },{
373 .driver = "virtio-serial-pci",
374 .property = "max_ports",
375 .value = stringify(1),
376 },{
377 .driver = "virtio-serial-pci",
378 .property = "vectors",
379 .value = stringify(0),
380 },{
381 .driver = "virtio-net-pci",
382 .property = "vectors",
383 .value = stringify(0),
384 },{
385 .driver = "virtio-blk-pci",
386 .property = "vectors",
387 .value = stringify(0),
388 },{
389 .driver = "ide-drive",
390 .property = "ver",
391 .value = "0.10",
392 },{
393 .driver = "scsi-disk",
394 .property = "ver",
395 .value = "0.10",
396 },{
397 .driver = "PCI",
398 .property = "rombar",
399 .value = stringify(0),
400 },{
401 .driver = "PCI",
402 .property = "command_serr_enable",
403 .value = "off",
404 },{
405 .driver = "virtio-blk-pci",
406 .property = "event_idx",
407 .value = "off",
408 },{
409 .driver = "virtio-serial-pci",
410 .property = "event_idx",
411 .value = "off",
412 },{
413 .driver = "virtio-net-pci",
414 .property = "event_idx",
415 .value = "off",
416 },
417 { /* end of list */ }
418 },
419 };
420
421 static QEMUMachine isapc_machine = {
422 .name = "isapc",
423 .desc = "ISA-only PC",
424 .init = pc_init_isa,
425 .max_cpus = 1,
426 };
427
428 static void pc_machine_init(void)
429 {
430 qemu_register_machine(&pc_machine);
431 qemu_register_machine(&pc_machine_v0_13);
432 qemu_register_machine(&pc_machine_v0_12);
433 qemu_register_machine(&pc_machine_v0_11);
434 qemu_register_machine(&pc_machine_v0_10);
435 qemu_register_machine(&isapc_machine);
436 }
437
438 machine_init(pc_machine_init);