2 * QEMU Generic PCI Express Bridge Emulation
4 * Copyright (C) 2015 Alexander Graf <agraf@suse.de>
6 * Code loosely based on q35.c.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Check out these documents for more information on the device:
28 * http://www.kernel.org/doc/Documentation/devicetree/bindings/pci/host-generic-pci.txt
29 * http://www.firmware.org/1275/practice/imap/imap0_9d.pdf
31 #include "qemu/osdep.h"
32 #include "qapi/error.h"
34 #include "hw/pci-host/gpex.h"
36 /****************************************************************************
40 static void gpex_set_irq(void *opaque
, int irq_num
, int level
)
44 qemu_set_irq(s
->irq
[irq_num
], level
);
47 int gpex_set_irq_num(GPEXHost
*s
, int index
, int gsi
)
49 if (index
>= GPEX_NUM_IRQS
) {
53 s
->irq_num
[index
] = gsi
;
57 static PCIINTxRoute
gpex_route_intx_pin_to_irq(void *opaque
, int pin
)
61 int gsi
= s
->irq_num
[pin
];
65 route
.mode
= PCI_INTX_DISABLED
;
67 route
.mode
= PCI_INTX_ENABLED
;
73 static void gpex_host_realize(DeviceState
*dev
, Error
**errp
)
75 PCIHostState
*pci
= PCI_HOST_BRIDGE(dev
);
76 GPEXHost
*s
= GPEX_HOST(dev
);
77 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
78 PCIExpressHost
*pex
= PCIE_HOST_BRIDGE(dev
);
81 pcie_host_mmcfg_init(pex
, PCIE_MMCFG_SIZE_MAX
);
82 memory_region_init(&s
->io_mmio
, OBJECT(s
), "gpex_mmio", UINT64_MAX
);
83 memory_region_init(&s
->io_ioport
, OBJECT(s
), "gpex_ioport", 64 * 1024);
85 sysbus_init_mmio(sbd
, &pex
->mmio
);
86 sysbus_init_mmio(sbd
, &s
->io_mmio
);
87 sysbus_init_mmio(sbd
, &s
->io_ioport
);
88 for (i
= 0; i
< GPEX_NUM_IRQS
; i
++) {
89 sysbus_init_irq(sbd
, &s
->irq
[i
]);
93 pci
->bus
= pci_register_root_bus(dev
, "pcie.0", gpex_set_irq
,
94 pci_swizzle_map_irq_fn
, s
, &s
->io_mmio
,
95 &s
->io_ioport
, 0, 4, TYPE_PCIE_BUS
);
97 qdev_set_parent_bus(DEVICE(&s
->gpex_root
), BUS(pci
->bus
));
98 pci_bus_set_route_irq_fn(pci
->bus
, gpex_route_intx_pin_to_irq
);
99 qdev_init_nofail(DEVICE(&s
->gpex_root
));
102 static const char *gpex_host_root_bus_path(PCIHostState
*host_bridge
,
108 static void gpex_host_class_init(ObjectClass
*klass
, void *data
)
110 DeviceClass
*dc
= DEVICE_CLASS(klass
);
111 PCIHostBridgeClass
*hc
= PCI_HOST_BRIDGE_CLASS(klass
);
113 hc
->root_bus_path
= gpex_host_root_bus_path
;
114 dc
->realize
= gpex_host_realize
;
115 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
119 static void gpex_host_initfn(Object
*obj
)
121 GPEXHost
*s
= GPEX_HOST(obj
);
122 GPEXRootState
*root
= &s
->gpex_root
;
124 object_initialize_child(obj
, "gpex_root", root
, sizeof(*root
),
125 TYPE_GPEX_ROOT_DEVICE
, &error_abort
, NULL
);
126 qdev_prop_set_int32(DEVICE(root
), "addr", PCI_DEVFN(0, 0));
127 qdev_prop_set_bit(DEVICE(root
), "multifunction", false);
130 static const TypeInfo gpex_host_info
= {
131 .name
= TYPE_GPEX_HOST
,
132 .parent
= TYPE_PCIE_HOST_BRIDGE
,
133 .instance_size
= sizeof(GPEXHost
),
134 .instance_init
= gpex_host_initfn
,
135 .class_init
= gpex_host_class_init
,
138 /****************************************************************************
142 static const VMStateDescription vmstate_gpex_root
= {
145 .minimum_version_id
= 1,
146 .fields
= (VMStateField
[]) {
147 VMSTATE_PCI_DEVICE(parent_obj
, GPEXRootState
),
148 VMSTATE_END_OF_LIST()
152 static void gpex_root_class_init(ObjectClass
*klass
, void *data
)
154 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
155 DeviceClass
*dc
= DEVICE_CLASS(klass
);
157 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
158 dc
->desc
= "QEMU generic PCIe host bridge";
159 dc
->vmsd
= &vmstate_gpex_root
;
160 k
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
161 k
->device_id
= PCI_DEVICE_ID_REDHAT_PCIE_HOST
;
163 k
->class_id
= PCI_CLASS_BRIDGE_HOST
;
165 * PCI-facing part of the host bridge, not usable without the
166 * host-facing part, which can't be device_add'ed, yet.
168 dc
->user_creatable
= false;
171 static const TypeInfo gpex_root_info
= {
172 .name
= TYPE_GPEX_ROOT_DEVICE
,
173 .parent
= TYPE_PCI_DEVICE
,
174 .instance_size
= sizeof(GPEXRootState
),
175 .class_init
= gpex_root_class_init
,
176 .interfaces
= (InterfaceInfo
[]) {
177 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
182 static void gpex_register(void)
184 type_register_static(&gpex_root_info
);
185 type_register_static(&gpex_host_info
);
188 type_init(gpex_register
)