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1 /*
2 * pci_host.c
3 *
4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22 #include "pci.h"
23 #include "pci_host.h"
24
25 /* debug PCI */
26 //#define DEBUG_PCI
27
28 #ifdef DEBUG_PCI
29 #define PCI_DPRINTF(fmt, ...) \
30 do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0)
31 #else
32 #define PCI_DPRINTF(fmt, ...)
33 #endif
34
35 /*
36 * PCI address
37 * bit 16 - 24: bus number
38 * bit 8 - 15: devfun number
39 * bit 0 - 7: offset in configuration space of a given pci device
40 */
41
42 /* the helper functio to get a PCIDeice* for a given pci address */
43 static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
44 {
45 uint8_t bus_num = addr >> 16;
46 uint8_t devfn = addr >> 8;
47
48 return pci_find_device(bus, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn));
49 }
50
51 void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len)
52 {
53 PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
54 uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
55
56 if (!pci_dev)
57 return;
58
59 PCI_DPRINTF("%s: %s: addr=%02" PRIx32 " val=%08" PRIx32 " len=%d\n",
60 __func__, pci_dev->name, config_addr, val, len);
61 pci_dev->config_write(pci_dev, config_addr, val, len);
62 }
63
64 uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
65 {
66 PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
67 uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
68 uint32_t val;
69
70 assert(len == 1 || len == 2 || len == 4);
71 if (!pci_dev) {
72 return ~0x0;
73 }
74
75 val = pci_dev->config_read(pci_dev, config_addr, len);
76 PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRIx32" len=%d\n",
77 __func__, pci_dev->name, config_addr, val, len);
78
79 return val;
80 }
81
82 static void pci_host_config_write(ReadWriteHandler *handler,
83 pcibus_t addr, uint32_t val, int len)
84 {
85 PCIHostState *s = container_of(handler, PCIHostState, conf_handler);
86
87 PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n",
88 __func__, addr, len, val);
89 #ifdef TARGET_WORDS_BIGENDIAN
90 val = qemu_bswap_len(val, len);
91 #endif
92 s->config_reg = val;
93 }
94
95 static uint32_t pci_host_config_read(ReadWriteHandler *handler,
96 pcibus_t addr, int len)
97 {
98 PCIHostState *s = container_of(handler, PCIHostState, conf_handler);
99 uint32_t val = s->config_reg;
100 #ifdef TARGET_WORDS_BIGENDIAN
101 val = qemu_bswap_len(val, len);
102 #endif
103 PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n",
104 __func__, addr, len, val);
105 return val;
106 }
107
108 static void pci_host_config_write_noswap(ReadWriteHandler *handler,
109 pcibus_t addr, uint32_t val, int len)
110 {
111 PCIHostState *s = container_of(handler, PCIHostState, conf_noswap_handler);
112
113 PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n",
114 __func__, addr, len, val);
115 s->config_reg = val;
116 }
117
118 static uint32_t pci_host_config_read_noswap(ReadWriteHandler *handler,
119 pcibus_t addr, int len)
120 {
121 PCIHostState *s = container_of(handler, PCIHostState, conf_noswap_handler);
122 uint32_t val = s->config_reg;
123
124 PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n",
125 __func__, addr, len, val);
126 return val;
127 }
128
129 static void pci_host_data_write(ReadWriteHandler *handler,
130 pcibus_t addr, uint32_t val, int len)
131 {
132 PCIHostState *s = container_of(handler, PCIHostState, data_handler);
133 #ifdef TARGET_WORDS_BIGENDIAN
134 val = qemu_bswap_len(val, len);
135 #endif
136 PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n",
137 addr, len, val);
138 if (s->config_reg & (1u << 31))
139 pci_data_write(s->bus, s->config_reg | (addr & 3), val, len);
140 }
141
142 static uint32_t pci_host_data_read(ReadWriteHandler *handler,
143 pcibus_t addr, int len)
144 {
145 PCIHostState *s = container_of(handler, PCIHostState, data_handler);
146 uint32_t val;
147 if (!(s->config_reg & (1 << 31)))
148 return 0xffffffff;
149 val = pci_data_read(s->bus, s->config_reg | (addr & 3), len);
150 PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n",
151 addr, len, val);
152 #ifdef TARGET_WORDS_BIGENDIAN
153 val = qemu_bswap_len(val, len);
154 #endif
155 return val;
156 }
157
158 static void pci_host_init(PCIHostState *s)
159 {
160 s->conf_handler.write = pci_host_config_write;
161 s->conf_handler.read = pci_host_config_read;
162 s->conf_noswap_handler.write = pci_host_config_write_noswap;
163 s->conf_noswap_handler.read = pci_host_config_read_noswap;
164 s->data_handler.write = pci_host_data_write;
165 s->data_handler.read = pci_host_data_read;
166 }
167
168 int pci_host_conf_register_mmio(PCIHostState *s)
169 {
170 pci_host_init(s);
171 return cpu_register_io_memory_simple(&s->conf_handler);
172 }
173
174 int pci_host_conf_register_mmio_noswap(PCIHostState *s)
175 {
176 pci_host_init(s);
177 return cpu_register_io_memory_simple(&s->conf_noswap_handler);
178 }
179
180 void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s)
181 {
182 pci_host_init(s);
183 register_ioport_simple(&s->conf_noswap_handler, ioport, 4, 4);
184 }
185
186 int pci_host_data_register_mmio(PCIHostState *s)
187 {
188 pci_host_init(s);
189 return cpu_register_io_memory_simple(&s->data_handler);
190 }
191
192 void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s)
193 {
194 pci_host_init(s);
195 register_ioport_simple(&s->data_handler, ioport, 4, 1);
196 register_ioport_simple(&s->data_handler, ioport, 4, 2);
197 register_ioport_simple(&s->data_handler, ioport, 4, 4);
198 }