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pci_host: consolidate pci config address access.
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1 /*
2 * pci_host.c
3 *
4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22 #include "pci.h"
23 #include "pci_host.h"
24
25 /* debug PCI */
26 //#define DEBUG_PCI
27
28 #ifdef DEBUG_PCI
29 #define PCI_DPRINTF(fmt, ...) \
30 do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0)
31 #else
32 #define PCI_DPRINTF(fmt, ...)
33 #endif
34
35 static void pci_host_config_writel(void *opaque, target_phys_addr_t addr,
36 uint32_t val)
37 {
38 PCIHostState *s = opaque;
39
40 #ifdef TARGET_WORDS_BIGENDIAN
41 val = bswap32(val);
42 #endif
43 PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
44 __func__, addr, val);
45 s->config_reg = val;
46 }
47
48 static uint32_t pci_host_config_readl(void *opaque, target_phys_addr_t addr)
49 {
50 PCIHostState *s = opaque;
51 uint32_t val = s->config_reg;
52
53 #ifdef TARGET_WORDS_BIGENDIAN
54 val = bswap32(val);
55 #endif
56 PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
57 __func__, addr, val);
58 return val;
59 }
60
61 static CPUWriteMemoryFunc * const pci_host_config_write[] = {
62 &pci_host_config_writel,
63 &pci_host_config_writel,
64 &pci_host_config_writel,
65 };
66
67 static CPUReadMemoryFunc * const pci_host_config_read[] = {
68 &pci_host_config_readl,
69 &pci_host_config_readl,
70 &pci_host_config_readl,
71 };
72
73 int pci_host_config_register_io_memory(PCIHostState *s)
74 {
75 return cpu_register_io_memory(pci_host_config_read,
76 pci_host_config_write, s);
77 }
78
79 static void pci_host_config_writel_noswap(void *opaque,
80 target_phys_addr_t addr,
81 uint32_t val)
82 {
83 PCIHostState *s = opaque;
84
85 PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
86 __func__, addr, val);
87 s->config_reg = val;
88 }
89
90 static uint32_t pci_host_config_readl_noswap(void *opaque,
91 target_phys_addr_t addr)
92 {
93 PCIHostState *s = opaque;
94 uint32_t val = s->config_reg;
95
96 PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
97 __func__, addr, val);
98 return val;
99 }
100
101 static CPUWriteMemoryFunc * const pci_host_config_write_noswap[] = {
102 &pci_host_config_writel_noswap,
103 &pci_host_config_writel_noswap,
104 &pci_host_config_writel_noswap,
105 };
106
107 static CPUReadMemoryFunc * const pci_host_config_read_noswap[] = {
108 &pci_host_config_readl_noswap,
109 &pci_host_config_readl_noswap,
110 &pci_host_config_readl_noswap,
111 };
112
113 int pci_host_config_register_io_memory_noswap(PCIHostState *s)
114 {
115 return cpu_register_io_memory(pci_host_config_read_noswap,
116 pci_host_config_write_noswap, s);
117 }
118
119 static void pci_host_config_writel_ioport(void *opaque,
120 uint32_t addr, uint32_t val)
121 {
122 PCIHostState *s = opaque;
123
124 PCI_DPRINTF("%s addr %"PRIx32 " val %"PRIx32"\n", __func__, addr, val);
125 s->config_reg = val;
126 }
127
128 static uint32_t pci_host_config_readl_ioport(void *opaque, uint32_t addr)
129 {
130 PCIHostState *s = opaque;
131 uint32_t val = s->config_reg;
132
133 PCI_DPRINTF("%s addr %"PRIx32" val %"PRIx32"\n", __func__, addr, val);
134 return val;
135 }
136
137 void pci_host_config_register_ioport(pio_addr_t ioport, PCIHostState *s)
138 {
139 register_ioport_write(ioport, 4, 4, pci_host_config_writel_ioport, s);
140 register_ioport_read(ioport, 4, 4, pci_host_config_readl_ioport, s);
141 }
142
143 #define PCI_ADDR_T target_phys_addr_t
144 #define PCI_HOST_SUFFIX _mmio
145
146 #include "pci_host_template.h"
147
148 static CPUWriteMemoryFunc * const pci_host_data_write_mmio[] = {
149 pci_host_data_writeb_mmio,
150 pci_host_data_writew_mmio,
151 pci_host_data_writel_mmio,
152 };
153
154 static CPUReadMemoryFunc * const pci_host_data_read_mmio[] = {
155 pci_host_data_readb_mmio,
156 pci_host_data_readw_mmio,
157 pci_host_data_readl_mmio,
158 };
159
160 int pci_host_data_register_io_memory(PCIHostState *s)
161 {
162 return cpu_register_io_memory(pci_host_data_read_mmio,
163 pci_host_data_write_mmio,
164 s);
165 }
166
167 #undef PCI_ADDR_T
168 #undef PCI_HOST_SUFFIX
169
170 #define PCI_ADDR_T uint32_t
171 #define PCI_HOST_SUFFIX _ioport
172
173 #include "pci_host_template.h"
174
175 void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s)
176 {
177 register_ioport_write(ioport, 4, 1, pci_host_data_writeb_ioport, s);
178 register_ioport_write(ioport, 4, 2, pci_host_data_writew_ioport, s);
179 register_ioport_write(ioport, 4, 4, pci_host_data_writel_ioport, s);
180 register_ioport_read(ioport, 4, 1, pci_host_data_readb_ioport, s);
181 register_ioport_read(ioport, 4, 2, pci_host_data_readw_ioport, s);
182 register_ioport_read(ioport, 4, 4, pci_host_data_readl_ioport, s);
183 }