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1 /*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan ml605
3 * board.
4 *
5 * Copyright (c) 2011 Michal Simek <monstr@monstr.eu>
6 * Copyright (c) 2011 PetaLogix
7 * Copyright (c) 2009 Edgar E. Iglesias.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
28 #include "sysbus.h"
29 #include "hw.h"
30 #include "net.h"
31 #include "flash.h"
32 #include "sysemu.h"
33 #include "devices.h"
34 #include "boards.h"
35 #include "xilinx.h"
36 #include "blockdev.h"
37 #include "pc.h"
38 #include "exec-memory.h"
39
40 #include "microblaze_boot.h"
41 #include "microblaze_pic_cpu.h"
42
43 #include "stream.h"
44
45 #define LMB_BRAM_SIZE (128 * 1024)
46 #define FLASH_SIZE (32 * 1024 * 1024)
47
48 #define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
49
50 #define MEMORY_BASEADDR 0x50000000
51 #define FLASH_BASEADDR 0x86000000
52 #define INTC_BASEADDR 0x81800000
53 #define TIMER_BASEADDR 0x83c00000
54 #define UART16550_BASEADDR 0x83e00000
55 #define AXIENET_BASEADDR 0x82780000
56 #define AXIDMA_BASEADDR 0x84600000
57
58 static void machine_cpu_reset(MicroBlazeCPU *cpu)
59 {
60 CPUMBState *env = &cpu->env;
61
62 env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
63 /* setup pvr to match kernel setting */
64 env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK;
65 env->pvr.regs[0] |= PVR0_USE_FPU_MASK | PVR0_ENDI;
66 env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8);
67 env->pvr.regs[2] ^= PVR2_USE_FPU2_MASK;
68 env->pvr.regs[4] = 0xc56b8000;
69 env->pvr.regs[5] = 0xc56be000;
70 }
71
72 static void
73 petalogix_ml605_init(ram_addr_t ram_size,
74 const char *boot_device,
75 const char *kernel_filename,
76 const char *kernel_cmdline,
77 const char *initrd_filename, const char *cpu_model)
78 {
79 MemoryRegion *address_space_mem = get_system_memory();
80 DeviceState *dev, *dma, *eth0;
81 MicroBlazeCPU *cpu;
82 CPUMBState *env;
83 DriveInfo *dinfo;
84 int i;
85 target_phys_addr_t ddr_base = MEMORY_BASEADDR;
86 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
87 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
88 qemu_irq irq[32], *cpu_irq;
89
90 /* init CPUs */
91 if (cpu_model == NULL) {
92 cpu_model = "microblaze";
93 }
94 cpu = cpu_mb_init(cpu_model);
95 env = &cpu->env;
96
97 /* Attach emulated BRAM through the LMB. */
98 memory_region_init_ram(phys_lmb_bram, "petalogix_ml605.lmb_bram",
99 LMB_BRAM_SIZE);
100 vmstate_register_ram_global(phys_lmb_bram);
101 memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
102
103 memory_region_init_ram(phys_ram, "petalogix_ml605.ram", ram_size);
104 vmstate_register_ram_global(phys_ram);
105 memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
106
107 dinfo = drive_get(IF_PFLASH, 0, 0);
108 /* 5th parameter 2 means bank-width
109 * 10th paremeter 0 means little-endian */
110 pflash_cfi01_register(FLASH_BASEADDR,
111 NULL, "petalogix_ml605.flash", FLASH_SIZE,
112 dinfo ? dinfo->bdrv : NULL, (64 * 1024),
113 FLASH_SIZE >> 16,
114 2, 0x89, 0x18, 0x0000, 0x0, 0);
115
116
117 cpu_irq = microblaze_pic_init_cpu(env);
118 dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 4);
119 for (i = 0; i < 32; i++) {
120 irq[i] = qdev_get_gpio_in(dev, i);
121 }
122
123 serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
124 irq[5], 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
125
126 /* 2 timers at irq 2 @ 100 Mhz. */
127 xilinx_timer_create(TIMER_BASEADDR, irq[2], 0, 100 * 1000000);
128
129 /* axi ethernet and dma initialization. */
130 dma = qdev_create(NULL, "xlnx.axi-dma");
131
132 /* FIXME: attach to the sysbus instead */
133 object_property_add_child(container_get(qdev_get_machine(), "/unattached"),
134 "xilinx-dma", OBJECT(dma), NULL);
135
136 eth0 = xilinx_axiethernet_create(&nd_table[0], STREAM_SLAVE(dma),
137 0x82780000, irq[3], 0x1000, 0x1000);
138
139 xilinx_axiethernetdma_init(dma, STREAM_SLAVE(eth0),
140 0x84600000, irq[1], irq[0], 100 * 1000000);
141
142 microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
143 machine_cpu_reset);
144
145 }
146
147 static QEMUMachine petalogix_ml605_machine = {
148 .name = "petalogix-ml605",
149 .desc = "PetaLogix linux refdesign for xilinx ml605 little endian",
150 .init = petalogix_ml605_init,
151 .is_default = 0
152 };
153
154 static void petalogix_ml605_machine_init(void)
155 {
156 qemu_register_machine(&petalogix_ml605_machine);
157 }
158
159 machine_init(petalogix_ml605_machine_init);