hw/ppc/mpc8544_guts.c

   1 /*
   2  * QEMU PowerPC MPC8544 global util pseudo-device
   3  *
   4  * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Alexander Graf, <alex@csgraf.de>
   7  *
   8  * This is free software; you can redistribute it and/or modify
   9  * it under the terms of  the GNU General  Public License as published by
  10  * the Free Software Foundation;  either version 2 of the  License, or
  11  * (at your option) any later version.
  12  *
  13  * *****************************************************************
  14  *
  15  * The documentation for this device is noted in the MPC8544 documentation,
  16  * file name "MPC8544ERM.pdf". You can easily find it on the web.
  17  *
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "hw/hw.h"
  22 #include "sysemu/sysemu.h"
  23 #include "hw/sysbus.h"
  24
  25 #define MPC8544_GUTS_MMIO_SIZE        0x1000
  26 #define MPC8544_GUTS_RSTCR_RESET      0x02
  27
  28 #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
  29 #define MPC8544_GUTS_ADDR_PORBMSR     0x04
  30 #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
  31 #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
  32 #define MPC8544_GUTS_ADDR_PORDBGMSR   0x10
  33 #define MPC8544_GUTS_ADDR_PORDEVSR2   0x14
  34 #define MPC8544_GUTS_ADDR_GPPORCR     0x20
  35 #define MPC8544_GUTS_ADDR_GPIOCR      0x30
  36 #define MPC8544_GUTS_ADDR_GPOUTDR     0x40
  37 #define MPC8544_GUTS_ADDR_GPINDR      0x50
  38 #define MPC8544_GUTS_ADDR_PMUXCR      0x60
  39 #define MPC8544_GUTS_ADDR_DEVDISR     0x70
  40 #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
  41 #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
  42 #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
  43 #define MPC8544_GUTS_ADDR_PVR         0xA0
  44 #define MPC8544_GUTS_ADDR_SVR         0xA4
  45 #define MPC8544_GUTS_ADDR_RSTCR       0xB0
  46 #define MPC8544_GUTS_ADDR_IOVSELSR    0xC0
  47 #define MPC8544_GUTS_ADDR_DDRCSR      0xB20
  48 #define MPC8544_GUTS_ADDR_DDRCDR      0xB24
  49 #define MPC8544_GUTS_ADDR_DDRCLKDR    0xB28
  50 #define MPC8544_GUTS_ADDR_CLKOCR      0xE00
  51 #define MPC8544_GUTS_ADDR_SRDS1CR1    0xF04
  52 #define MPC8544_GUTS_ADDR_SRDS2CR1    0xF10
  53 #define MPC8544_GUTS_ADDR_SRDS2CR3    0xF18
  54
  55 #define TYPE_MPC8544_GUTS "mpc8544-guts"
  56 #define MPC8544_GUTS(obj) OBJECT_CHECK(GutsState, (obj), TYPE_MPC8544_GUTS)
  57
  58 struct GutsState {
  59     /*< private >*/
  60     SysBusDevice parent_obj;
  61     /*< public >*/
  62
  63     MemoryRegion iomem;
  64 };
  65
  66 typedef struct GutsState GutsState;
  67
  68 static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
  69                                   unsigned size)
  70 {
  71     uint32_t value = 0;
  72     PowerPCCPU *cpu = POWERPC_CPU(current_cpu);
  73     CPUPPCState *env = &cpu->env;
  74
  75     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
  76     switch (addr) {
  77     case MPC8544_GUTS_ADDR_PVR:
  78         value = env->spr[SPR_PVR];
  79         break;
  80     case MPC8544_GUTS_ADDR_SVR:
  81         value = env->spr[SPR_E500_SVR];
  82         break;
  83     default:
  84         fprintf(stderr, "guts: Unknown register read: %x\n", (int)addr);
  85         break;
  86     }
  87
  88     return value;
  89 }
  90
  91 static void mpc8544_guts_write(void *opaque, hwaddr addr,
  92                                uint64_t value, unsigned size)
  93 {
  94     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
  95
  96     switch (addr) {
  97     case MPC8544_GUTS_ADDR_RSTCR:
  98         if (value & MPC8544_GUTS_RSTCR_RESET) {
  99             qemu_system_reset_request();
 100         }
 101         break;
 102     default:
 103         fprintf(stderr, "guts: Unknown register write: %x = %x\n",
 104                 (int)addr, (unsigned)value);
 105         break;
 106     }
 107 }
 108
 109 static const MemoryRegionOps mpc8544_guts_ops = {
 110     .read = mpc8544_guts_read,
 111     .write = mpc8544_guts_write,
 112     .endianness = DEVICE_BIG_ENDIAN,
 113     .valid = {
 114         .min_access_size = 4,
 115         .max_access_size = 4,
 116     },
 117 };
 118
 119 static void mpc8544_guts_initfn(Object *obj)
 120 {
 121     SysBusDevice *d = SYS_BUS_DEVICE(obj);
 122     GutsState *s = MPC8544_GUTS(obj);
 123
 124     memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s,
 125                           "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
 126     sysbus_init_mmio(d, &s->iomem);
 127 }
 128
 129 static const TypeInfo mpc8544_guts_info = {
 130     .name          = TYPE_MPC8544_GUTS,
 131     .parent        = TYPE_SYS_BUS_DEVICE,
 132     .instance_size = sizeof(GutsState),
 133     .instance_init = mpc8544_guts_initfn,
 134 };
 135
 136 static void mpc8544_guts_register_types(void)
 137 {
 138     type_register_static(&mpc8544_guts_info);
 139 }
 140
 141 type_init(mpc8544_guts_register_types)