hw/ppc/mpc8544_guts.c

   1 /*
   2  * QEMU PowerPC MPC8544 global util pseudo-device
   3  *
   4  * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Alexander Graf, <alex@csgraf.de>
   7  *
   8  * This is free software; you can redistribute it and/or modify
   9  * it under the terms of  the GNU General  Public License as published by
  10  * the Free Software Foundation;  either version 2 of the  License, or
  11  * (at your option) any later version.
  12  *
  13  * *****************************************************************
  14  *
  15  * The documentation for this device is noted in the MPC8544 documentation,
  16  * file name "MPC8544ERM.pdf". You can easily find it on the web.
  17  *
  18  */
  19
  20 #include "hw/hw.h"
  21 #include "sysemu/sysemu.h"
  22 #include "hw/sysbus.h"
  23
  24 #define MPC8544_GUTS_MMIO_SIZE        0x1000
  25 #define MPC8544_GUTS_RSTCR_RESET      0x02
  26
  27 #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
  28 #define MPC8544_GUTS_ADDR_PORBMSR     0x04
  29 #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
  30 #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
  31 #define MPC8544_GUTS_ADDR_PORDBGMSR   0x10
  32 #define MPC8544_GUTS_ADDR_PORDEVSR2   0x14
  33 #define MPC8544_GUTS_ADDR_GPPORCR     0x20
  34 #define MPC8544_GUTS_ADDR_GPIOCR      0x30
  35 #define MPC8544_GUTS_ADDR_GPOUTDR     0x40
  36 #define MPC8544_GUTS_ADDR_GPINDR      0x50
  37 #define MPC8544_GUTS_ADDR_PMUXCR      0x60
  38 #define MPC8544_GUTS_ADDR_DEVDISR     0x70
  39 #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
  40 #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
  41 #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
  42 #define MPC8544_GUTS_ADDR_PVR         0xA0
  43 #define MPC8544_GUTS_ADDR_SVR         0xA4
  44 #define MPC8544_GUTS_ADDR_RSTCR       0xB0
  45 #define MPC8544_GUTS_ADDR_IOVSELSR    0xC0
  46 #define MPC8544_GUTS_ADDR_DDRCSR      0xB20
  47 #define MPC8544_GUTS_ADDR_DDRCDR      0xB24
  48 #define MPC8544_GUTS_ADDR_DDRCLKDR    0xB28
  49 #define MPC8544_GUTS_ADDR_CLKOCR      0xE00
  50 #define MPC8544_GUTS_ADDR_SRDS1CR1    0xF04
  51 #define MPC8544_GUTS_ADDR_SRDS2CR1    0xF10
  52 #define MPC8544_GUTS_ADDR_SRDS2CR3    0xF18
  53
  54 #define TYPE_MPC8544_GUTS "mpc8544-guts"
  55 #define MPC8544_GUTS(obj) OBJECT_CHECK(GutsState, (obj), TYPE_MPC8544_GUTS)
  56
  57 struct GutsState {
  58     /*< private >*/
  59     SysBusDevice parent_obj;
  60     /*< public >*/
  61
  62     MemoryRegion iomem;
  63 };
  64
  65 typedef struct GutsState GutsState;
  66
  67 static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
  68                                   unsigned size)
  69 {
  70     uint32_t value = 0;
  71     CPUPPCState *env = cpu_single_env;
  72
  73     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
  74     switch (addr) {
  75     case MPC8544_GUTS_ADDR_PVR:
  76         value = env->spr[SPR_PVR];
  77         break;
  78     case MPC8544_GUTS_ADDR_SVR:
  79         value = env->spr[SPR_E500_SVR];
  80         break;
  81     default:
  82         fprintf(stderr, "guts: Unknown register read: %x\n", (int)addr);
  83         break;
  84     }
  85
  86     return value;
  87 }
  88
  89 static void mpc8544_guts_write(void *opaque, hwaddr addr,
  90                                uint64_t value, unsigned size)
  91 {
  92     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
  93
  94     switch (addr) {
  95     case MPC8544_GUTS_ADDR_RSTCR:
  96         if (value & MPC8544_GUTS_RSTCR_RESET) {
  97             qemu_system_reset_request();
  98         }
  99         break;
 100     default:
 101         fprintf(stderr, "guts: Unknown register write: %x = %x\n",
 102                 (int)addr, (unsigned)value);
 103         break;
 104     }
 105 }
 106
 107 static const MemoryRegionOps mpc8544_guts_ops = {
 108     .read = mpc8544_guts_read,
 109     .write = mpc8544_guts_write,
 110     .endianness = DEVICE_BIG_ENDIAN,
 111     .valid = {
 112         .min_access_size = 4,
 113         .max_access_size = 4,
 114     },
 115 };
 116
 117 static void mpc8544_guts_initfn(Object *obj)
 118 {
 119     SysBusDevice *d = SYS_BUS_DEVICE(obj);
 120     GutsState *s = MPC8544_GUTS(obj);
 121
 122     memory_region_init_io(&s->iomem, &mpc8544_guts_ops, s,
 123                           "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
 124     sysbus_init_mmio(d, &s->iomem);
 125 }
 126
 127 static const TypeInfo mpc8544_guts_info = {
 128     .name          = TYPE_MPC8544_GUTS,
 129     .parent        = TYPE_SYS_BUS_DEVICE,
 130     .instance_size = sizeof(GutsState),
 131     .instance_init = mpc8544_guts_initfn,
 132 };
 133
 134 static void mpc8544_guts_register_types(void)
 135 {
 136     type_register_static(&mpc8544_guts_info);
 137 }
 138
 139 type_init(mpc8544_guts_register_types)