2 * QEMU PowerPC 405 evaluation boards emulation
4 * Copyright (c) 2007 Jocelyn Mayer
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "hw/ppc/ppc.h"
27 #include "hw/timer/m48t59.h"
28 #include "hw/block/flash.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/qtest.h"
31 #include "sysemu/block-backend.h"
32 #include "hw/boards.h"
34 #include "qemu/error-report.h"
35 #include "hw/loader.h"
36 #include "sysemu/block-backend.h"
37 #include "sysemu/blockdev.h"
38 #include "exec/address-spaces.h"
40 #define BIOS_FILENAME "ppc405_rom.bin"
41 #define BIOS_SIZE (2048 * 1024)
43 #define KERNEL_LOAD_ADDR 0x00000000
44 #define INITRD_LOAD_ADDR 0x01800000
46 #define USE_FLASH_BIOS
48 //#define DEBUG_BOARD_INIT
50 /*****************************************************************************/
51 /* PPC405EP reference board (IBM) */
52 /* Standalone board with:
54 * - SDRAM (0x00000000)
55 * - Flash (0xFFF80000)
57 * - NVRAM (0xF0000000)
60 typedef struct ref405ep_fpga_t ref405ep_fpga_t
;
61 struct ref405ep_fpga_t
{
66 static uint32_t ref405ep_fpga_readb (void *opaque
, hwaddr addr
)
68 ref405ep_fpga_t
*fpga
;
87 static void ref405ep_fpga_writeb (void *opaque
,
88 hwaddr addr
, uint32_t value
)
90 ref405ep_fpga_t
*fpga
;
105 static uint32_t ref405ep_fpga_readw (void *opaque
, hwaddr addr
)
109 ret
= ref405ep_fpga_readb(opaque
, addr
) << 8;
110 ret
|= ref405ep_fpga_readb(opaque
, addr
+ 1);
115 static void ref405ep_fpga_writew (void *opaque
,
116 hwaddr addr
, uint32_t value
)
118 ref405ep_fpga_writeb(opaque
, addr
, (value
>> 8) & 0xFF);
119 ref405ep_fpga_writeb(opaque
, addr
+ 1, value
& 0xFF);
122 static uint32_t ref405ep_fpga_readl (void *opaque
, hwaddr addr
)
126 ret
= ref405ep_fpga_readb(opaque
, addr
) << 24;
127 ret
|= ref405ep_fpga_readb(opaque
, addr
+ 1) << 16;
128 ret
|= ref405ep_fpga_readb(opaque
, addr
+ 2) << 8;
129 ret
|= ref405ep_fpga_readb(opaque
, addr
+ 3);
134 static void ref405ep_fpga_writel (void *opaque
,
135 hwaddr addr
, uint32_t value
)
137 ref405ep_fpga_writeb(opaque
, addr
, (value
>> 24) & 0xFF);
138 ref405ep_fpga_writeb(opaque
, addr
+ 1, (value
>> 16) & 0xFF);
139 ref405ep_fpga_writeb(opaque
, addr
+ 2, (value
>> 8) & 0xFF);
140 ref405ep_fpga_writeb(opaque
, addr
+ 3, value
& 0xFF);
143 static const MemoryRegionOps ref405ep_fpga_ops
= {
146 ref405ep_fpga_readb
, ref405ep_fpga_readw
, ref405ep_fpga_readl
,
149 ref405ep_fpga_writeb
, ref405ep_fpga_writew
, ref405ep_fpga_writel
,
152 .endianness
= DEVICE_NATIVE_ENDIAN
,
155 static void ref405ep_fpga_reset (void *opaque
)
157 ref405ep_fpga_t
*fpga
;
164 static void ref405ep_fpga_init(MemoryRegion
*sysmem
, uint32_t base
)
166 ref405ep_fpga_t
*fpga
;
167 MemoryRegion
*fpga_memory
= g_new(MemoryRegion
, 1);
169 fpga
= g_malloc0(sizeof(ref405ep_fpga_t
));
170 memory_region_init_io(fpga_memory
, NULL
, &ref405ep_fpga_ops
, fpga
,
172 memory_region_add_subregion(sysmem
, base
, fpga_memory
);
173 qemu_register_reset(&ref405ep_fpga_reset
, fpga
);
176 static void ref405ep_init(MachineState
*machine
)
178 ram_addr_t ram_size
= machine
->ram_size
;
179 const char *kernel_filename
= machine
->kernel_filename
;
180 const char *kernel_cmdline
= machine
->kernel_cmdline
;
181 const char *initrd_filename
= machine
->initrd_filename
;
187 MemoryRegion
*sram
= g_new(MemoryRegion
, 1);
189 MemoryRegion
*ram_memories
= g_malloc(2 * sizeof(*ram_memories
));
190 hwaddr ram_bases
[2], ram_sizes
[2];
191 target_ulong sram_size
;
194 //static int phy_addr = 1;
195 target_ulong kernel_base
, initrd_base
;
196 long kernel_size
, initrd_size
;
198 int fl_idx
, fl_sectors
, len
;
200 MemoryRegion
*sysmem
= get_system_memory();
203 memory_region_allocate_system_memory(&ram_memories
[0], NULL
, "ef405ep.ram",
206 ram_sizes
[0] = 0x08000000;
207 memory_region_init(&ram_memories
[1], NULL
, "ef405ep.ram1", 0);
208 ram_bases
[1] = 0x00000000;
209 ram_sizes
[1] = 0x00000000;
210 ram_size
= 128 * 1024 * 1024;
211 #ifdef DEBUG_BOARD_INIT
212 printf("%s: register cpu\n", __func__
);
214 env
= ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
215 33333333, &pic
, kernel_filename
== NULL
? 0 : 1);
217 sram_size
= 512 * 1024;
218 memory_region_init_ram(sram
, NULL
, "ef405ep.sram", sram_size
,
220 vmstate_register_ram_global(sram
);
221 memory_region_add_subregion(sysmem
, 0xFFF00000, sram
);
222 /* allocate and load BIOS */
223 #ifdef DEBUG_BOARD_INIT
224 printf("%s: register BIOS\n", __func__
);
227 #ifdef USE_FLASH_BIOS
228 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
230 BlockBackend
*blk
= blk_by_legacy_dinfo(dinfo
);
232 bios_size
= blk_getlength(blk
);
233 fl_sectors
= (bios_size
+ 65535) >> 16;
234 #ifdef DEBUG_BOARD_INIT
235 printf("Register parallel flash %d size %lx"
236 " at addr %lx '%s' %d\n",
237 fl_idx
, bios_size
, -bios_size
,
238 blk_name(blk
), fl_sectors
);
240 pflash_cfi02_register((uint32_t)(-bios_size
),
241 NULL
, "ef405ep.bios", bios_size
,
242 blk
, 65536, fl_sectors
, 1,
243 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
249 #ifdef DEBUG_BOARD_INIT
250 printf("Load BIOS from file\n");
252 bios
= g_new(MemoryRegion
, 1);
253 memory_region_init_ram(bios
, NULL
, "ef405ep.bios", BIOS_SIZE
,
255 vmstate_register_ram_global(bios
);
257 if (bios_name
== NULL
)
258 bios_name
= BIOS_FILENAME
;
259 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
261 bios_size
= load_image(filename
, memory_region_get_ram_ptr(bios
));
263 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
264 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
267 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
268 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
269 } else if (!qtest_enabled() || kernel_filename
!= NULL
) {
270 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
273 /* Avoid an uninitialized variable warning */
276 memory_region_set_readonly(bios
, true);
279 #ifdef DEBUG_BOARD_INIT
280 printf("%s: register FPGA\n", __func__
);
282 ref405ep_fpga_init(sysmem
, 0xF0300000);
284 #ifdef DEBUG_BOARD_INIT
285 printf("%s: register NVRAM\n", __func__
);
287 m48t59_init(NULL
, 0xF0000000, 0, 8192, 1968, 8);
289 linux_boot
= (kernel_filename
!= NULL
);
291 #ifdef DEBUG_BOARD_INIT
292 printf("%s: load kernel\n", __func__
);
294 memset(&bd
, 0, sizeof(bd
));
295 bd
.bi_memstart
= 0x00000000;
296 bd
.bi_memsize
= ram_size
;
297 bd
.bi_flashstart
= -bios_size
;
298 bd
.bi_flashsize
= -bios_size
;
299 bd
.bi_flashoffset
= 0;
300 bd
.bi_sramstart
= 0xFFF00000;
301 bd
.bi_sramsize
= sram_size
;
303 bd
.bi_intfreq
= 133333333;
304 bd
.bi_busfreq
= 33333333;
305 bd
.bi_baudrate
= 115200;
306 bd
.bi_s_version
[0] = 'Q';
307 bd
.bi_s_version
[1] = 'M';
308 bd
.bi_s_version
[2] = 'U';
309 bd
.bi_s_version
[3] = '\0';
310 bd
.bi_r_version
[0] = 'Q';
311 bd
.bi_r_version
[1] = 'E';
312 bd
.bi_r_version
[2] = 'M';
313 bd
.bi_r_version
[3] = 'U';
314 bd
.bi_r_version
[4] = '\0';
315 bd
.bi_procfreq
= 133333333;
316 bd
.bi_plb_busfreq
= 33333333;
317 bd
.bi_pci_busfreq
= 33333333;
318 bd
.bi_opbfreq
= 33333333;
319 bdloc
= ppc405_set_bootinfo(env
, &bd
, 0x00000001);
321 kernel_base
= KERNEL_LOAD_ADDR
;
322 /* now we can load the kernel */
323 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
324 ram_size
- kernel_base
);
325 if (kernel_size
< 0) {
326 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
330 printf("Load kernel size %ld at " TARGET_FMT_lx
,
331 kernel_size
, kernel_base
);
333 if (initrd_filename
) {
334 initrd_base
= INITRD_LOAD_ADDR
;
335 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
336 ram_size
- initrd_base
);
337 if (initrd_size
< 0) {
338 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
346 env
->gpr
[4] = initrd_base
;
347 env
->gpr
[5] = initrd_size
;
348 if (kernel_cmdline
!= NULL
) {
349 len
= strlen(kernel_cmdline
);
350 bdloc
-= ((len
+ 255) & ~255);
351 cpu_physical_memory_write(bdloc
, kernel_cmdline
, len
+ 1);
353 env
->gpr
[7] = bdloc
+ len
;
358 env
->nip
= KERNEL_LOAD_ADDR
;
366 #ifdef DEBUG_BOARD_INIT
367 printf("bdloc " RAM_ADDR_FMT
"\n", bdloc
);
368 printf("%s: Done\n", __func__
);
372 static QEMUMachine ref405ep_machine
= {
375 .init
= ref405ep_init
,
378 /*****************************************************************************/
379 /* AMCC Taihu evaluation board */
380 /* - PowerPC 405EP processor
381 * - SDRAM 128 MB at 0x00000000
382 * - Boot flash 2 MB at 0xFFE00000
383 * - Application flash 32 MB at 0xFC000000
386 * - 1 USB 1.1 device 0x50000000
387 * - 1 LCD display 0x50100000
388 * - 1 CPLD 0x50100000
390 * - 1 I2C thermal sensor
392 * - bit-bang SPI port using GPIOs
393 * - 1 EBC interface connector 0 0x50200000
394 * - 1 cardbus controller + expansion slot.
395 * - 1 PCI expansion slot.
397 typedef struct taihu_cpld_t taihu_cpld_t
;
398 struct taihu_cpld_t
{
403 static uint32_t taihu_cpld_readb (void *opaque
, hwaddr addr
)
424 static void taihu_cpld_writeb (void *opaque
,
425 hwaddr addr
, uint32_t value
)
442 static uint32_t taihu_cpld_readw (void *opaque
, hwaddr addr
)
446 ret
= taihu_cpld_readb(opaque
, addr
) << 8;
447 ret
|= taihu_cpld_readb(opaque
, addr
+ 1);
452 static void taihu_cpld_writew (void *opaque
,
453 hwaddr addr
, uint32_t value
)
455 taihu_cpld_writeb(opaque
, addr
, (value
>> 8) & 0xFF);
456 taihu_cpld_writeb(opaque
, addr
+ 1, value
& 0xFF);
459 static uint32_t taihu_cpld_readl (void *opaque
, hwaddr addr
)
463 ret
= taihu_cpld_readb(opaque
, addr
) << 24;
464 ret
|= taihu_cpld_readb(opaque
, addr
+ 1) << 16;
465 ret
|= taihu_cpld_readb(opaque
, addr
+ 2) << 8;
466 ret
|= taihu_cpld_readb(opaque
, addr
+ 3);
471 static void taihu_cpld_writel (void *opaque
,
472 hwaddr addr
, uint32_t value
)
474 taihu_cpld_writel(opaque
, addr
, (value
>> 24) & 0xFF);
475 taihu_cpld_writel(opaque
, addr
+ 1, (value
>> 16) & 0xFF);
476 taihu_cpld_writel(opaque
, addr
+ 2, (value
>> 8) & 0xFF);
477 taihu_cpld_writeb(opaque
, addr
+ 3, value
& 0xFF);
480 static const MemoryRegionOps taihu_cpld_ops
= {
482 .read
= { taihu_cpld_readb
, taihu_cpld_readw
, taihu_cpld_readl
, },
483 .write
= { taihu_cpld_writeb
, taihu_cpld_writew
, taihu_cpld_writel
, },
485 .endianness
= DEVICE_NATIVE_ENDIAN
,
488 static void taihu_cpld_reset (void *opaque
)
497 static void taihu_cpld_init(MemoryRegion
*sysmem
, uint32_t base
)
500 MemoryRegion
*cpld_memory
= g_new(MemoryRegion
, 1);
502 cpld
= g_malloc0(sizeof(taihu_cpld_t
));
503 memory_region_init_io(cpld_memory
, NULL
, &taihu_cpld_ops
, cpld
, "cpld", 0x100);
504 memory_region_add_subregion(sysmem
, base
, cpld_memory
);
505 qemu_register_reset(&taihu_cpld_reset
, cpld
);
508 static void taihu_405ep_init(MachineState
*machine
)
510 ram_addr_t ram_size
= machine
->ram_size
;
511 const char *kernel_filename
= machine
->kernel_filename
;
512 const char *initrd_filename
= machine
->initrd_filename
;
515 MemoryRegion
*sysmem
= get_system_memory();
517 MemoryRegion
*ram_memories
= g_malloc(2 * sizeof(*ram_memories
));
518 MemoryRegion
*ram
= g_malloc0(sizeof(*ram
));
519 hwaddr ram_bases
[2], ram_sizes
[2];
521 target_ulong kernel_base
, initrd_base
;
522 long kernel_size
, initrd_size
;
524 int fl_idx
, fl_sectors
;
527 /* RAM is soldered to the board so the size cannot be changed */
528 ram_size
= 0x08000000;
529 memory_region_allocate_system_memory(ram
, NULL
, "taihu_405ep.ram",
533 ram_sizes
[0] = 0x04000000;
534 memory_region_init_alias(&ram_memories
[0], NULL
,
535 "taihu_405ep.ram-0", ram
, ram_bases
[0],
537 ram_bases
[1] = 0x04000000;
538 ram_sizes
[1] = 0x04000000;
539 memory_region_init_alias(&ram_memories
[1], NULL
,
540 "taihu_405ep.ram-1", ram
, ram_bases
[1],
542 #ifdef DEBUG_BOARD_INIT
543 printf("%s: register cpu\n", __func__
);
545 ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
546 33333333, &pic
, kernel_filename
== NULL
? 0 : 1);
547 /* allocate and load BIOS */
548 #ifdef DEBUG_BOARD_INIT
549 printf("%s: register BIOS\n", __func__
);
552 #if defined(USE_FLASH_BIOS)
553 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
555 BlockBackend
*blk
= blk_by_legacy_dinfo(dinfo
);
557 bios_size
= blk_getlength(blk
);
558 /* XXX: should check that size is 2MB */
559 // bios_size = 2 * 1024 * 1024;
560 fl_sectors
= (bios_size
+ 65535) >> 16;
561 #ifdef DEBUG_BOARD_INIT
562 printf("Register parallel flash %d size %lx"
563 " at addr %lx '%s' %d\n",
564 fl_idx
, bios_size
, -bios_size
,
565 blk_name(blk
), fl_sectors
);
567 pflash_cfi02_register((uint32_t)(-bios_size
),
568 NULL
, "taihu_405ep.bios", bios_size
,
569 blk
, 65536, fl_sectors
, 1,
570 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
576 #ifdef DEBUG_BOARD_INIT
577 printf("Load BIOS from file\n");
579 if (bios_name
== NULL
)
580 bios_name
= BIOS_FILENAME
;
581 bios
= g_new(MemoryRegion
, 1);
582 memory_region_init_ram(bios
, NULL
, "taihu_405ep.bios", BIOS_SIZE
,
584 vmstate_register_ram_global(bios
);
585 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
587 bios_size
= load_image(filename
, memory_region_get_ram_ptr(bios
));
589 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
590 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
593 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
594 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
595 } else if (!qtest_enabled()) {
596 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
599 memory_region_set_readonly(bios
, true);
601 /* Register Linux flash */
602 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
604 BlockBackend
*blk
= blk_by_legacy_dinfo(dinfo
);
606 bios_size
= blk_getlength(blk
);
607 /* XXX: should check that size is 32MB */
608 bios_size
= 32 * 1024 * 1024;
609 fl_sectors
= (bios_size
+ 65535) >> 16;
610 #ifdef DEBUG_BOARD_INIT
611 printf("Register parallel flash %d size %lx"
612 " at addr " TARGET_FMT_lx
" '%s'\n",
613 fl_idx
, bios_size
, (target_ulong
)0xfc000000,
616 pflash_cfi02_register(0xfc000000, NULL
, "taihu_405ep.flash", bios_size
,
617 blk
, 65536, fl_sectors
, 1,
618 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
622 /* Register CLPD & LCD display */
623 #ifdef DEBUG_BOARD_INIT
624 printf("%s: register CPLD\n", __func__
);
626 taihu_cpld_init(sysmem
, 0x50100000);
628 linux_boot
= (kernel_filename
!= NULL
);
630 #ifdef DEBUG_BOARD_INIT
631 printf("%s: load kernel\n", __func__
);
633 kernel_base
= KERNEL_LOAD_ADDR
;
634 /* now we can load the kernel */
635 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
636 ram_size
- kernel_base
);
637 if (kernel_size
< 0) {
638 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
643 if (initrd_filename
) {
644 initrd_base
= INITRD_LOAD_ADDR
;
645 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
646 ram_size
- initrd_base
);
647 if (initrd_size
< 0) {
649 "qemu: could not load initial ram disk '%s'\n",
663 #ifdef DEBUG_BOARD_INIT
664 printf("%s: Done\n", __func__
);
668 static QEMUMachine taihu_machine
= {
671 .init
= taihu_405ep_init
,
674 static void ppc405_machine_init(void)
676 qemu_register_machine(&ref405ep_machine
);
677 qemu_register_machine(&taihu_machine
);
680 machine_init(ppc405_machine_init
);