2 * QEMU aCube Sam460ex board emulation
4 * Copyright (c) 2012 François Revol
5 * Copyright (c) 2016-2018 BALATON Zoltan
7 * This file is derived from hw/ppc440_bamboo.c,
8 * the copyright for that material belongs to the original owners.
10 * This work is licensed under the GNU GPL license version 2 or later.
14 #include "qemu/osdep.h"
15 #include "qemu-common.h"
16 #include "qemu/cutils.h"
17 #include "qemu/error-report.h"
18 #include "qapi/error.h"
20 #include "sysemu/blockdev.h"
21 #include "hw/boards.h"
22 #include "sysemu/kvm.h"
24 #include "sysemu/device_tree.h"
25 #include "sysemu/block-backend.h"
26 #include "hw/loader.h"
28 #include "exec/address-spaces.h"
29 #include "exec/memory.h"
30 #include "hw/ppc/ppc440.h"
31 #include "hw/ppc/ppc405.h"
32 #include "hw/block/flash.h"
33 #include "sysemu/sysemu.h"
34 #include "sysemu/qtest.h"
35 #include "hw/sysbus.h"
36 #include "hw/char/serial.h"
37 #include "hw/i2c/ppc4xx_i2c.h"
38 #include "hw/i2c/smbus.h"
39 #include "hw/usb/hcd-ehci.h"
41 #define BINARY_DEVICE_TREE_FILE "canyonlands.dtb"
42 #define UBOOT_FILENAME "u-boot-sam460-20100605.bin"
43 /* to extract the official U-Boot bin from the updater: */
44 /* dd bs=1 skip=$(($(stat -c '%s' updater/updater-460) - 0x80000)) \
45 if=updater/updater-460 of=u-boot-sam460-20100605.bin */
47 /* from Sam460 U-Boot include/configs/Sam460ex.h */
48 #define FLASH_BASE 0xfff00000
49 #define FLASH_BASE_H 0x4
50 #define FLASH_SIZE (1 << 20)
51 #define UBOOT_LOAD_BASE 0xfff80000
52 #define UBOOT_SIZE 0x00080000
53 #define UBOOT_ENTRY 0xfffffffc
56 #define EPAPR_MAGIC (0x45504150)
57 #define KERNEL_ADDR 0x1000000
58 #define FDT_ADDR 0x1800000
59 #define RAMDISK_ADDR 0x1900000
64 IRQ2 = PCI_INT (PCIA, PCIB, PCIC, PCIB)
70 #define CPU_FREQ 1150000000
71 #define SDRAM_NR_BANKS 4
73 /* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */
74 static const unsigned int ppc460ex_sdram_bank_sizes
[] = {
75 1024 << 20, 512 << 20, 256 << 20, 128 << 20, 64 << 20, 32 << 20, 0
84 /*****************************************************************************/
85 /* SPD eeprom content from mips_malta.c */
87 struct _eeprom24c0x_t
{
95 uint8_t contents
[256];
98 typedef struct _eeprom24c0x_t eeprom24c0x_t
;
100 static eeprom24c0x_t spd_eeprom
= {
102 /* 00000000: */ 0x80, 0x08, 0xFF, 0x0D, 0x0A, 0xFF, 0x40, 0x00,
103 /* 00000008: */ 0x04, 0x75, 0x54, 0x00, 0x82, 0x08, 0x00, 0x01,
104 /* 00000010: */ 0x8F, 0x04, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00,
105 /* 00000018: */ 0x00, 0x00, 0x00, 0x14, 0x0F, 0x14, 0x2D, 0xFF,
106 /* 00000020: */ 0x15, 0x08, 0x15, 0x08, 0x00, 0x00, 0x00, 0x00,
107 /* 00000028: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
108 /* 00000030: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 /* 00000038: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0xD0,
110 /* 00000040: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
111 /* 00000048: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
112 /* 00000050: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
113 /* 00000058: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
114 /* 00000060: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
115 /* 00000068: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
116 /* 00000070: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
117 /* 00000078: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0xF4,
121 static void generate_eeprom_spd(uint8_t *eeprom
, ram_addr_t ram_size
)
123 enum { SDR
= 0x4, DDR1
= 0x7, DDR2
= 0x8 } type
;
124 uint8_t *spd
= spd_eeprom
.contents
;
126 uint16_t density
= 0;
129 /* work in terms of MB */
132 while ((ram_size
>= 4) && (nbanks
<= 2)) {
133 int sz_log2
= MIN(31 - clz32(ram_size
), 14);
135 density
|= 1 << (sz_log2
- 2);
136 ram_size
-= 1 << sz_log2
;
139 /* split to 2 banks if possible */
140 if ((nbanks
== 1) && (density
> 1)) {
145 if (density
& 0xff00) {
146 density
= (density
& 0xe0) | ((density
>> 8) & 0x1f);
148 } else if (!(density
& 0x1f)) {
155 warn_report("SPD cannot represent final " RAM_ADDR_FMT
"MB"
156 " of SDRAM", ram_size
);
159 /* fill in SPD memory information */
164 /* XXX: this is totally random */
165 spd
[9] = 0x10; /* CAS tcyc */
166 spd
[18] = 0x20; /* CAS bit */
167 spd
[23] = 0x10; /* CAS tcyc */
168 spd
[25] = 0x10; /* CAS tcyc */
172 for (i
= 0; i
< 63; i
++) {
177 memcpy(eeprom
, spd
, sizeof(spd_eeprom
.contents
));
180 static void generate_eeprom_serial(uint8_t *eeprom
)
183 uint8_t mac
[6] = { 0x00 };
184 uint8_t sn
[5] = { 0x01, 0x23, 0x45, 0x67, 0x89 };
187 eeprom
[pos
++] = 0x01;
190 eeprom
[pos
++] = 0x02;
193 eeprom
[pos
++] = 0x01; /* MAC */
194 eeprom
[pos
++] = 0x06; /* length */
195 memcpy(&eeprom
[pos
], mac
, sizeof(mac
));
199 eeprom
[pos
++] = 0x02; /* serial */
200 eeprom
[pos
++] = 0x05; /* length */
201 memcpy(&eeprom
[pos
], sn
, sizeof(sn
));
206 for (i
= 0; i
< pos
; i
++) {
207 eeprom
[pos
] += eeprom
[i
];
211 /*****************************************************************************/
213 static int sam460ex_load_uboot(void)
216 BlockBackend
*blk
= NULL
;
217 hwaddr base
= FLASH_BASE
| ((hwaddr
)FLASH_BASE_H
<< 32);
218 long bios_size
= FLASH_SIZE
;
221 dinfo
= drive_get(IF_PFLASH
, 0, 0);
223 blk
= blk_by_legacy_dinfo(dinfo
);
224 bios_size
= blk_getlength(blk
);
226 fl_sectors
= (bios_size
+ 65535) >> 16;
228 if (!pflash_cfi01_register(base
, NULL
, "sam460ex.flash", bios_size
,
229 blk
, (64 * 1024), fl_sectors
,
230 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
231 error_report("qemu: Error registering flash memory.");
232 /* XXX: return an error instead? */
237 /*error_report("No flash image given with the 'pflash' parameter,"
238 " using default u-boot image");*/
239 base
= UBOOT_LOAD_BASE
| ((hwaddr
)FLASH_BASE_H
<< 32);
240 rom_add_file_fixed(UBOOT_FILENAME
, base
, -1);
246 static int sam460ex_load_device_tree(hwaddr addr
,
250 const char *kernel_cmdline
)
253 uint32_t mem_reg_property
[] = { 0, 0, cpu_to_be32(ramsize
) };
257 uint32_t tb_freq
= CPU_FREQ
;
258 uint32_t clock_freq
= CPU_FREQ
;
260 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, BINARY_DEVICE_TREE_FILE
);
264 fdt
= load_device_tree(filename
, &fdt_size
);
270 /* Manipulate device tree in memory. */
272 ret
= qemu_fdt_setprop(fdt
, "/memory", "reg", mem_reg_property
,
273 sizeof(mem_reg_property
));
275 error_report("couldn't set /memory/reg");
278 /* default FDT doesn't have a /chosen node... */
279 qemu_fdt_add_subnode(fdt
, "/chosen");
281 ret
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
284 error_report("couldn't set /chosen/linux,initrd-start");
287 ret
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
288 (initrd_base
+ initrd_size
));
290 error_report("couldn't set /chosen/linux,initrd-end");
293 ret
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs",
296 error_report("couldn't set /chosen/bootargs");
299 /* Copy data from the host device tree into the guest. Since the guest can
300 * directly access the timebase without host involvement, we must expose
301 * the correct frequencies. */
303 tb_freq
= kvmppc_get_tbfreq();
304 clock_freq
= kvmppc_get_clockfreq();
307 qemu_fdt_setprop_cell(fdt
, "/cpus/cpu@0", "clock-frequency",
309 qemu_fdt_setprop_cell(fdt
, "/cpus/cpu@0", "timebase-frequency",
312 rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE
, fdt
, fdt_size
, addr
);
321 /* Create reset TLB entries for BookE, mapping only the flash memory. */
322 static void mmubooke_create_initial_mapping_uboot(CPUPPCState
*env
)
324 ppcemb_tlb_t
*tlb
= &env
->tlb
.tlbe
[0];
326 /* on reset the flash is mapped by a shadow TLB,
327 * but since we don't implement them we need to use
328 * the same values U-Boot will use to avoid a fault.
331 tlb
->prot
= PAGE_VALID
| ((PAGE_READ
| PAGE_WRITE
| PAGE_EXEC
) << 4);
332 tlb
->size
= 0x10000000; /* up to 0xffffffff */
333 tlb
->EPN
= 0xf0000000 & TARGET_PAGE_MASK
;
334 tlb
->RPN
= (0xf0000000 & TARGET_PAGE_MASK
) | 0x4;
338 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */
339 static void mmubooke_create_initial_mapping(CPUPPCState
*env
,
343 ppcemb_tlb_t
*tlb
= &env
->tlb
.tlbe
[0];
346 tlb
->prot
= PAGE_VALID
| ((PAGE_READ
| PAGE_WRITE
| PAGE_EXEC
) << 4);
347 tlb
->size
= 1 << 31; /* up to 0x80000000 */
348 tlb
->EPN
= va
& TARGET_PAGE_MASK
;
349 tlb
->RPN
= pa
& TARGET_PAGE_MASK
;
353 static void main_cpu_reset(void *opaque
)
355 PowerPCCPU
*cpu
= opaque
;
356 CPUPPCState
*env
= &cpu
->env
;
357 struct boot_info
*bi
= env
->load_info
;
361 /* either we have a kernel to boot or we jump to U-Boot */
362 if (bi
->entry
!= UBOOT_ENTRY
) {
363 env
->gpr
[1] = (16 << 20) - 8;
364 env
->gpr
[3] = FDT_ADDR
;
365 env
->nip
= bi
->entry
;
367 /* Create a mapping for the kernel. */
368 mmubooke_create_initial_mapping(env
, 0, 0);
369 env
->gpr
[6] = tswap32(EPAPR_MAGIC
);
370 env
->gpr
[7] = (16 << 20) - 8; /*bi->ima_size;*/
373 env
->nip
= UBOOT_ENTRY
;
374 mmubooke_create_initial_mapping_uboot(env
);
378 static void sam460ex_init(MachineState
*machine
)
380 MemoryRegion
*address_space_mem
= get_system_memory();
381 MemoryRegion
*isa
= g_new(MemoryRegion
, 1);
382 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, SDRAM_NR_BANKS
);
383 hwaddr ram_bases
[SDRAM_NR_BANKS
];
384 hwaddr ram_sizes
[SDRAM_NR_BANKS
];
385 MemoryRegion
*l2cache_ram
= g_new(MemoryRegion
, 1);
386 qemu_irq
*irqs
, *uic
[4];
390 PPC4xxI2CState
*i2c
[2];
391 hwaddr entry
= UBOOT_ENTRY
;
393 target_long initrd_size
= 0;
398 struct boot_info
*boot_info
;
399 const size_t smbus_eeprom_size
= 8 * 256;
400 uint8_t *smbus_eeprom_buf
= g_malloc0(smbus_eeprom_size
);
402 cpu
= POWERPC_CPU(cpu_create(machine
->cpu_type
));
404 if (env
->mmu_model
!= POWERPC_MMU_BOOKE
) {
405 error_report("Only MMU model BookE is supported by this machine.");
410 if (!qtest_enabled()) {
411 warn_report("qemu-system-ppcemb is deprecated, "
412 "please use qemu-system-ppc instead.");
416 qemu_register_reset(main_cpu_reset
, cpu
);
417 boot_info
= g_malloc0(sizeof(*boot_info
));
418 env
->load_info
= boot_info
;
420 ppc_booke_timers_init(cpu
, CPU_FREQ
, 0);
421 ppc_dcr_init(env
, NULL
, NULL
);
424 ppc4xx_plb_init(env
);
426 /* interrupt controllers */
427 irqs
= g_malloc0(sizeof(*irqs
) * PPCUIC_OUTPUT_NB
);
428 irqs
[PPCUIC_OUTPUT_INT
] = ((qemu_irq
*)env
->irq_inputs
)[PPC40x_INPUT_INT
];
429 irqs
[PPCUIC_OUTPUT_CINT
] = ((qemu_irq
*)env
->irq_inputs
)[PPC40x_INPUT_CINT
];
430 uic
[0] = ppcuic_init(env
, irqs
, 0xc0, 0, 1);
431 uic
[1] = ppcuic_init(env
, &uic
[0][30], 0xd0, 0, 1);
432 uic
[2] = ppcuic_init(env
, &uic
[0][10], 0xe0, 0, 1);
433 uic
[3] = ppcuic_init(env
, &uic
[0][16], 0xf0, 0, 1);
435 /* SDRAM controller */
436 memset(ram_bases
, 0, sizeof(ram_bases
));
437 memset(ram_sizes
, 0, sizeof(ram_sizes
));
438 /* put all RAM on first bank because board has one slot
439 * and firmware only checks that */
440 machine
->ram_size
= ppc4xx_sdram_adjust(machine
->ram_size
, 1,
441 ram_memories
, ram_bases
, ram_sizes
,
442 ppc460ex_sdram_bank_sizes
);
444 /* FIXME: does 460EX have ECC interrupts? */
445 ppc440_sdram_init(env
, SDRAM_NR_BANKS
, ram_memories
,
446 ram_bases
, ram_sizes
, 1);
448 /* generate SPD EEPROM data */
449 for (i
= 0; i
< SDRAM_NR_BANKS
; i
++) {
450 generate_eeprom_spd(&smbus_eeprom_buf
[i
* 256], ram_sizes
[i
]);
452 generate_eeprom_serial(&smbus_eeprom_buf
[4 * 256]);
453 generate_eeprom_serial(&smbus_eeprom_buf
[6 * 256]);
455 /* IIC controllers */
456 dev
= sysbus_create_simple(TYPE_PPC4xx_I2C
, 0x4ef600700, uic
[0][2]);
457 i2c
[0] = PPC4xx_I2C(dev
);
458 object_property_set_bool(OBJECT(dev
), true, "realized", NULL
);
459 smbus_eeprom_init(i2c
[0]->bus
, 8, smbus_eeprom_buf
, smbus_eeprom_size
);
460 g_free(smbus_eeprom_buf
);
462 dev
= sysbus_create_simple(TYPE_PPC4xx_I2C
, 0x4ef600800, uic
[0][3]);
463 i2c
[1] = PPC4xx_I2C(dev
);
465 /* External bus controller */
466 ppc405_ebc_init(env
);
469 ppc4xx_cpr_init(env
);
471 /* PLB to AHB bridge */
472 ppc4xx_ahb_init(env
);
475 ppc4xx_sdr_init(env
);
478 ppc4xx_mal_init(env
, 4, 16, &uic
[2][3]);
480 /* 256K of L2 cache as memory */
481 ppc4xx_l2sram_init(env
);
482 /* FIXME: remove this after fixing l2sram mapping in ppc440_uc.c? */
483 memory_region_init_ram(l2cache_ram
, NULL
, "ppc440.l2cache_ram", 256 << 10,
485 memory_region_add_subregion(address_space_mem
, 0x400000000LL
, l2cache_ram
);
488 sysbus_create_simple(TYPE_PPC4xx_EHCI
, 0x4bffd0400, uic
[2][29]);
489 dev
= qdev_create(NULL
, "sysbus-ohci");
490 qdev_prop_set_string(dev
, "masterbus", "usb-bus.0");
491 qdev_prop_set_uint32(dev
, "num-ports", 6);
492 qdev_init_nofail(dev
);
493 sbdev
= SYS_BUS_DEVICE(dev
);
494 sysbus_mmio_map(sbdev
, 0, 0x4bffd0000);
495 sysbus_connect_irq(sbdev
, 0, uic
[2][30]);
496 usb_create_simple(usb_bus_find(-1), "usb-kbd");
497 usb_create_simple(usb_bus_find(-1), "usb-mouse");
500 ppc460ex_pcie_init(env
);
501 /* FIXME: is this correct? */
502 dev
= sysbus_create_varargs("ppc440-pcix-host", 0xc0ec00000,
503 uic
[1][0], uic
[1][20], uic
[1][21], uic
[1][22],
505 pci_bus
= (PCIBus
*)qdev_get_child_bus(dev
, "pci.0");
507 error_report("couldn't create PCI controller!");
510 memory_region_init_alias(isa
, NULL
, "isa_mmio", get_system_io(),
512 memory_region_add_subregion(get_system_memory(), 0xc08000000, isa
);
515 pci_create_simple(pci_bus
, PCI_DEVFN(6, 0), "sm501");
516 /* SoC has a single SATA port but we don't emulate that yet
517 * However, firmware and usual clients have driver for SiI311x
518 * so add one for convenience by default */
519 if (defaults_enabled()) {
520 pci_create_simple(pci_bus
, -1, "sii3112");
524 * but board has only one wired and two are present in fdt */
525 if (serial_hds
[0] != NULL
) {
526 serial_mm_init(address_space_mem
, 0x4ef600300, 0, uic
[1][1],
527 PPC_SERIAL_MM_BAUDBASE
, serial_hds
[0],
530 if (serial_hds
[1] != NULL
) {
531 serial_mm_init(address_space_mem
, 0x4ef600400, 0, uic
[0][1],
532 PPC_SERIAL_MM_BAUDBASE
, serial_hds
[1],
536 /* Load U-Boot image. */
537 if (!machine
->kernel_filename
) {
538 success
= sam460ex_load_uboot();
540 error_report("qemu: could not load firmware");
546 if (machine
->kernel_filename
) {
547 success
= load_uimage(machine
->kernel_filename
, &entry
, &loadaddr
,
550 uint64_t elf_entry
, elf_lowaddr
;
552 success
= load_elf(machine
->kernel_filename
, NULL
, NULL
, &elf_entry
,
553 &elf_lowaddr
, NULL
, 1, PPC_ELF_MACHINE
, 0, 0);
555 loadaddr
= elf_lowaddr
;
557 /* XXX try again as binary */
559 error_report("qemu: could not load kernel '%s'",
560 machine
->kernel_filename
);
566 if (machine
->initrd_filename
) {
567 initrd_size
= load_image_targphys(machine
->initrd_filename
,
569 machine
->ram_size
- RAMDISK_ADDR
);
570 if (initrd_size
< 0) {
571 error_report("qemu: could not load ram disk '%s' at %x",
572 machine
->initrd_filename
, RAMDISK_ADDR
);
577 /* If we're loading a kernel directly, we must load the device tree too. */
578 if (machine
->kernel_filename
) {
581 dt_size
= sam460ex_load_device_tree(FDT_ADDR
, machine
->ram_size
,
582 RAMDISK_ADDR
, initrd_size
,
583 machine
->kernel_cmdline
);
585 error_report("couldn't load device tree");
589 boot_info
->dt_base
= FDT_ADDR
;
590 boot_info
->dt_size
= dt_size
;
593 boot_info
->entry
= entry
;
596 static void sam460ex_machine_init(MachineClass
*mc
)
598 mc
->desc
= "aCube Sam460ex";
599 mc
->init
= sam460ex_init
;
600 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("460exb");
601 mc
->default_ram_size
= 512 * M_BYTE
;
604 DEFINE_MACHINE("sam460ex", sam460ex_machine_init
)