2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "qapi/visitor.h"
30 #include "sysemu/sysemu.h"
31 #include "sysemu/numa.h"
34 #include "hw/fw-path-provider.h"
37 #include "sysemu/device_tree.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/cpus.h"
40 #include "sysemu/hw_accel.h"
42 #include "migration/misc.h"
43 #include "migration/global_state.h"
44 #include "migration/register.h"
45 #include "mmu-hash64.h"
46 #include "mmu-book3s-v3.h"
47 #include "cpu-models.h"
50 #include "hw/boards.h"
51 #include "hw/ppc/ppc.h"
52 #include "hw/loader.h"
54 #include "hw/ppc/fdt.h"
55 #include "hw/ppc/spapr.h"
56 #include "hw/ppc/spapr_vio.h"
57 #include "hw/pci-host/spapr.h"
58 #include "hw/ppc/xics.h"
59 #include "hw/pci/msi.h"
61 #include "hw/pci/pci.h"
62 #include "hw/scsi/scsi.h"
63 #include "hw/virtio/virtio-scsi.h"
64 #include "hw/virtio/vhost-scsi-common.h"
66 #include "exec/address-spaces.h"
68 #include "qemu/config-file.h"
69 #include "qemu/error-report.h"
72 #include "hw/intc/intc.h"
74 #include "hw/compat.h"
75 #include "qemu/cutils.h"
76 #include "hw/ppc/spapr_cpu_core.h"
77 #include "qmp-commands.h"
81 /* SLOF memory layout:
83 * SLOF raw image loaded at 0, copies its romfs right below the flat
84 * device-tree, then position SLOF itself 31M below that
86 * So we set FW_OVERHEAD to 40MB which should account for all of that
89 * We load our kernel at 4M, leaving space for SLOF initial image
91 #define FDT_MAX_SIZE 0x100000
92 #define RTAS_MAX_SIZE 0x10000
93 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
94 #define FW_MAX_SIZE 0x400000
95 #define FW_FILE_NAME "slof.bin"
96 #define FW_OVERHEAD 0x2800000
97 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
99 #define MIN_RMA_SLOF 128UL
101 #define PHANDLE_XICP 0x00001111
103 static ICSState
*spapr_ics_create(sPAPRMachineState
*spapr
,
104 const char *type_ics
,
105 int nr_irqs
, Error
**errp
)
107 Error
*local_err
= NULL
;
110 obj
= object_new(type_ics
);
111 object_property_add_child(OBJECT(spapr
), "ics", obj
, &error_abort
);
112 object_property_add_const_link(obj
, ICS_PROP_XICS
, OBJECT(spapr
),
114 object_property_set_int(obj
, nr_irqs
, "nr-irqs", &local_err
);
118 object_property_set_bool(obj
, true, "realized", &local_err
);
123 return ICS_SIMPLE(obj
);
126 error_propagate(errp
, local_err
);
130 static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque
)
132 /* Dummy entries correspond to unused ICPState objects in older QEMUs,
133 * and newer QEMUs don't even have them. In both cases, we don't want
134 * to send anything on the wire.
139 static const VMStateDescription pre_2_10_vmstate_dummy_icp
= {
140 .name
= "icp/server",
142 .minimum_version_id
= 1,
143 .needed
= pre_2_10_vmstate_dummy_icp_needed
,
144 .fields
= (VMStateField
[]) {
145 VMSTATE_UNUSED(4), /* uint32_t xirr */
146 VMSTATE_UNUSED(1), /* uint8_t pending_priority */
147 VMSTATE_UNUSED(1), /* uint8_t mfrr */
148 VMSTATE_END_OF_LIST()
152 static void pre_2_10_vmstate_register_dummy_icp(int i
)
154 vmstate_register(NULL
, i
, &pre_2_10_vmstate_dummy_icp
,
155 (void *)(uintptr_t) i
);
158 static void pre_2_10_vmstate_unregister_dummy_icp(int i
)
160 vmstate_unregister(NULL
, &pre_2_10_vmstate_dummy_icp
,
161 (void *)(uintptr_t) i
);
164 static inline int xics_max_server_number(void)
166 return DIV_ROUND_UP(max_cpus
* kvmppc_smt_threads(), smp_threads
);
169 static void xics_system_init(MachineState
*machine
, int nr_irqs
, Error
**errp
)
171 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
172 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
175 if (machine_kernel_irqchip_allowed(machine
) &&
176 !xics_kvm_init(spapr
, errp
)) {
177 spapr
->icp_type
= TYPE_KVM_ICP
;
178 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_KVM
, nr_irqs
, errp
);
180 if (machine_kernel_irqchip_required(machine
) && !spapr
->ics
) {
181 error_prepend(errp
, "kernel_irqchip requested but unavailable: ");
187 xics_spapr_init(spapr
);
188 spapr
->icp_type
= TYPE_ICP
;
189 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_SIMPLE
, nr_irqs
, errp
);
195 if (smc
->pre_2_10_has_unused_icps
) {
198 for (i
= 0; i
< xics_max_server_number(); i
++) {
199 /* Dummy entries get deregistered when real ICPState objects
200 * are registered during CPU core hotplug.
202 pre_2_10_vmstate_register_dummy_icp(i
);
207 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
211 uint32_t servers_prop
[smt_threads
];
212 uint32_t gservers_prop
[smt_threads
* 2];
213 int index
= spapr_vcpu_id(cpu
);
215 if (cpu
->compat_pvr
) {
216 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->compat_pvr
);
222 /* Build interrupt servers and gservers properties */
223 for (i
= 0; i
< smt_threads
; i
++) {
224 servers_prop
[i
] = cpu_to_be32(index
+ i
);
225 /* Hack, direct the group queues back to cpu 0 */
226 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
227 gservers_prop
[i
*2 + 1] = 0;
229 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
230 servers_prop
, sizeof(servers_prop
));
234 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
235 gservers_prop
, sizeof(gservers_prop
));
240 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
)
242 int index
= spapr_vcpu_id(cpu
);
243 uint32_t associativity
[] = {cpu_to_be32(0x5),
247 cpu_to_be32(cpu
->node_id
),
250 /* Advertise NUMA via ibm,associativity */
251 return fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
252 sizeof(associativity
));
255 /* Populate the "ibm,pa-features" property */
256 static void spapr_populate_pa_features(sPAPRMachineState
*spapr
,
258 void *fdt
, int offset
,
261 CPUPPCState
*env
= &cpu
->env
;
262 uint8_t pa_features_206
[] = { 6, 0,
263 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
264 uint8_t pa_features_207
[] = { 24, 0,
265 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
266 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
267 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
268 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
269 uint8_t pa_features_300
[] = { 66, 0,
270 /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
271 /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
272 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
274 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
276 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
277 /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
278 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
279 /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
280 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
281 /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
282 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
283 /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
284 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
285 /* 42: PM, 44: PC RA, 46: SC vec'd */
286 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
287 /* 48: SIMD, 50: QP BFP, 52: String */
288 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
289 /* 54: DecFP, 56: DecI, 58: SHA */
290 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
291 /* 60: NM atomic, 62: RNG */
292 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
294 uint8_t *pa_features
= NULL
;
297 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_06
, 0, cpu
->compat_pvr
)) {
298 pa_features
= pa_features_206
;
299 pa_size
= sizeof(pa_features_206
);
301 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_07
, 0, cpu
->compat_pvr
)) {
302 pa_features
= pa_features_207
;
303 pa_size
= sizeof(pa_features_207
);
305 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_3_00
, 0, cpu
->compat_pvr
)) {
306 pa_features
= pa_features_300
;
307 pa_size
= sizeof(pa_features_300
);
313 if (env
->ci_large_pages
) {
315 * Note: we keep CI large pages off by default because a 64K capable
316 * guest provisioned with large pages might otherwise try to map a qemu
317 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
318 * even if that qemu runs on a 4k host.
319 * We dd this bit back here if we are confident this is not an issue
321 pa_features
[3] |= 0x20;
323 if ((spapr_get_cap(spapr
, SPAPR_CAP_HTM
) != 0) && pa_size
> 24) {
324 pa_features
[24] |= 0x80; /* Transactional memory support */
326 if (legacy_guest
&& pa_size
> 40) {
327 /* Workaround for broken kernels that attempt (guest) radix
328 * mode when they can't handle it, if they see the radix bit set
329 * in pa-features. So hide it from them. */
330 pa_features
[40 + 2] &= ~0x80; /* Radix MMU */
333 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
336 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
338 int ret
= 0, offset
, cpus_offset
;
341 int smt
= kvmppc_smt_threads();
342 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
345 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
346 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
347 int index
= spapr_vcpu_id(cpu
);
348 int compat_smt
= MIN(smp_threads
, ppc_compat_max_threads(cpu
));
350 if ((index
% smt
) != 0) {
354 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
356 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
357 if (cpus_offset
< 0) {
358 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
359 if (cpus_offset
< 0) {
363 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
365 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
371 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
372 pft_size_prop
, sizeof(pft_size_prop
));
377 if (nb_numa_nodes
> 1) {
378 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
);
384 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
);
389 spapr_populate_pa_features(spapr
, cpu
, fdt
, offset
,
390 spapr
->cas_legacy_guest_workaround
);
395 static hwaddr
spapr_node0_size(MachineState
*machine
)
399 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
400 if (numa_info
[i
].node_mem
) {
401 return MIN(pow2floor(numa_info
[i
].node_mem
),
406 return machine
->ram_size
;
409 static void add_str(GString
*s
, const gchar
*s1
)
411 g_string_append_len(s
, s1
, strlen(s1
) + 1);
414 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
417 uint32_t associativity
[] = {
418 cpu_to_be32(0x4), /* length */
419 cpu_to_be32(0x0), cpu_to_be32(0x0),
420 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
423 uint64_t mem_reg_property
[2];
426 mem_reg_property
[0] = cpu_to_be64(start
);
427 mem_reg_property
[1] = cpu_to_be64(size
);
429 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
430 off
= fdt_add_subnode(fdt
, 0, mem_name
);
432 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
433 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
434 sizeof(mem_reg_property
))));
435 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
436 sizeof(associativity
))));
440 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
442 MachineState
*machine
= MACHINE(spapr
);
443 hwaddr mem_start
, node_size
;
444 int i
, nb_nodes
= nb_numa_nodes
;
445 NodeInfo
*nodes
= numa_info
;
448 /* No NUMA nodes, assume there is just one node with whole RAM */
449 if (!nb_numa_nodes
) {
451 ramnode
.node_mem
= machine
->ram_size
;
455 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
456 if (!nodes
[i
].node_mem
) {
459 if (mem_start
>= machine
->ram_size
) {
462 node_size
= nodes
[i
].node_mem
;
463 if (node_size
> machine
->ram_size
- mem_start
) {
464 node_size
= machine
->ram_size
- mem_start
;
468 /* ppc_spapr_init() checks for rma_size <= node0_size already */
469 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
470 mem_start
+= spapr
->rma_size
;
471 node_size
-= spapr
->rma_size
;
473 for ( ; node_size
; ) {
474 hwaddr sizetmp
= pow2floor(node_size
);
476 /* mem_start != 0 here */
477 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
478 sizetmp
= 1ULL << ctzl(mem_start
);
481 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
482 node_size
-= sizetmp
;
483 mem_start
+= sizetmp
;
490 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
491 sPAPRMachineState
*spapr
)
493 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
494 CPUPPCState
*env
= &cpu
->env
;
495 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
496 int index
= spapr_vcpu_id(cpu
);
497 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
498 0xffffffff, 0xffffffff};
499 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
500 : SPAPR_TIMEBASE_FREQ
;
501 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
502 uint32_t page_sizes_prop
[64];
503 size_t page_sizes_prop_size
;
504 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
505 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
506 int compat_smt
= MIN(smp_threads
, ppc_compat_max_threads(cpu
));
507 sPAPRDRConnector
*drc
;
509 uint32_t radix_AP_encodings
[PPC_PAGE_SIZES_MAX_SZ
];
512 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
);
514 drc_index
= spapr_drc_index(drc
);
515 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
518 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
519 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
521 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
522 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
523 env
->dcache_line_size
)));
524 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
525 env
->dcache_line_size
)));
526 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
527 env
->icache_line_size
)));
528 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
529 env
->icache_line_size
)));
531 if (pcc
->l1_dcache_size
) {
532 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
533 pcc
->l1_dcache_size
)));
535 warn_report("Unknown L1 dcache size for cpu");
537 if (pcc
->l1_icache_size
) {
538 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
539 pcc
->l1_icache_size
)));
541 warn_report("Unknown L1 icache size for cpu");
544 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
545 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
546 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
547 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
548 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
549 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
551 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
552 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
555 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
556 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
557 segs
, sizeof(segs
))));
560 /* Advertise VSX (vector extensions) if available
561 * 1 == VMX / Altivec available
564 * Only CPUs for which we create core types in spapr_cpu_core.c
565 * are possible, and all of those have VMX */
566 if (spapr_get_cap(spapr
, SPAPR_CAP_VSX
) != 0) {
567 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", 2)));
569 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", 1)));
572 /* Advertise DFP (Decimal Floating Point) if available
573 * 0 / no property == no DFP
574 * 1 == DFP available */
575 if (spapr_get_cap(spapr
, SPAPR_CAP_DFP
) != 0) {
576 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
579 page_sizes_prop_size
= ppc_create_page_sizes_prop(env
, page_sizes_prop
,
580 sizeof(page_sizes_prop
));
581 if (page_sizes_prop_size
) {
582 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
583 page_sizes_prop
, page_sizes_prop_size
)));
586 spapr_populate_pa_features(spapr
, cpu
, fdt
, offset
, false);
588 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
589 cs
->cpu_index
/ vcpus_per_socket
)));
591 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
592 pft_size_prop
, sizeof(pft_size_prop
))));
594 if (nb_numa_nodes
> 1) {
595 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
));
598 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
));
600 if (pcc
->radix_page_info
) {
601 for (i
= 0; i
< pcc
->radix_page_info
->count
; i
++) {
602 radix_AP_encodings
[i
] =
603 cpu_to_be32(pcc
->radix_page_info
->entries
[i
]);
605 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-radix-AP-encodings",
607 pcc
->radix_page_info
->count
*
608 sizeof(radix_AP_encodings
[0]))));
612 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
617 int smt
= kvmppc_smt_threads();
619 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
621 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
622 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
625 * We walk the CPUs in reverse order to ensure that CPU DT nodes
626 * created by fdt_add_subnode() end up in the right order in FDT
627 * for the guest kernel the enumerate the CPUs correctly.
629 CPU_FOREACH_REVERSE(cs
) {
630 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
631 int index
= spapr_vcpu_id(cpu
);
632 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
635 if ((index
% smt
) != 0) {
639 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
640 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
643 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
649 * Adds ibm,dynamic-reconfiguration-memory node.
650 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
651 * of this device tree node.
653 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
655 MachineState
*machine
= MACHINE(spapr
);
657 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
658 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
659 uint32_t hotplug_lmb_start
= spapr
->hotplug_memory
.base
/ lmb_size
;
660 uint32_t nr_lmbs
= (spapr
->hotplug_memory
.base
+
661 memory_region_size(&spapr
->hotplug_memory
.mr
)) /
663 uint32_t *int_buf
, *cur_index
, buf_len
;
664 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
667 * Don't create the node if there is no hotpluggable memory
669 if (machine
->ram_size
== machine
->maxram_size
) {
674 * Allocate enough buffer size to fit in ibm,dynamic-memory
675 * or ibm,associativity-lookup-arrays
677 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
679 cur_index
= int_buf
= g_malloc0(buf_len
);
681 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
683 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
684 sizeof(prop_lmb_size
));
689 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
694 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
699 /* ibm,dynamic-memory */
700 int_buf
[0] = cpu_to_be32(nr_lmbs
);
702 for (i
= 0; i
< nr_lmbs
; i
++) {
703 uint64_t addr
= i
* lmb_size
;
704 uint32_t *dynamic_memory
= cur_index
;
706 if (i
>= hotplug_lmb_start
) {
707 sPAPRDRConnector
*drc
;
709 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, i
);
712 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
713 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
714 dynamic_memory
[2] = cpu_to_be32(spapr_drc_index(drc
));
715 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
716 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
717 if (memory_region_present(get_system_memory(), addr
)) {
718 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
720 dynamic_memory
[5] = cpu_to_be32(0);
724 * LMB information for RMA, boot time RAM and gap b/n RAM and
725 * hotplug memory region -- all these are marked as reserved
726 * and as having no valid DRC.
728 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
729 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
730 dynamic_memory
[2] = cpu_to_be32(0);
731 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
732 dynamic_memory
[4] = cpu_to_be32(-1);
733 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
734 SPAPR_LMB_FLAGS_DRC_INVALID
);
737 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
739 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
744 /* ibm,associativity-lookup-arrays */
746 int_buf
[0] = cpu_to_be32(nr_nodes
);
747 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
749 for (i
= 0; i
< nr_nodes
; i
++) {
750 uint32_t associativity
[] = {
756 memcpy(cur_index
, associativity
, sizeof(associativity
));
759 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
760 (cur_index
- int_buf
) * sizeof(uint32_t));
766 static int spapr_dt_cas_updates(sPAPRMachineState
*spapr
, void *fdt
,
767 sPAPROptionVector
*ov5_updates
)
769 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(spapr
);
772 /* Generate ibm,dynamic-reconfiguration-memory node if required */
773 if (spapr_ovec_test(ov5_updates
, OV5_DRCONF_MEMORY
)) {
774 g_assert(smc
->dr_lmb_enabled
);
775 ret
= spapr_populate_drconf_memory(spapr
, fdt
);
781 offset
= fdt_path_offset(fdt
, "/chosen");
783 offset
= fdt_add_subnode(fdt
, 0, "chosen");
788 ret
= spapr_ovec_populate_dt(fdt
, offset
, spapr
->ov5_cas
,
789 "ibm,architecture-vec-5");
795 static bool spapr_hotplugged_dev_before_cas(void)
797 Object
*drc_container
, *obj
;
798 ObjectProperty
*prop
;
799 ObjectPropertyIterator iter
;
801 drc_container
= container_get(object_get_root(), "/dr-connector");
802 object_property_iter_init(&iter
, drc_container
);
803 while ((prop
= object_property_iter_next(&iter
))) {
804 if (!strstart(prop
->type
, "link<", NULL
)) {
807 obj
= object_property_get_link(drc_container
, prop
->name
, NULL
);
808 if (spapr_drc_needed(obj
)) {
815 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
816 target_ulong addr
, target_ulong size
,
817 sPAPROptionVector
*ov5_updates
)
819 void *fdt
, *fdt_skel
;
820 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
822 if (spapr_hotplugged_dev_before_cas()) {
826 if (size
< sizeof(hdr
) || size
> FW_MAX_SIZE
) {
827 error_report("SLOF provided an unexpected CAS buffer size "
828 TARGET_FMT_lu
" (min: %zu, max: %u)",
829 size
, sizeof(hdr
), FW_MAX_SIZE
);
835 /* Create skeleton */
836 fdt_skel
= g_malloc0(size
);
837 _FDT((fdt_create(fdt_skel
, size
)));
838 _FDT((fdt_begin_node(fdt_skel
, "")));
839 _FDT((fdt_end_node(fdt_skel
)));
840 _FDT((fdt_finish(fdt_skel
)));
841 fdt
= g_malloc0(size
);
842 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
845 /* Fixup cpu nodes */
846 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
848 if (spapr_dt_cas_updates(spapr
, fdt
, ov5_updates
)) {
852 /* Pack resulting tree */
853 _FDT((fdt_pack(fdt
)));
855 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
856 trace_spapr_cas_failed(size
);
860 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
861 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
862 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
868 static void spapr_dt_rtas(sPAPRMachineState
*spapr
, void *fdt
)
871 GString
*hypertas
= g_string_sized_new(256);
872 GString
*qemu_hypertas
= g_string_sized_new(256);
873 uint32_t refpoints
[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
874 uint64_t max_hotplug_addr
= spapr
->hotplug_memory
.base
+
875 memory_region_size(&spapr
->hotplug_memory
.mr
);
876 uint32_t lrdr_capacity
[] = {
877 cpu_to_be32(max_hotplug_addr
>> 32),
878 cpu_to_be32(max_hotplug_addr
& 0xffffffff),
879 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE
),
880 cpu_to_be32(max_cpus
/ smp_threads
),
883 _FDT(rtas
= fdt_add_subnode(fdt
, 0, "rtas"));
886 add_str(hypertas
, "hcall-pft");
887 add_str(hypertas
, "hcall-term");
888 add_str(hypertas
, "hcall-dabr");
889 add_str(hypertas
, "hcall-interrupt");
890 add_str(hypertas
, "hcall-tce");
891 add_str(hypertas
, "hcall-vio");
892 add_str(hypertas
, "hcall-splpar");
893 add_str(hypertas
, "hcall-bulk");
894 add_str(hypertas
, "hcall-set-mode");
895 add_str(hypertas
, "hcall-sprg0");
896 add_str(hypertas
, "hcall-copy");
897 add_str(hypertas
, "hcall-debug");
898 add_str(qemu_hypertas
, "hcall-memop1");
900 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
901 add_str(hypertas
, "hcall-multi-tce");
904 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
905 add_str(hypertas
, "hcall-hpt-resize");
908 _FDT(fdt_setprop(fdt
, rtas
, "ibm,hypertas-functions",
909 hypertas
->str
, hypertas
->len
));
910 g_string_free(hypertas
, TRUE
);
911 _FDT(fdt_setprop(fdt
, rtas
, "qemu,hypertas-functions",
912 qemu_hypertas
->str
, qemu_hypertas
->len
));
913 g_string_free(qemu_hypertas
, TRUE
);
915 _FDT(fdt_setprop(fdt
, rtas
, "ibm,associativity-reference-points",
916 refpoints
, sizeof(refpoints
)));
918 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-error-log-max",
919 RTAS_ERROR_LOG_MAX
));
920 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-event-scan-rate",
921 RTAS_EVENT_SCAN_RATE
));
924 _FDT(fdt_setprop(fdt
, rtas
, "ibm,change-msix-capable", NULL
, 0));
928 * According to PAPR, rtas ibm,os-term does not guarantee a return
929 * back to the guest cpu.
931 * While an additional ibm,extended-os-term property indicates
932 * that rtas call return will always occur. Set this property.
934 _FDT(fdt_setprop(fdt
, rtas
, "ibm,extended-os-term", NULL
, 0));
936 _FDT(fdt_setprop(fdt
, rtas
, "ibm,lrdr-capacity",
937 lrdr_capacity
, sizeof(lrdr_capacity
)));
939 spapr_dt_rtas_tokens(fdt
, rtas
);
942 /* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
943 * that the guest may request and thus the valid values for bytes 24..26 of
944 * option vector 5: */
945 static void spapr_dt_ov5_platform_support(void *fdt
, int chosen
)
947 PowerPCCPU
*first_ppc_cpu
= POWERPC_CPU(first_cpu
);
950 23, 0x00, /* Xive mode, filled in below. */
951 24, 0x00, /* Hash/Radix, filled in below. */
952 25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
953 26, 0x40, /* Radix options: GTSE == yes. */
956 if (!ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
957 first_ppc_cpu
->compat_pvr
)) {
958 /* If we're in a pre POWER9 compat mode then the guest should do hash */
959 val
[3] = 0x00; /* Hash */
960 } else if (kvm_enabled()) {
961 if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
962 val
[3] = 0x80; /* OV5_MMU_BOTH */
963 } else if (kvmppc_has_cap_mmu_radix()) {
964 val
[3] = 0x40; /* OV5_MMU_RADIX_300 */
966 val
[3] = 0x00; /* Hash */
969 /* V3 MMU supports both hash and radix in tcg (with dynamic switching) */
972 _FDT(fdt_setprop(fdt
, chosen
, "ibm,arch-vec-5-platform-support",
976 static void spapr_dt_chosen(sPAPRMachineState
*spapr
, void *fdt
)
978 MachineState
*machine
= MACHINE(spapr
);
980 const char *boot_device
= machine
->boot_order
;
981 char *stdout_path
= spapr_vio_stdout_path(spapr
->vio_bus
);
983 char *bootlist
= get_boot_devices_list(&cb
, true);
985 _FDT(chosen
= fdt_add_subnode(fdt
, 0, "chosen"));
987 _FDT(fdt_setprop_string(fdt
, chosen
, "bootargs", machine
->kernel_cmdline
));
988 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-start",
989 spapr
->initrd_base
));
990 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-end",
991 spapr
->initrd_base
+ spapr
->initrd_size
));
993 if (spapr
->kernel_size
) {
994 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
995 cpu_to_be64(spapr
->kernel_size
) };
997 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel",
998 &kprop
, sizeof(kprop
)));
999 if (spapr
->kernel_le
) {
1000 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel-le", NULL
, 0));
1004 _FDT((fdt_setprop_cell(fdt
, chosen
, "qemu,boot-menu", boot_menu
)));
1006 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-width", graphic_width
));
1007 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-height", graphic_height
));
1008 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-depth", graphic_depth
));
1010 if (cb
&& bootlist
) {
1013 for (i
= 0; i
< cb
; i
++) {
1014 if (bootlist
[i
] == '\n') {
1018 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-list", bootlist
));
1021 if (boot_device
&& strlen(boot_device
)) {
1022 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-device", boot_device
));
1025 if (!spapr
->has_graphics
&& stdout_path
) {
1026 _FDT(fdt_setprop_string(fdt
, chosen
, "linux,stdout-path", stdout_path
));
1029 spapr_dt_ov5_platform_support(fdt
, chosen
);
1031 g_free(stdout_path
);
1035 static void spapr_dt_hypervisor(sPAPRMachineState
*spapr
, void *fdt
)
1037 /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
1038 * KVM to work under pHyp with some guest co-operation */
1040 uint8_t hypercall
[16];
1042 _FDT(hypervisor
= fdt_add_subnode(fdt
, 0, "hypervisor"));
1043 /* indicate KVM hypercall interface */
1044 _FDT(fdt_setprop_string(fdt
, hypervisor
, "compatible", "linux,kvm"));
1045 if (kvmppc_has_cap_fixup_hcalls()) {
1047 * Older KVM versions with older guest kernels were broken
1048 * with the magic page, don't allow the guest to map it.
1050 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
1051 sizeof(hypercall
))) {
1052 _FDT(fdt_setprop(fdt
, hypervisor
, "hcall-instructions",
1053 hypercall
, sizeof(hypercall
)));
1058 static void *spapr_build_fdt(sPAPRMachineState
*spapr
,
1062 MachineState
*machine
= MACHINE(spapr
);
1063 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1064 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1070 fdt
= g_malloc0(FDT_MAX_SIZE
);
1071 _FDT((fdt_create_empty_tree(fdt
, FDT_MAX_SIZE
)));
1074 _FDT(fdt_setprop_string(fdt
, 0, "device_type", "chrp"));
1075 _FDT(fdt_setprop_string(fdt
, 0, "model", "IBM pSeries (emulated by qemu)"));
1076 _FDT(fdt_setprop_string(fdt
, 0, "compatible", "qemu,pseries"));
1079 * Add info to guest to indentify which host is it being run on
1080 * and what is the uuid of the guest
1082 if (kvmppc_get_host_model(&buf
)) {
1083 _FDT(fdt_setprop_string(fdt
, 0, "host-model", buf
));
1086 if (kvmppc_get_host_serial(&buf
)) {
1087 _FDT(fdt_setprop_string(fdt
, 0, "host-serial", buf
));
1091 buf
= qemu_uuid_unparse_strdup(&qemu_uuid
);
1093 _FDT(fdt_setprop_string(fdt
, 0, "vm,uuid", buf
));
1094 if (qemu_uuid_set
) {
1095 _FDT(fdt_setprop_string(fdt
, 0, "system-id", buf
));
1099 if (qemu_get_vm_name()) {
1100 _FDT(fdt_setprop_string(fdt
, 0, "ibm,partition-name",
1101 qemu_get_vm_name()));
1104 _FDT(fdt_setprop_cell(fdt
, 0, "#address-cells", 2));
1105 _FDT(fdt_setprop_cell(fdt
, 0, "#size-cells", 2));
1107 /* /interrupt controller */
1108 spapr_dt_xics(xics_max_server_number(), fdt
, PHANDLE_XICP
);
1110 ret
= spapr_populate_memory(spapr
, fdt
);
1112 error_report("couldn't setup memory nodes in fdt");
1117 spapr_dt_vdevice(spapr
->vio_bus
, fdt
);
1119 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
1120 ret
= spapr_rng_populate_dt(fdt
);
1122 error_report("could not set up rng device in the fdt");
1127 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
1128 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
1130 error_report("couldn't setup PCI devices in fdt");
1136 spapr_populate_cpus_dt_node(fdt
, spapr
);
1138 if (smc
->dr_lmb_enabled
) {
1139 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
1142 if (mc
->has_hotpluggable_cpus
) {
1143 int offset
= fdt_path_offset(fdt
, "/cpus");
1144 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
1145 SPAPR_DR_CONNECTOR_TYPE_CPU
);
1147 error_report("Couldn't set up CPU DR device tree properties");
1152 /* /event-sources */
1153 spapr_dt_events(spapr
, fdt
);
1156 spapr_dt_rtas(spapr
, fdt
);
1159 spapr_dt_chosen(spapr
, fdt
);
1162 if (kvm_enabled()) {
1163 spapr_dt_hypervisor(spapr
, fdt
);
1166 /* Build memory reserve map */
1167 if (spapr
->kernel_size
) {
1168 _FDT((fdt_add_mem_rsv(fdt
, KERNEL_LOAD_ADDR
, spapr
->kernel_size
)));
1170 if (spapr
->initrd_size
) {
1171 _FDT((fdt_add_mem_rsv(fdt
, spapr
->initrd_base
, spapr
->initrd_size
)));
1174 /* ibm,client-architecture-support updates */
1175 ret
= spapr_dt_cas_updates(spapr
, fdt
, spapr
->ov5_cas
);
1177 error_report("couldn't setup CAS properties fdt");
1184 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1186 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1189 static void emulate_spapr_hypercall(PPCVirtualHypervisor
*vhyp
,
1192 CPUPPCState
*env
= &cpu
->env
;
1194 /* The TCG path should also be holding the BQL at this point */
1195 g_assert(qemu_mutex_iothread_locked());
1198 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1199 env
->gpr
[3] = H_PRIVILEGE
;
1201 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1205 static uint64_t spapr_get_patbe(PPCVirtualHypervisor
*vhyp
)
1207 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1209 return spapr
->patb_entry
;
1212 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1213 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1214 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1215 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1216 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1219 * Get the fd to access the kernel htab, re-opening it if necessary
1221 static int get_htab_fd(sPAPRMachineState
*spapr
)
1223 Error
*local_err
= NULL
;
1225 if (spapr
->htab_fd
>= 0) {
1226 return spapr
->htab_fd
;
1229 spapr
->htab_fd
= kvmppc_get_htab_fd(false, 0, &local_err
);
1230 if (spapr
->htab_fd
< 0) {
1231 error_report_err(local_err
);
1234 return spapr
->htab_fd
;
1237 void close_htab_fd(sPAPRMachineState
*spapr
)
1239 if (spapr
->htab_fd
>= 0) {
1240 close(spapr
->htab_fd
);
1242 spapr
->htab_fd
= -1;
1245 static hwaddr
spapr_hpt_mask(PPCVirtualHypervisor
*vhyp
)
1247 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1249 return HTAB_SIZE(spapr
) / HASH_PTEG_SIZE_64
- 1;
1252 static target_ulong
spapr_encode_hpt_for_kvm_pr(PPCVirtualHypervisor
*vhyp
)
1254 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1256 assert(kvm_enabled());
1262 return (target_ulong
)(uintptr_t)spapr
->htab
| (spapr
->htab_shift
- 18);
1265 static const ppc_hash_pte64_t
*spapr_map_hptes(PPCVirtualHypervisor
*vhyp
,
1268 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1269 hwaddr pte_offset
= ptex
* HASH_PTE_SIZE_64
;
1273 * HTAB is controlled by KVM. Fetch into temporary buffer
1275 ppc_hash_pte64_t
*hptes
= g_malloc(n
* HASH_PTE_SIZE_64
);
1276 kvmppc_read_hptes(hptes
, ptex
, n
);
1281 * HTAB is controlled by QEMU. Just point to the internally
1284 return (const ppc_hash_pte64_t
*)(spapr
->htab
+ pte_offset
);
1287 static void spapr_unmap_hptes(PPCVirtualHypervisor
*vhyp
,
1288 const ppc_hash_pte64_t
*hptes
,
1291 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1294 g_free((void *)hptes
);
1297 /* Nothing to do for qemu managed HPT */
1300 static void spapr_store_hpte(PPCVirtualHypervisor
*vhyp
, hwaddr ptex
,
1301 uint64_t pte0
, uint64_t pte1
)
1303 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1304 hwaddr offset
= ptex
* HASH_PTE_SIZE_64
;
1307 kvmppc_write_hpte(ptex
, pte0
, pte1
);
1309 stq_p(spapr
->htab
+ offset
, pte0
);
1310 stq_p(spapr
->htab
+ offset
+ HASH_PTE_SIZE_64
/ 2, pte1
);
1314 int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1318 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1319 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1320 * that's much more than is needed for Linux guests */
1321 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1322 shift
= MAX(shift
, 18); /* Minimum architected size */
1323 shift
= MIN(shift
, 46); /* Maximum architected size */
1327 void spapr_free_hpt(sPAPRMachineState
*spapr
)
1329 g_free(spapr
->htab
);
1331 spapr
->htab_shift
= 0;
1332 close_htab_fd(spapr
);
1335 void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1340 /* Clean up any HPT info from a previous boot */
1341 spapr_free_hpt(spapr
);
1343 rc
= kvmppc_reset_htab(shift
);
1345 /* kernel-side HPT needed, but couldn't allocate one */
1346 error_setg_errno(errp
, errno
,
1347 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1349 /* This is almost certainly fatal, but if the caller really
1350 * wants to carry on with shift == 0, it's welcome to try */
1351 } else if (rc
> 0) {
1352 /* kernel-side HPT allocated */
1355 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1359 spapr
->htab_shift
= shift
;
1362 /* kernel-side HPT not needed, allocate in userspace instead */
1363 size_t size
= 1ULL << shift
;
1366 spapr
->htab
= qemu_memalign(size
, size
);
1368 error_setg_errno(errp
, errno
,
1369 "Could not allocate HPT of order %d", shift
);
1373 memset(spapr
->htab
, 0, size
);
1374 spapr
->htab_shift
= shift
;
1376 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1377 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1380 /* We're setting up a hash table, so that means we're not radix */
1381 spapr
->patb_entry
= 0;
1384 void spapr_setup_hpt_and_vrma(sPAPRMachineState
*spapr
)
1388 if ((spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DISABLED
)
1389 || (spapr
->cas_reboot
1390 && !spapr_ovec_test(spapr
->ov5_cas
, OV5_HPT_RESIZE
))) {
1391 hpt_shift
= spapr_hpt_shift_for_ramsize(MACHINE(spapr
)->maxram_size
);
1393 uint64_t current_ram_size
;
1395 current_ram_size
= MACHINE(spapr
)->ram_size
+ get_plugged_memory_size();
1396 hpt_shift
= spapr_hpt_shift_for_ramsize(current_ram_size
);
1398 spapr_reallocate_hpt(spapr
, hpt_shift
, &error_fatal
);
1400 if (spapr
->vrma_adjust
) {
1401 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(MACHINE(spapr
)),
1406 static void find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1408 bool matched
= false;
1410 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1415 error_report("Device %s is not supported by this machine yet.",
1416 qdev_fw_name(DEVICE(sbdev
)));
1421 static int spapr_reset_drcs(Object
*child
, void *opaque
)
1423 sPAPRDRConnector
*drc
=
1424 (sPAPRDRConnector
*) object_dynamic_cast(child
,
1425 TYPE_SPAPR_DR_CONNECTOR
);
1428 spapr_drc_reset(drc
);
1434 static void ppc_spapr_reset(void)
1436 MachineState
*machine
= MACHINE(qdev_get_machine());
1437 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1438 PowerPCCPU
*first_ppc_cpu
;
1439 uint32_t rtas_limit
;
1440 hwaddr rtas_addr
, fdt_addr
;
1444 /* Check for unknown sysbus devices */
1445 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1447 spapr_caps_reset(spapr
);
1449 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1450 if (kvm_enabled() && kvmppc_has_cap_mmu_radix() &&
1451 ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
1452 spapr
->max_compat_pvr
)) {
1453 /* If using KVM with radix mode available, VCPUs can be started
1454 * without a HPT because KVM will start them in radix mode.
1455 * Set the GR bit in PATB so that we know there is no HPT. */
1456 spapr
->patb_entry
= PATBE1_GR
;
1458 spapr_setup_hpt_and_vrma(spapr
);
1461 /* if this reset wasn't generated by CAS, we should reset our
1462 * negotiated options and start from scratch */
1463 if (!spapr
->cas_reboot
) {
1464 spapr_ovec_cleanup(spapr
->ov5_cas
);
1465 spapr
->ov5_cas
= spapr_ovec_new();
1467 ppc_set_compat(first_ppc_cpu
, spapr
->max_compat_pvr
, &error_fatal
);
1470 qemu_devices_reset();
1472 /* DRC reset may cause a device to be unplugged. This will cause troubles
1473 * if this device is used by another device (eg, a running vhost backend
1474 * will crash QEMU if the DIMM holding the vring goes away). To avoid such
1475 * situations, we reset DRCs after all devices have been reset.
1477 object_child_foreach_recursive(object_get_root(), spapr_reset_drcs
, NULL
);
1479 spapr_clear_pending_events(spapr
);
1482 * We place the device tree and RTAS just below either the top of the RMA,
1483 * or just below 2GB, whichever is lowere, so that it can be
1484 * processed with 32-bit real mode code if necessary
1486 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1487 rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1488 fdt_addr
= rtas_addr
- FDT_MAX_SIZE
;
1490 fdt
= spapr_build_fdt(spapr
, rtas_addr
, spapr
->rtas_size
);
1492 spapr_load_rtas(spapr
, fdt
, rtas_addr
);
1496 /* Should only fail if we've built a corrupted tree */
1499 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1500 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1501 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1506 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1507 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1510 /* Set up the entry state */
1511 first_ppc_cpu
->env
.gpr
[3] = fdt_addr
;
1512 first_ppc_cpu
->env
.gpr
[5] = 0;
1513 first_cpu
->halted
= 0;
1514 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1516 spapr
->cas_reboot
= false;
1519 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1521 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1522 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1525 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1529 qdev_init_nofail(dev
);
1531 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1534 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1536 object_initialize(&spapr
->rtc
, sizeof(spapr
->rtc
), TYPE_SPAPR_RTC
);
1537 object_property_add_child(OBJECT(spapr
), "rtc", OBJECT(&spapr
->rtc
),
1539 object_property_set_bool(OBJECT(&spapr
->rtc
), true, "realized",
1541 object_property_add_alias(OBJECT(spapr
), "rtc-time", OBJECT(&spapr
->rtc
),
1542 "date", &error_fatal
);
1545 /* Returns whether we want to use VGA or not */
1546 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1548 switch (vga_interface_type
) {
1555 return pci_vga_init(pci_bus
) != NULL
;
1558 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1563 static int spapr_pre_load(void *opaque
)
1567 rc
= spapr_caps_pre_load(opaque
);
1575 static int spapr_post_load(void *opaque
, int version_id
)
1577 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1580 err
= spapr_caps_post_migration(spapr
);
1585 if (!object_dynamic_cast(OBJECT(spapr
->ics
), TYPE_ICS_KVM
)) {
1588 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
1589 icp_resend(ICP(cpu
->intc
));
1593 /* In earlier versions, there was no separate qdev for the PAPR
1594 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1595 * So when migrating from those versions, poke the incoming offset
1596 * value into the RTC device */
1597 if (version_id
< 3) {
1598 err
= spapr_rtc_import_offset(&spapr
->rtc
, spapr
->rtc_offset
);
1601 if (kvm_enabled() && spapr
->patb_entry
) {
1602 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
1603 bool radix
= !!(spapr
->patb_entry
& PATBE1_GR
);
1604 bool gtse
= !!(cpu
->env
.spr
[SPR_LPCR
] & LPCR_GTSE
);
1606 err
= kvmppc_configure_v3_mmu(cpu
, radix
, gtse
, spapr
->patb_entry
);
1608 error_report("Process table config unsupported by the host");
1616 static int spapr_pre_save(void *opaque
)
1620 rc
= spapr_caps_pre_save(opaque
);
1628 static bool version_before_3(void *opaque
, int version_id
)
1630 return version_id
< 3;
1633 static bool spapr_pending_events_needed(void *opaque
)
1635 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1636 return !QTAILQ_EMPTY(&spapr
->pending_events
);
1639 static const VMStateDescription vmstate_spapr_event_entry
= {
1640 .name
= "spapr_event_log_entry",
1642 .minimum_version_id
= 1,
1643 .fields
= (VMStateField
[]) {
1644 VMSTATE_UINT32(summary
, sPAPREventLogEntry
),
1645 VMSTATE_UINT32(extended_length
, sPAPREventLogEntry
),
1646 VMSTATE_VBUFFER_ALLOC_UINT32(extended_log
, sPAPREventLogEntry
, 0,
1647 NULL
, extended_length
),
1648 VMSTATE_END_OF_LIST()
1652 static const VMStateDescription vmstate_spapr_pending_events
= {
1653 .name
= "spapr_pending_events",
1655 .minimum_version_id
= 1,
1656 .needed
= spapr_pending_events_needed
,
1657 .fields
= (VMStateField
[]) {
1658 VMSTATE_QTAILQ_V(pending_events
, sPAPRMachineState
, 1,
1659 vmstate_spapr_event_entry
, sPAPREventLogEntry
, next
),
1660 VMSTATE_END_OF_LIST()
1664 static bool spapr_ov5_cas_needed(void *opaque
)
1666 sPAPRMachineState
*spapr
= opaque
;
1667 sPAPROptionVector
*ov5_mask
= spapr_ovec_new();
1668 sPAPROptionVector
*ov5_legacy
= spapr_ovec_new();
1669 sPAPROptionVector
*ov5_removed
= spapr_ovec_new();
1672 /* Prior to the introduction of sPAPROptionVector, we had two option
1673 * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
1674 * Both of these options encode machine topology into the device-tree
1675 * in such a way that the now-booted OS should still be able to interact
1676 * appropriately with QEMU regardless of what options were actually
1677 * negotiatied on the source side.
1679 * As such, we can avoid migrating the CAS-negotiated options if these
1680 * are the only options available on the current machine/platform.
1681 * Since these are the only options available for pseries-2.7 and
1682 * earlier, this allows us to maintain old->new/new->old migration
1685 * For QEMU 2.8+, there are additional CAS-negotiatable options available
1686 * via default pseries-2.8 machines and explicit command-line parameters.
1687 * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
1688 * of the actual CAS-negotiated values to continue working properly. For
1689 * example, availability of memory unplug depends on knowing whether
1690 * OV5_HP_EVT was negotiated via CAS.
1692 * Thus, for any cases where the set of available CAS-negotiatable
1693 * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
1694 * include the CAS-negotiated options in the migration stream.
1696 spapr_ovec_set(ov5_mask
, OV5_FORM1_AFFINITY
);
1697 spapr_ovec_set(ov5_mask
, OV5_DRCONF_MEMORY
);
1699 /* spapr_ovec_diff returns true if bits were removed. we avoid using
1700 * the mask itself since in the future it's possible "legacy" bits may be
1701 * removed via machine options, which could generate a false positive
1702 * that breaks migration.
1704 spapr_ovec_intersect(ov5_legacy
, spapr
->ov5
, ov5_mask
);
1705 cas_needed
= spapr_ovec_diff(ov5_removed
, spapr
->ov5
, ov5_legacy
);
1707 spapr_ovec_cleanup(ov5_mask
);
1708 spapr_ovec_cleanup(ov5_legacy
);
1709 spapr_ovec_cleanup(ov5_removed
);
1714 static const VMStateDescription vmstate_spapr_ov5_cas
= {
1715 .name
= "spapr_option_vector_ov5_cas",
1717 .minimum_version_id
= 1,
1718 .needed
= spapr_ov5_cas_needed
,
1719 .fields
= (VMStateField
[]) {
1720 VMSTATE_STRUCT_POINTER_V(ov5_cas
, sPAPRMachineState
, 1,
1721 vmstate_spapr_ovec
, sPAPROptionVector
),
1722 VMSTATE_END_OF_LIST()
1726 static bool spapr_patb_entry_needed(void *opaque
)
1728 sPAPRMachineState
*spapr
= opaque
;
1730 return !!spapr
->patb_entry
;
1733 static const VMStateDescription vmstate_spapr_patb_entry
= {
1734 .name
= "spapr_patb_entry",
1736 .minimum_version_id
= 1,
1737 .needed
= spapr_patb_entry_needed
,
1738 .fields
= (VMStateField
[]) {
1739 VMSTATE_UINT64(patb_entry
, sPAPRMachineState
),
1740 VMSTATE_END_OF_LIST()
1744 static const VMStateDescription vmstate_spapr
= {
1747 .minimum_version_id
= 1,
1748 .pre_load
= spapr_pre_load
,
1749 .post_load
= spapr_post_load
,
1750 .pre_save
= spapr_pre_save
,
1751 .fields
= (VMStateField
[]) {
1752 /* used to be @next_irq */
1753 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1756 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1758 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1759 VMSTATE_END_OF_LIST()
1761 .subsections
= (const VMStateDescription
*[]) {
1762 &vmstate_spapr_ov5_cas
,
1763 &vmstate_spapr_patb_entry
,
1764 &vmstate_spapr_pending_events
,
1765 &vmstate_spapr_cap_htm
,
1766 &vmstate_spapr_cap_vsx
,
1767 &vmstate_spapr_cap_dfp
,
1768 &vmstate_spapr_cap_cfpc
,
1769 &vmstate_spapr_cap_sbbc
,
1774 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1776 sPAPRMachineState
*spapr
= opaque
;
1778 /* "Iteration" header */
1779 if (!spapr
->htab_shift
) {
1780 qemu_put_be32(f
, -1);
1782 qemu_put_be32(f
, spapr
->htab_shift
);
1786 spapr
->htab_save_index
= 0;
1787 spapr
->htab_first_pass
= true;
1789 if (spapr
->htab_shift
) {
1790 assert(kvm_enabled());
1798 static void htab_save_chunk(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1799 int chunkstart
, int n_valid
, int n_invalid
)
1801 qemu_put_be32(f
, chunkstart
);
1802 qemu_put_be16(f
, n_valid
);
1803 qemu_put_be16(f
, n_invalid
);
1804 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1805 HASH_PTE_SIZE_64
* n_valid
);
1808 static void htab_save_end_marker(QEMUFile
*f
)
1810 qemu_put_be32(f
, 0);
1811 qemu_put_be16(f
, 0);
1812 qemu_put_be16(f
, 0);
1815 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1818 bool has_timeout
= max_ns
!= -1;
1819 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1820 int index
= spapr
->htab_save_index
;
1821 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1823 assert(spapr
->htab_first_pass
);
1828 /* Consume invalid HPTEs */
1829 while ((index
< htabslots
)
1830 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1831 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1835 /* Consume valid HPTEs */
1837 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1838 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1839 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1843 if (index
> chunkstart
) {
1844 int n_valid
= index
- chunkstart
;
1846 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, 0);
1849 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1853 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1855 if (index
>= htabslots
) {
1856 assert(index
== htabslots
);
1858 spapr
->htab_first_pass
= false;
1860 spapr
->htab_save_index
= index
;
1863 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1866 bool final
= max_ns
< 0;
1867 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1868 int examined
= 0, sent
= 0;
1869 int index
= spapr
->htab_save_index
;
1870 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1872 assert(!spapr
->htab_first_pass
);
1875 int chunkstart
, invalidstart
;
1877 /* Consume non-dirty HPTEs */
1878 while ((index
< htabslots
)
1879 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1885 /* Consume valid dirty HPTEs */
1886 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1887 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1888 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1889 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1894 invalidstart
= index
;
1895 /* Consume invalid dirty HPTEs */
1896 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1897 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1898 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1899 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1904 if (index
> chunkstart
) {
1905 int n_valid
= invalidstart
- chunkstart
;
1906 int n_invalid
= index
- invalidstart
;
1908 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, n_invalid
);
1909 sent
+= index
- chunkstart
;
1911 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1916 if (examined
>= htabslots
) {
1920 if (index
>= htabslots
) {
1921 assert(index
== htabslots
);
1924 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1926 if (index
>= htabslots
) {
1927 assert(index
== htabslots
);
1931 spapr
->htab_save_index
= index
;
1933 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1936 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1937 #define MAX_KVM_BUF_SIZE 2048
1939 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1941 sPAPRMachineState
*spapr
= opaque
;
1945 /* Iteration header */
1946 if (!spapr
->htab_shift
) {
1947 qemu_put_be32(f
, -1);
1950 qemu_put_be32(f
, 0);
1954 assert(kvm_enabled());
1956 fd
= get_htab_fd(spapr
);
1961 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1965 } else if (spapr
->htab_first_pass
) {
1966 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1968 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1971 htab_save_end_marker(f
);
1976 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1978 sPAPRMachineState
*spapr
= opaque
;
1981 /* Iteration header */
1982 if (!spapr
->htab_shift
) {
1983 qemu_put_be32(f
, -1);
1986 qemu_put_be32(f
, 0);
1992 assert(kvm_enabled());
1994 fd
= get_htab_fd(spapr
);
1999 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
2004 if (spapr
->htab_first_pass
) {
2005 htab_save_first_pass(f
, spapr
, -1);
2007 htab_save_later_pass(f
, spapr
, -1);
2011 htab_save_end_marker(f
);
2016 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
2018 sPAPRMachineState
*spapr
= opaque
;
2019 uint32_t section_hdr
;
2021 Error
*local_err
= NULL
;
2023 if (version_id
< 1 || version_id
> 1) {
2024 error_report("htab_load() bad version");
2028 section_hdr
= qemu_get_be32(f
);
2030 if (section_hdr
== -1) {
2031 spapr_free_hpt(spapr
);
2036 /* First section gives the htab size */
2037 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
2039 error_report_err(local_err
);
2046 assert(kvm_enabled());
2048 fd
= kvmppc_get_htab_fd(true, 0, &local_err
);
2050 error_report_err(local_err
);
2057 uint16_t n_valid
, n_invalid
;
2059 index
= qemu_get_be32(f
);
2060 n_valid
= qemu_get_be16(f
);
2061 n_invalid
= qemu_get_be16(f
);
2063 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
2068 if ((index
+ n_valid
+ n_invalid
) >
2069 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
2070 /* Bad index in stream */
2072 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
2073 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
2079 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
2080 HASH_PTE_SIZE_64
* n_valid
);
2083 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
2084 HASH_PTE_SIZE_64
* n_invalid
);
2091 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
2106 static void htab_save_cleanup(void *opaque
)
2108 sPAPRMachineState
*spapr
= opaque
;
2110 close_htab_fd(spapr
);
2113 static SaveVMHandlers savevm_htab_handlers
= {
2114 .save_setup
= htab_save_setup
,
2115 .save_live_iterate
= htab_save_iterate
,
2116 .save_live_complete_precopy
= htab_save_complete
,
2117 .save_cleanup
= htab_save_cleanup
,
2118 .load_state
= htab_load
,
2121 static void spapr_boot_set(void *opaque
, const char *boot_device
,
2124 MachineState
*machine
= MACHINE(opaque
);
2125 machine
->boot_order
= g_strdup(boot_device
);
2128 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
2130 MachineState
*machine
= MACHINE(spapr
);
2131 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
2132 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
2135 for (i
= 0; i
< nr_lmbs
; i
++) {
2138 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
2139 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_LMB
,
2145 * If RAM size, maxmem size and individual node mem sizes aren't aligned
2146 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
2147 * since we can't support such unaligned sizes with DRCONF_MEMORY.
2149 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
2153 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2154 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
2155 " is not aligned to %llu MiB",
2157 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2161 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2162 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
2163 " is not aligned to %llu MiB",
2165 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2169 for (i
= 0; i
< nb_numa_nodes
; i
++) {
2170 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
2172 "Node %d memory size 0x%" PRIx64
2173 " is not aligned to %llu MiB",
2174 i
, numa_info
[i
].node_mem
,
2175 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2181 /* find cpu slot in machine->possible_cpus by core_id */
2182 static CPUArchId
*spapr_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
2184 int index
= id
/ smp_threads
;
2186 if (index
>= ms
->possible_cpus
->len
) {
2192 return &ms
->possible_cpus
->cpus
[index
];
2195 static void spapr_init_cpus(sPAPRMachineState
*spapr
)
2197 MachineState
*machine
= MACHINE(spapr
);
2198 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
2199 const char *type
= spapr_get_cpu_core_type(machine
->cpu_type
);
2200 int smt
= kvmppc_smt_threads();
2201 const CPUArchIdList
*possible_cpus
;
2202 int boot_cores_nr
= smp_cpus
/ smp_threads
;
2206 error_report("Unable to find sPAPR CPU Core definition");
2210 possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
2211 if (mc
->has_hotpluggable_cpus
) {
2212 if (smp_cpus
% smp_threads
) {
2213 error_report("smp_cpus (%u) must be multiple of threads (%u)",
2214 smp_cpus
, smp_threads
);
2217 if (max_cpus
% smp_threads
) {
2218 error_report("max_cpus (%u) must be multiple of threads (%u)",
2219 max_cpus
, smp_threads
);
2223 if (max_cpus
!= smp_cpus
) {
2224 error_report("This machine version does not support CPU hotplug");
2227 boot_cores_nr
= possible_cpus
->len
;
2230 for (i
= 0; i
< possible_cpus
->len
; i
++) {
2231 int core_id
= i
* smp_threads
;
2233 if (mc
->has_hotpluggable_cpus
) {
2234 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_CPU
,
2235 (core_id
/ smp_threads
) * smt
);
2238 if (i
< boot_cores_nr
) {
2239 Object
*core
= object_new(type
);
2240 int nr_threads
= smp_threads
;
2242 /* Handle the partially filled core for older machine types */
2243 if ((i
+ 1) * smp_threads
>= smp_cpus
) {
2244 nr_threads
= smp_cpus
- i
* smp_threads
;
2247 object_property_set_int(core
, nr_threads
, "nr-threads",
2249 object_property_set_int(core
, core_id
, CPU_CORE_PROP_CORE_ID
,
2251 object_property_set_bool(core
, true, "realized", &error_fatal
);
2256 static void spapr_set_vsmt_mode(sPAPRMachineState
*spapr
, Error
**errp
)
2258 Error
*local_err
= NULL
;
2259 bool vsmt_user
= !!spapr
->vsmt
;
2260 int kvm_smt
= kvmppc_smt_threads();
2263 if (!kvm_enabled() && (smp_threads
> 1)) {
2264 error_setg(&local_err
, "TCG cannot support more than 1 thread/core "
2265 "on a pseries machine");
2268 if (!is_power_of_2(smp_threads
)) {
2269 error_setg(&local_err
, "Cannot support %d threads/core on a pseries "
2270 "machine because it must be a power of 2", smp_threads
);
2274 /* Detemine the VSMT mode to use: */
2276 if (spapr
->vsmt
< smp_threads
) {
2277 error_setg(&local_err
, "Cannot support VSMT mode %d"
2278 " because it must be >= threads/core (%d)",
2279 spapr
->vsmt
, smp_threads
);
2282 /* In this case, spapr->vsmt has been set by the command line */
2284 /* Choose a VSMT mode that may be higher than necessary but is
2285 * likely to be compatible with hosts that don't have VSMT. */
2286 spapr
->vsmt
= MAX(kvm_smt
, smp_threads
);
2289 /* KVM: If necessary, set the SMT mode: */
2290 if (kvm_enabled() && (spapr
->vsmt
!= kvm_smt
)) {
2291 ret
= kvmppc_set_smt_threads(spapr
->vsmt
);
2293 error_setg(&local_err
,
2294 "Failed to set KVM's VSMT mode to %d (errno %d)",
2297 error_append_hint(&local_err
, "On PPC, a VM with %d threads/"
2298 "core on a host with %d threads/core requires "
2299 " the use of VSMT mode %d.\n",
2300 smp_threads
, kvm_smt
, spapr
->vsmt
);
2302 kvmppc_hint_smt_possible(&local_err
);
2306 /* else TCG: nothing to do currently */
2308 error_propagate(errp
, local_err
);
2311 /* pSeries LPAR / sPAPR hardware init */
2312 static void ppc_spapr_init(MachineState
*machine
)
2314 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2315 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
2316 const char *kernel_filename
= machine
->kernel_filename
;
2317 const char *initrd_filename
= machine
->initrd_filename
;
2320 MemoryRegion
*sysmem
= get_system_memory();
2321 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
2322 MemoryRegion
*rma_region
;
2324 hwaddr rma_alloc_size
;
2325 hwaddr node0_size
= spapr_node0_size(machine
);
2326 long load_limit
, fw_size
;
2328 Error
*resize_hpt_err
= NULL
;
2330 msi_nonbroken
= true;
2332 QLIST_INIT(&spapr
->phbs
);
2333 QTAILQ_INIT(&spapr
->pending_dimm_unplugs
);
2335 /* Check HPT resizing availability */
2336 kvmppc_check_papr_resize_hpt(&resize_hpt_err
);
2337 if (spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DEFAULT
) {
2339 * If the user explicitly requested a mode we should either
2340 * supply it, or fail completely (which we do below). But if
2341 * it's not set explicitly, we reset our mode to something
2344 if (resize_hpt_err
) {
2345 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2346 error_free(resize_hpt_err
);
2347 resize_hpt_err
= NULL
;
2349 spapr
->resize_hpt
= smc
->resize_hpt_default
;
2353 assert(spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DEFAULT
);
2355 if ((spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) && resize_hpt_err
) {
2357 * User requested HPT resize, but this host can't supply it. Bail out
2359 error_report_err(resize_hpt_err
);
2363 /* Allocate RMA if necessary */
2364 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
2366 if (rma_alloc_size
== -1) {
2367 error_report("Unable to create RMA");
2371 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
2372 spapr
->rma_size
= rma_alloc_size
;
2374 spapr
->rma_size
= node0_size
;
2376 /* With KVM, we don't actually know whether KVM supports an
2377 * unbounded RMA (PR KVM) or is limited by the hash table size
2378 * (HV KVM using VRMA), so we always assume the latter
2380 * In that case, we also limit the initial allocations for RTAS
2381 * etc... to 256M since we have no way to know what the VRMA size
2382 * is going to be as it depends on the size of the hash table
2383 * isn't determined yet.
2385 if (kvm_enabled()) {
2386 spapr
->vrma_adjust
= 1;
2387 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
2390 /* Actually we don't support unbounded RMA anymore since we
2391 * added proper emulation of HV mode. The max we can get is
2392 * 16G which also happens to be what we configure for PAPR
2393 * mode so make sure we don't do anything bigger than that
2395 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x400000000ull
);
2398 if (spapr
->rma_size
> node0_size
) {
2399 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
2404 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
2405 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
2407 /* Set up Interrupt Controller before we create the VCPUs */
2408 xics_system_init(machine
, XICS_IRQS_SPAPR
, &error_fatal
);
2410 /* Set up containers for ibm,client-architecture-support negotiated options
2412 spapr
->ov5
= spapr_ovec_new();
2413 spapr
->ov5_cas
= spapr_ovec_new();
2415 if (smc
->dr_lmb_enabled
) {
2416 spapr_ovec_set(spapr
->ov5
, OV5_DRCONF_MEMORY
);
2417 spapr_validate_node_memory(machine
, &error_fatal
);
2420 spapr_ovec_set(spapr
->ov5
, OV5_FORM1_AFFINITY
);
2421 if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
2422 /* KVM and TCG always allow GTSE with radix... */
2423 spapr_ovec_set(spapr
->ov5
, OV5_MMU_RADIX_GTSE
);
2425 /* ... but not with hash (currently). */
2427 /* advertise support for dedicated HP event source to guests */
2428 if (spapr
->use_hotplug_event_source
) {
2429 spapr_ovec_set(spapr
->ov5
, OV5_HP_EVT
);
2432 /* advertise support for HPT resizing */
2433 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
2434 spapr_ovec_set(spapr
->ov5
, OV5_HPT_RESIZE
);
2438 spapr_set_vsmt_mode(spapr
, &error_fatal
);
2440 spapr_init_cpus(spapr
);
2442 if (kvm_enabled()) {
2443 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
2444 kvmppc_enable_logical_ci_hcalls();
2445 kvmppc_enable_set_mode_hcall();
2447 /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
2448 kvmppc_enable_clear_ref_mod_hcalls();
2452 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
2454 memory_region_add_subregion(sysmem
, 0, ram
);
2456 if (rma_alloc_size
&& rma
) {
2457 rma_region
= g_new(MemoryRegion
, 1);
2458 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
2459 rma_alloc_size
, rma
);
2460 vmstate_register_ram_global(rma_region
);
2461 memory_region_add_subregion(sysmem
, 0, rma_region
);
2464 /* initialize hotplug memory address space */
2465 if (machine
->ram_size
< machine
->maxram_size
) {
2466 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
2468 * Limit the number of hotpluggable memory slots to half the number
2469 * slots that KVM supports, leaving the other half for PCI and other
2470 * devices. However ensure that number of slots doesn't drop below 32.
2472 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
2473 SPAPR_MAX_RAM_SLOTS
;
2475 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
2476 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
2478 if (machine
->ram_slots
> max_memslots
) {
2479 error_report("Specified number of memory slots %"
2480 PRIu64
" exceeds max supported %d",
2481 machine
->ram_slots
, max_memslots
);
2485 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
2486 SPAPR_HOTPLUG_MEM_ALIGN
);
2487 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
2488 "hotplug-memory", hotplug_mem_size
);
2489 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
2490 &spapr
->hotplug_memory
.mr
);
2493 if (smc
->dr_lmb_enabled
) {
2494 spapr_create_lmb_dr_connectors(spapr
);
2497 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
2499 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2502 spapr
->rtas_size
= get_image_size(filename
);
2503 if (spapr
->rtas_size
< 0) {
2504 error_report("Could not get size of LPAR rtas '%s'", filename
);
2507 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
2508 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
2509 error_report("Could not load LPAR rtas '%s'", filename
);
2512 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
2513 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
2514 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
2519 /* Set up RTAS event infrastructure */
2520 spapr_events_init(spapr
);
2522 /* Set up the RTC RTAS interfaces */
2523 spapr_rtc_create(spapr
);
2525 /* Set up VIO bus */
2526 spapr
->vio_bus
= spapr_vio_bus_init();
2528 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
2529 if (serial_hds
[i
]) {
2530 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
2534 /* We always have at least the nvram device on VIO */
2535 spapr_create_nvram(spapr
);
2538 spapr_pci_rtas_init();
2540 phb
= spapr_create_phb(spapr
, 0);
2542 for (i
= 0; i
< nb_nics
; i
++) {
2543 NICInfo
*nd
= &nd_table
[i
];
2546 nd
->model
= g_strdup("ibmveth");
2549 if (strcmp(nd
->model
, "ibmveth") == 0) {
2550 spapr_vlan_create(spapr
->vio_bus
, nd
);
2552 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
2556 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
2557 spapr_vscsi_create(spapr
->vio_bus
);
2561 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
2562 spapr
->has_graphics
= true;
2563 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
2567 if (smc
->use_ohci_by_default
) {
2568 pci_create_simple(phb
->bus
, -1, "pci-ohci");
2570 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
2573 if (spapr
->has_graphics
) {
2574 USBBus
*usb_bus
= usb_bus_find(-1);
2576 usb_create_simple(usb_bus
, "usb-kbd");
2577 usb_create_simple(usb_bus
, "usb-mouse");
2581 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
2583 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
2588 if (kernel_filename
) {
2589 uint64_t lowaddr
= 0;
2591 spapr
->kernel_size
= load_elf(kernel_filename
, translate_kernel_address
,
2592 NULL
, NULL
, &lowaddr
, NULL
, 1,
2593 PPC_ELF_MACHINE
, 0, 0);
2594 if (spapr
->kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
2595 spapr
->kernel_size
= load_elf(kernel_filename
,
2596 translate_kernel_address
, NULL
, NULL
,
2597 &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
2599 spapr
->kernel_le
= spapr
->kernel_size
> 0;
2601 if (spapr
->kernel_size
< 0) {
2602 error_report("error loading %s: %s", kernel_filename
,
2603 load_elf_strerror(spapr
->kernel_size
));
2608 if (initrd_filename
) {
2609 /* Try to locate the initrd in the gap between the kernel
2610 * and the firmware. Add a bit of space just in case
2612 spapr
->initrd_base
= (KERNEL_LOAD_ADDR
+ spapr
->kernel_size
2613 + 0x1ffff) & ~0xffff;
2614 spapr
->initrd_size
= load_image_targphys(initrd_filename
,
2617 - spapr
->initrd_base
);
2618 if (spapr
->initrd_size
< 0) {
2619 error_report("could not load initial ram disk '%s'",
2626 if (bios_name
== NULL
) {
2627 bios_name
= FW_FILE_NAME
;
2629 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2631 error_report("Could not find LPAR firmware '%s'", bios_name
);
2634 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2636 error_report("Could not load LPAR firmware '%s'", filename
);
2641 /* FIXME: Should register things through the MachineState's qdev
2642 * interface, this is a legacy from the sPAPREnvironment structure
2643 * which predated MachineState but had a similar function */
2644 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2645 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2646 &savevm_htab_handlers
, spapr
);
2648 qemu_register_boot_set(spapr_boot_set
, spapr
);
2650 if (kvm_enabled()) {
2651 /* to stop and start vmclock */
2652 qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change
,
2655 kvmppc_spapr_enable_inkernel_multitce();
2659 static int spapr_kvm_type(const char *vm_type
)
2665 if (!strcmp(vm_type
, "HV")) {
2669 if (!strcmp(vm_type
, "PR")) {
2673 error_report("Unknown kvm-type specified '%s'", vm_type
);
2678 * Implementation of an interface to adjust firmware path
2679 * for the bootindex property handling.
2681 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2684 #define CAST(type, obj, name) \
2685 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2686 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2687 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2688 VHostSCSICommon
*vsc
= CAST(VHostSCSICommon
, dev
, TYPE_VHOST_SCSI_COMMON
);
2691 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2692 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2693 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2697 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2698 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2699 * in the top 16 bits of the 64-bit LUN
2701 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2702 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2703 (uint64_t)id
<< 48);
2704 } else if (virtio
) {
2706 * We use SRP luns of the form 01000000 | (target << 8) | lun
2707 * in the top 32 bits of the 64-bit LUN
2708 * Note: the quote above is from SLOF and it is wrong,
2709 * the actual binding is:
2710 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2712 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2713 if (d
->lun
>= 256) {
2714 /* Use the LUN "flat space addressing method" */
2717 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2718 (uint64_t)id
<< 32);
2721 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2722 * in the top 32 bits of the 64-bit LUN
2724 unsigned usb_port
= atoi(usb
->port
->path
);
2725 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2726 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2727 (uint64_t)id
<< 32);
2732 * SLOF probes the USB devices, and if it recognizes that the device is a
2733 * storage device, it changes its name to "storage" instead of "usb-host",
2734 * and additionally adds a child node for the SCSI LUN, so the correct
2735 * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
2737 if (strcmp("usb-host", qdev_fw_name(dev
)) == 0) {
2738 USBDevice
*usbdev
= CAST(USBDevice
, dev
, TYPE_USB_DEVICE
);
2739 if (usb_host_dev_is_scsi_storage(usbdev
)) {
2740 return g_strdup_printf("storage@%s/disk", usbdev
->port
->path
);
2745 /* Replace "pci" with "pci@800000020000000" */
2746 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2750 /* Same logic as virtio above */
2751 unsigned id
= 0x1000000 | (vsc
->target
<< 16) | vsc
->lun
;
2752 return g_strdup_printf("disk@%"PRIX64
, (uint64_t)id
<< 32);
2755 if (g_str_equal("pci-bridge", qdev_fw_name(dev
))) {
2756 /* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
2757 PCIDevice
*pcidev
= CAST(PCIDevice
, dev
, TYPE_PCI_DEVICE
);
2758 return g_strdup_printf("pci@%x", PCI_SLOT(pcidev
->devfn
));
2764 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2766 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2768 return g_strdup(spapr
->kvm_type
);
2771 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2773 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2775 g_free(spapr
->kvm_type
);
2776 spapr
->kvm_type
= g_strdup(value
);
2779 static bool spapr_get_modern_hotplug_events(Object
*obj
, Error
**errp
)
2781 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2783 return spapr
->use_hotplug_event_source
;
2786 static void spapr_set_modern_hotplug_events(Object
*obj
, bool value
,
2789 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2791 spapr
->use_hotplug_event_source
= value
;
2794 static char *spapr_get_resize_hpt(Object
*obj
, Error
**errp
)
2796 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2798 switch (spapr
->resize_hpt
) {
2799 case SPAPR_RESIZE_HPT_DEFAULT
:
2800 return g_strdup("default");
2801 case SPAPR_RESIZE_HPT_DISABLED
:
2802 return g_strdup("disabled");
2803 case SPAPR_RESIZE_HPT_ENABLED
:
2804 return g_strdup("enabled");
2805 case SPAPR_RESIZE_HPT_REQUIRED
:
2806 return g_strdup("required");
2808 g_assert_not_reached();
2811 static void spapr_set_resize_hpt(Object
*obj
, const char *value
, Error
**errp
)
2813 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2815 if (strcmp(value
, "default") == 0) {
2816 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DEFAULT
;
2817 } else if (strcmp(value
, "disabled") == 0) {
2818 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2819 } else if (strcmp(value
, "enabled") == 0) {
2820 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_ENABLED
;
2821 } else if (strcmp(value
, "required") == 0) {
2822 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_REQUIRED
;
2824 error_setg(errp
, "Bad value for \"resize-hpt\" property");
2828 static void spapr_get_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
2829 void *opaque
, Error
**errp
)
2831 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
2834 static void spapr_set_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
2835 void *opaque
, Error
**errp
)
2837 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
2840 static void spapr_machine_initfn(Object
*obj
)
2842 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2844 spapr
->htab_fd
= -1;
2845 spapr
->use_hotplug_event_source
= true;
2846 object_property_add_str(obj
, "kvm-type",
2847 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2848 object_property_set_description(obj
, "kvm-type",
2849 "Specifies the KVM virtualization mode (HV, PR)",
2851 object_property_add_bool(obj
, "modern-hotplug-events",
2852 spapr_get_modern_hotplug_events
,
2853 spapr_set_modern_hotplug_events
,
2855 object_property_set_description(obj
, "modern-hotplug-events",
2856 "Use dedicated hotplug event mechanism in"
2857 " place of standard EPOW events when possible"
2858 " (required for memory hot-unplug support)",
2861 ppc_compat_add_property(obj
, "max-cpu-compat", &spapr
->max_compat_pvr
,
2862 "Maximum permitted CPU compatibility mode",
2865 object_property_add_str(obj
, "resize-hpt",
2866 spapr_get_resize_hpt
, spapr_set_resize_hpt
, NULL
);
2867 object_property_set_description(obj
, "resize-hpt",
2868 "Resizing of the Hash Page Table (enabled, disabled, required)",
2870 object_property_add(obj
, "vsmt", "uint32", spapr_get_vsmt
,
2871 spapr_set_vsmt
, NULL
, &spapr
->vsmt
, &error_abort
);
2872 object_property_set_description(obj
, "vsmt",
2873 "Virtual SMT: KVM behaves as if this were"
2874 " the host's SMT mode", &error_abort
);
2877 static void spapr_machine_finalizefn(Object
*obj
)
2879 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2881 g_free(spapr
->kvm_type
);
2884 void spapr_do_system_reset_on_cpu(CPUState
*cs
, run_on_cpu_data arg
)
2886 cpu_synchronize_state(cs
);
2887 ppc_cpu_do_system_reset(cs
);
2890 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2895 async_run_on_cpu(cs
, spapr_do_system_reset_on_cpu
, RUN_ON_CPU_NULL
);
2899 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr_start
, uint64_t size
,
2900 uint32_t node
, bool dedicated_hp_event_source
,
2903 sPAPRDRConnector
*drc
;
2904 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2905 int i
, fdt_offset
, fdt_size
;
2907 uint64_t addr
= addr_start
;
2908 bool hotplugged
= spapr_drc_hotplugged(dev
);
2909 Error
*local_err
= NULL
;
2911 for (i
= 0; i
< nr_lmbs
; i
++) {
2912 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2913 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
2916 fdt
= create_device_tree(&fdt_size
);
2917 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2918 SPAPR_MEMORY_BLOCK_SIZE
);
2920 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
2922 while (addr
> addr_start
) {
2923 addr
-= SPAPR_MEMORY_BLOCK_SIZE
;
2924 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2925 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
2926 spapr_drc_detach(drc
);
2929 error_propagate(errp
, local_err
);
2933 spapr_drc_reset(drc
);
2935 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2937 /* send hotplug notification to the
2938 * guest only in case of hotplugged memory
2941 if (dedicated_hp_event_source
) {
2942 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2943 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
2944 spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2946 spapr_drc_index(drc
));
2948 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2954 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2955 uint32_t node
, Error
**errp
)
2957 Error
*local_err
= NULL
;
2958 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2959 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2960 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2962 uint64_t align
, size
, addr
;
2964 mr
= ddc
->get_memory_region(dimm
, &local_err
);
2968 align
= memory_region_get_alignment(mr
);
2969 size
= memory_region_size(mr
);
2971 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2976 addr
= object_property_get_uint(OBJECT(dimm
),
2977 PC_DIMM_ADDR_PROP
, &local_err
);
2982 spapr_add_lmbs(dev
, addr
, size
, node
,
2983 spapr_ovec_test(ms
->ov5_cas
, OV5_HP_EVT
),
2992 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2994 error_propagate(errp
, local_err
);
2997 static void spapr_memory_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3000 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3001 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3006 mr
= ddc
->get_memory_region(dimm
, errp
);
3010 size
= memory_region_size(mr
);
3012 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
3013 error_setg(errp
, "Hotplugged memory size must be a multiple of "
3014 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
3018 mem_dev
= object_property_get_str(OBJECT(dimm
), PC_DIMM_MEMDEV_PROP
, NULL
);
3019 if (mem_dev
&& !kvmppc_is_mem_backend_page_size_ok(mem_dev
)) {
3020 error_setg(errp
, "Memory backend has bad page size. "
3021 "Use 'memory-backend-file' with correct mem-path.");
3029 struct sPAPRDIMMState
{
3032 QTAILQ_ENTRY(sPAPRDIMMState
) next
;
3035 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_find(sPAPRMachineState
*s
,
3038 sPAPRDIMMState
*dimm_state
= NULL
;
3040 QTAILQ_FOREACH(dimm_state
, &s
->pending_dimm_unplugs
, next
) {
3041 if (dimm_state
->dimm
== dimm
) {
3048 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_add(sPAPRMachineState
*spapr
,
3052 sPAPRDIMMState
*ds
= NULL
;
3055 * If this request is for a DIMM whose removal had failed earlier
3056 * (due to guest's refusal to remove the LMBs), we would have this
3057 * dimm already in the pending_dimm_unplugs list. In that
3058 * case don't add again.
3060 ds
= spapr_pending_dimm_unplugs_find(spapr
, dimm
);
3062 ds
= g_malloc0(sizeof(sPAPRDIMMState
));
3063 ds
->nr_lmbs
= nr_lmbs
;
3065 QTAILQ_INSERT_HEAD(&spapr
->pending_dimm_unplugs
, ds
, next
);
3070 static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState
*spapr
,
3071 sPAPRDIMMState
*dimm_state
)
3073 QTAILQ_REMOVE(&spapr
->pending_dimm_unplugs
, dimm_state
, next
);
3077 static sPAPRDIMMState
*spapr_recover_pending_dimm_state(sPAPRMachineState
*ms
,
3080 sPAPRDRConnector
*drc
;
3081 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3082 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3083 uint64_t size
= memory_region_size(mr
);
3084 uint32_t nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3085 uint32_t avail_lmbs
= 0;
3086 uint64_t addr_start
, addr
;
3089 addr_start
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3093 for (i
= 0; i
< nr_lmbs
; i
++) {
3094 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3095 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3100 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3103 return spapr_pending_dimm_unplugs_add(ms
, avail_lmbs
, dimm
);
3106 /* Callback to be called during DRC release. */
3107 void spapr_lmb_release(DeviceState
*dev
)
3109 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_hotplug_handler(dev
));
3110 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3111 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3112 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3113 sPAPRDIMMState
*ds
= spapr_pending_dimm_unplugs_find(spapr
, PC_DIMM(dev
));
3115 /* This information will get lost if a migration occurs
3116 * during the unplug process. In this case recover it. */
3118 ds
= spapr_recover_pending_dimm_state(spapr
, PC_DIMM(dev
));
3120 /* The DRC being examined by the caller at least must be counted */
3121 g_assert(ds
->nr_lmbs
);
3124 if (--ds
->nr_lmbs
) {
3129 * Now that all the LMBs have been removed by the guest, call the
3130 * pc-dimm unplug handler to cleanup up the pc-dimm device.
3132 pc_dimm_memory_unplug(dev
, &spapr
->hotplug_memory
, mr
);
3133 object_unparent(OBJECT(dev
));
3134 spapr_pending_dimm_unplugs_remove(spapr
, ds
);
3137 static void spapr_memory_unplug_request(HotplugHandler
*hotplug_dev
,
3138 DeviceState
*dev
, Error
**errp
)
3140 sPAPRMachineState
*spapr
= SPAPR_MACHINE(hotplug_dev
);
3141 Error
*local_err
= NULL
;
3142 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3143 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3146 uint64_t size
, addr_start
, addr
;
3148 sPAPRDRConnector
*drc
;
3150 mr
= ddc
->get_memory_region(dimm
, &local_err
);
3154 size
= memory_region_size(mr
);
3155 nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3157 addr_start
= object_property_get_uint(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3164 * An existing pending dimm state for this DIMM means that there is an
3165 * unplug operation in progress, waiting for the spapr_lmb_release
3166 * callback to complete the job (BQL can't cover that far). In this case,
3167 * bail out to avoid detaching DRCs that were already released.
3169 if (spapr_pending_dimm_unplugs_find(spapr
, dimm
)) {
3170 error_setg(&local_err
,
3171 "Memory unplug already in progress for device %s",
3176 spapr_pending_dimm_unplugs_add(spapr
, nr_lmbs
, dimm
);
3179 for (i
= 0; i
< nr_lmbs
; i
++) {
3180 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3181 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3184 spapr_drc_detach(drc
);
3185 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3188 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3189 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
3190 spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3191 nr_lmbs
, spapr_drc_index(drc
));
3193 error_propagate(errp
, local_err
);
3196 static void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
3197 sPAPRMachineState
*spapr
)
3199 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3200 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
3201 int id
= spapr_vcpu_id(cpu
);
3203 int offset
, fdt_size
;
3206 fdt
= create_device_tree(&fdt_size
);
3207 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
3208 offset
= fdt_add_subnode(fdt
, 0, nodename
);
3210 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
3213 *fdt_offset
= offset
;
3217 /* Callback to be called during DRC release. */
3218 void spapr_core_release(DeviceState
*dev
)
3220 MachineState
*ms
= MACHINE(qdev_get_hotplug_handler(dev
));
3221 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3222 CPUCore
*cc
= CPU_CORE(dev
);
3223 CPUArchId
*core_slot
= spapr_find_cpu_slot(ms
, cc
->core_id
, NULL
);
3225 if (smc
->pre_2_10_has_unused_icps
) {
3226 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
3227 sPAPRCPUCoreClass
*scc
= SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc
));
3228 size_t size
= object_type_get_instance_size(scc
->cpu_type
);
3231 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3232 CPUState
*cs
= CPU(sc
->threads
+ i
* size
);
3234 pre_2_10_vmstate_register_dummy_icp(cs
->cpu_index
);
3239 core_slot
->cpu
= NULL
;
3240 object_unparent(OBJECT(dev
));
3244 void spapr_core_unplug_request(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3248 sPAPRDRConnector
*drc
;
3249 CPUCore
*cc
= CPU_CORE(dev
);
3250 int smt
= kvmppc_smt_threads();
3252 if (!spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
)) {
3253 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3258 error_setg(errp
, "Boot CPU core may not be unplugged");
3262 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
* smt
);
3265 spapr_drc_detach(drc
);
3267 spapr_hotplug_req_remove_by_index(drc
);
3270 static void spapr_core_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3273 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3274 MachineClass
*mc
= MACHINE_GET_CLASS(spapr
);
3275 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3276 sPAPRCPUCore
*core
= SPAPR_CPU_CORE(OBJECT(dev
));
3277 CPUCore
*cc
= CPU_CORE(dev
);
3278 CPUState
*cs
= CPU(core
->threads
);
3279 sPAPRDRConnector
*drc
;
3280 Error
*local_err
= NULL
;
3281 int smt
= kvmppc_smt_threads();
3282 CPUArchId
*core_slot
;
3284 bool hotplugged
= spapr_drc_hotplugged(dev
);
3286 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3288 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3292 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
* smt
);
3294 g_assert(drc
|| !mc
->has_hotpluggable_cpus
);
3300 fdt
= spapr_populate_hotplug_cpu_dt(cs
, &fdt_offset
, spapr
);
3302 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
3305 error_propagate(errp
, local_err
);
3311 * Send hotplug notification interrupt to the guest only
3312 * in case of hotplugged CPUs.
3314 spapr_hotplug_req_add_by_index(drc
);
3316 spapr_drc_reset(drc
);
3320 core_slot
->cpu
= OBJECT(dev
);
3322 if (smc
->pre_2_10_has_unused_icps
) {
3323 sPAPRCPUCoreClass
*scc
= SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc
));
3324 size_t size
= object_type_get_instance_size(scc
->cpu_type
);
3327 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3328 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(dev
);
3329 void *obj
= sc
->threads
+ i
* size
;
3332 pre_2_10_vmstate_unregister_dummy_icp(cs
->cpu_index
);
3337 static void spapr_core_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3340 MachineState
*machine
= MACHINE(OBJECT(hotplug_dev
));
3341 MachineClass
*mc
= MACHINE_GET_CLASS(hotplug_dev
);
3342 Error
*local_err
= NULL
;
3343 CPUCore
*cc
= CPU_CORE(dev
);
3344 const char *base_core_type
= spapr_get_cpu_core_type(machine
->cpu_type
);
3345 const char *type
= object_get_typename(OBJECT(dev
));
3346 CPUArchId
*core_slot
;
3349 if (dev
->hotplugged
&& !mc
->has_hotpluggable_cpus
) {
3350 error_setg(&local_err
, "CPU hotplug not supported for this machine");
3354 if (strcmp(base_core_type
, type
)) {
3355 error_setg(&local_err
, "CPU core type should be %s", base_core_type
);
3359 if (cc
->core_id
% smp_threads
) {
3360 error_setg(&local_err
, "invalid core id %d", cc
->core_id
);
3365 * In general we should have homogeneous threads-per-core, but old
3366 * (pre hotplug support) machine types allow the last core to have
3367 * reduced threads as a compatibility hack for when we allowed
3368 * total vcpus not a multiple of threads-per-core.
3370 if (mc
->has_hotpluggable_cpus
&& (cc
->nr_threads
!= smp_threads
)) {
3371 error_setg(&local_err
, "invalid nr-threads %d, must be %d",
3372 cc
->nr_threads
, smp_threads
);
3376 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3378 error_setg(&local_err
, "core id %d out of range", cc
->core_id
);
3382 if (core_slot
->cpu
) {
3383 error_setg(&local_err
, "core %d already populated", cc
->core_id
);
3387 numa_cpu_pre_plug(core_slot
, dev
, &local_err
);
3390 error_propagate(errp
, local_err
);
3393 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
3394 DeviceState
*dev
, Error
**errp
)
3396 MachineState
*ms
= MACHINE(hotplug_dev
);
3397 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3399 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3402 if (!smc
->dr_lmb_enabled
) {
3403 error_setg(errp
, "Memory hotplug not supported for this machine");
3406 node
= object_property_get_uint(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
3410 if (node
< 0 || node
>= MAX_NODES
) {
3411 error_setg(errp
, "Invaild node %d", node
);
3416 * Currently PowerPC kernel doesn't allow hot-adding memory to
3417 * memory-less node, but instead will silently add the memory
3418 * to the first node that has some memory. This causes two
3419 * unexpected behaviours for the user.
3421 * - Memory gets hotplugged to a different node than what the user
3423 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
3424 * to memory-less node, a reboot will set things accordingly
3425 * and the previously hotplugged memory now ends in the right node.
3426 * This appears as if some memory moved from one node to another.
3428 * So until kernel starts supporting memory hotplug to memory-less
3429 * nodes, just prevent such attempts upfront in QEMU.
3431 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
3432 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
3437 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
3438 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3439 spapr_core_plug(hotplug_dev
, dev
, errp
);
3443 static void spapr_machine_device_unplug_request(HotplugHandler
*hotplug_dev
,
3444 DeviceState
*dev
, Error
**errp
)
3446 sPAPRMachineState
*sms
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3447 MachineClass
*mc
= MACHINE_GET_CLASS(sms
);
3449 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3450 if (spapr_ovec_test(sms
->ov5_cas
, OV5_HP_EVT
)) {
3451 spapr_memory_unplug_request(hotplug_dev
, dev
, errp
);
3453 /* NOTE: this means there is a window after guest reset, prior to
3454 * CAS negotiation, where unplug requests will fail due to the
3455 * capability not being detected yet. This is a bit different than
3456 * the case with PCI unplug, where the events will be queued and
3457 * eventually handled by the guest after boot
3459 error_setg(errp
, "Memory hot unplug not supported for this guest");
3461 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3462 if (!mc
->has_hotpluggable_cpus
) {
3463 error_setg(errp
, "CPU hot unplug not supported on this machine");
3466 spapr_core_unplug_request(hotplug_dev
, dev
, errp
);
3470 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
3471 DeviceState
*dev
, Error
**errp
)
3473 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3474 spapr_memory_pre_plug(hotplug_dev
, dev
, errp
);
3475 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3476 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
3480 static HotplugHandler
*spapr_get_hotplug_handler(MachineState
*machine
,
3483 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
3484 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3485 return HOTPLUG_HANDLER(machine
);
3490 static CpuInstanceProperties
3491 spapr_cpu_index_to_props(MachineState
*machine
, unsigned cpu_index
)
3493 CPUArchId
*core_slot
;
3494 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3496 /* make sure possible_cpu are intialized */
3497 mc
->possible_cpu_arch_ids(machine
);
3498 /* get CPU core slot containing thread that matches cpu_index */
3499 core_slot
= spapr_find_cpu_slot(machine
, cpu_index
, NULL
);
3501 return core_slot
->props
;
3504 static int64_t spapr_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
3506 return idx
/ smp_cores
% nb_numa_nodes
;
3509 static const CPUArchIdList
*spapr_possible_cpu_arch_ids(MachineState
*machine
)
3512 int spapr_max_cores
= max_cpus
/ smp_threads
;
3513 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3515 if (!mc
->has_hotpluggable_cpus
) {
3516 spapr_max_cores
= QEMU_ALIGN_UP(smp_cpus
, smp_threads
) / smp_threads
;
3518 if (machine
->possible_cpus
) {
3519 assert(machine
->possible_cpus
->len
== spapr_max_cores
);
3520 return machine
->possible_cpus
;
3523 machine
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
3524 sizeof(CPUArchId
) * spapr_max_cores
);
3525 machine
->possible_cpus
->len
= spapr_max_cores
;
3526 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
3527 int core_id
= i
* smp_threads
;
3529 machine
->possible_cpus
->cpus
[i
].vcpus_count
= smp_threads
;
3530 machine
->possible_cpus
->cpus
[i
].arch_id
= core_id
;
3531 machine
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
3532 machine
->possible_cpus
->cpus
[i
].props
.core_id
= core_id
;
3534 return machine
->possible_cpus
;
3537 static void spapr_phb_placement(sPAPRMachineState
*spapr
, uint32_t index
,
3538 uint64_t *buid
, hwaddr
*pio
,
3539 hwaddr
*mmio32
, hwaddr
*mmio64
,
3540 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
3543 * New-style PHB window placement.
3545 * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
3546 * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
3549 * Some guest kernels can't work with MMIO windows above 1<<46
3550 * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
3552 * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
3553 * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
3554 * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
3555 * 1TiB 64-bit MMIO windows for each PHB.
3557 const uint64_t base_buid
= 0x800000020000000ULL
;
3558 #define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
3559 SPAPR_PCI_MEM64_WIN_SIZE - 1)
3562 /* Sanity check natural alignments */
3563 QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3564 QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3565 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE
% SPAPR_PCI_MEM32_WIN_SIZE
) != 0);
3566 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE
% SPAPR_PCI_IO_WIN_SIZE
) != 0);
3567 /* Sanity check bounds */
3568 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_IO_WIN_SIZE
) >
3569 SPAPR_PCI_MEM32_WIN_SIZE
);
3570 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_MEM32_WIN_SIZE
) >
3571 SPAPR_PCI_MEM64_WIN_SIZE
);
3573 if (index
>= SPAPR_MAX_PHBS
) {
3574 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %llu)",
3575 SPAPR_MAX_PHBS
- 1);
3579 *buid
= base_buid
+ index
;
3580 for (i
= 0; i
< n_dma
; ++i
) {
3581 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
3584 *pio
= SPAPR_PCI_BASE
+ index
* SPAPR_PCI_IO_WIN_SIZE
;
3585 *mmio32
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM32_WIN_SIZE
;
3586 *mmio64
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM64_WIN_SIZE
;
3589 static ICSState
*spapr_ics_get(XICSFabric
*dev
, int irq
)
3591 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3593 return ics_valid_irq(spapr
->ics
, irq
) ? spapr
->ics
: NULL
;
3596 static void spapr_ics_resend(XICSFabric
*dev
)
3598 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3600 ics_resend(spapr
->ics
);
3603 static ICPState
*spapr_icp_get(XICSFabric
*xi
, int vcpu_id
)
3605 PowerPCCPU
*cpu
= spapr_find_cpu(vcpu_id
);
3607 return cpu
? ICP(cpu
->intc
) : NULL
;
3610 static void spapr_pic_print_info(InterruptStatsProvider
*obj
,
3613 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
3617 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3619 icp_pic_print_info(ICP(cpu
->intc
), mon
);
3622 ics_pic_print_info(spapr
->ics
, mon
);
3625 int spapr_vcpu_id(PowerPCCPU
*cpu
)
3627 CPUState
*cs
= CPU(cpu
);
3629 if (kvm_enabled()) {
3630 return kvm_arch_vcpu_id(cs
);
3632 return cs
->cpu_index
;
3636 PowerPCCPU
*spapr_find_cpu(int vcpu_id
)
3641 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3643 if (spapr_vcpu_id(cpu
) == vcpu_id
) {
3651 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
3653 MachineClass
*mc
= MACHINE_CLASS(oc
);
3654 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
3655 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
3656 NMIClass
*nc
= NMI_CLASS(oc
);
3657 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
3658 PPCVirtualHypervisorClass
*vhc
= PPC_VIRTUAL_HYPERVISOR_CLASS(oc
);
3659 XICSFabricClass
*xic
= XICS_FABRIC_CLASS(oc
);
3660 InterruptStatsProviderClass
*ispc
= INTERRUPT_STATS_PROVIDER_CLASS(oc
);
3662 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
3665 * We set up the default / latest behaviour here. The class_init
3666 * functions for the specific versioned machine types can override
3667 * these details for backwards compatibility
3669 mc
->init
= ppc_spapr_init
;
3670 mc
->reset
= ppc_spapr_reset
;
3671 mc
->block_default_type
= IF_SCSI
;
3672 mc
->max_cpus
= 1024;
3673 mc
->no_parallel
= 1;
3674 mc
->default_boot_order
= "";
3675 mc
->default_ram_size
= 512 * M_BYTE
;
3676 mc
->kvm_type
= spapr_kvm_type
;
3677 mc
->has_dynamic_sysbus
= true;
3678 mc
->pci_allow_0_address
= true;
3679 mc
->get_hotplug_handler
= spapr_get_hotplug_handler
;
3680 hc
->pre_plug
= spapr_machine_device_pre_plug
;
3681 hc
->plug
= spapr_machine_device_plug
;
3682 mc
->cpu_index_to_instance_props
= spapr_cpu_index_to_props
;
3683 mc
->get_default_cpu_node_id
= spapr_get_default_cpu_node_id
;
3684 mc
->possible_cpu_arch_ids
= spapr_possible_cpu_arch_ids
;
3685 hc
->unplug_request
= spapr_machine_device_unplug_request
;
3687 smc
->dr_lmb_enabled
= true;
3688 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power8_v2.0");
3689 mc
->has_hotpluggable_cpus
= true;
3690 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_ENABLED
;
3691 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
3692 nc
->nmi_monitor_handler
= spapr_nmi
;
3693 smc
->phb_placement
= spapr_phb_placement
;
3694 vhc
->hypercall
= emulate_spapr_hypercall
;
3695 vhc
->hpt_mask
= spapr_hpt_mask
;
3696 vhc
->map_hptes
= spapr_map_hptes
;
3697 vhc
->unmap_hptes
= spapr_unmap_hptes
;
3698 vhc
->store_hpte
= spapr_store_hpte
;
3699 vhc
->get_patbe
= spapr_get_patbe
;
3700 vhc
->encode_hpt_for_kvm_pr
= spapr_encode_hpt_for_kvm_pr
;
3701 xic
->ics_get
= spapr_ics_get
;
3702 xic
->ics_resend
= spapr_ics_resend
;
3703 xic
->icp_get
= spapr_icp_get
;
3704 ispc
->print_info
= spapr_pic_print_info
;
3705 /* Force NUMA node memory size to be a multiple of
3706 * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
3707 * in which LMBs are represented and hot-added
3709 mc
->numa_mem_align_shift
= 28;
3711 smc
->default_caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_OFF
;
3712 smc
->default_caps
.caps
[SPAPR_CAP_VSX
] = SPAPR_CAP_ON
;
3713 smc
->default_caps
.caps
[SPAPR_CAP_DFP
] = SPAPR_CAP_ON
;
3714 smc
->default_caps
.caps
[SPAPR_CAP_CFPC
] = SPAPR_CAP_BROKEN
;
3715 smc
->default_caps
.caps
[SPAPR_CAP_SBBC
] = SPAPR_CAP_BROKEN
;
3716 spapr_caps_add_properties(smc
, &error_abort
);
3719 static const TypeInfo spapr_machine_info
= {
3720 .name
= TYPE_SPAPR_MACHINE
,
3721 .parent
= TYPE_MACHINE
,
3723 .instance_size
= sizeof(sPAPRMachineState
),
3724 .instance_init
= spapr_machine_initfn
,
3725 .instance_finalize
= spapr_machine_finalizefn
,
3726 .class_size
= sizeof(sPAPRMachineClass
),
3727 .class_init
= spapr_machine_class_init
,
3728 .interfaces
= (InterfaceInfo
[]) {
3729 { TYPE_FW_PATH_PROVIDER
},
3731 { TYPE_HOTPLUG_HANDLER
},
3732 { TYPE_PPC_VIRTUAL_HYPERVISOR
},
3733 { TYPE_XICS_FABRIC
},
3734 { TYPE_INTERRUPT_STATS_PROVIDER
},
3739 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
3740 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
3743 MachineClass *mc = MACHINE_CLASS(oc); \
3744 spapr_machine_##suffix##_class_options(mc); \
3746 mc->alias = "pseries"; \
3747 mc->is_default = 1; \
3750 static void spapr_machine_##suffix##_instance_init(Object *obj) \
3752 MachineState *machine = MACHINE(obj); \
3753 spapr_machine_##suffix##_instance_options(machine); \
3755 static const TypeInfo spapr_machine_##suffix##_info = { \
3756 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
3757 .parent = TYPE_SPAPR_MACHINE, \
3758 .class_init = spapr_machine_##suffix##_class_init, \
3759 .instance_init = spapr_machine_##suffix##_instance_init, \
3761 static void spapr_machine_register_##suffix(void) \
3763 type_register(&spapr_machine_##suffix##_info); \
3765 type_init(spapr_machine_register_##suffix)
3770 static void spapr_machine_2_12_instance_options(MachineState
*machine
)
3774 static void spapr_machine_2_12_class_options(MachineClass
*mc
)
3776 /* Defaults for the latest behaviour inherited from the base class */
3779 DEFINE_SPAPR_MACHINE(2_12
, "2.12", true);
3784 #define SPAPR_COMPAT_2_11 \
3787 static void spapr_machine_2_11_instance_options(MachineState
*machine
)
3789 spapr_machine_2_12_instance_options(machine
);
3792 static void spapr_machine_2_11_class_options(MachineClass
*mc
)
3794 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3796 spapr_machine_2_12_class_options(mc
);
3797 smc
->default_caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_ON
;
3798 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_11
);
3801 DEFINE_SPAPR_MACHINE(2_11
, "2.11", false);
3806 #define SPAPR_COMPAT_2_10 \
3809 static void spapr_machine_2_10_instance_options(MachineState
*machine
)
3811 spapr_machine_2_11_instance_options(machine
);
3814 static void spapr_machine_2_10_class_options(MachineClass
*mc
)
3816 spapr_machine_2_11_class_options(mc
);
3817 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_10
);
3820 DEFINE_SPAPR_MACHINE(2_10
, "2.10", false);
3825 #define SPAPR_COMPAT_2_9 \
3828 .driver = TYPE_POWERPC_CPU, \
3829 .property = "pre-2.10-migration", \
3833 static void spapr_machine_2_9_instance_options(MachineState *machine)
3835 spapr_machine_2_10_instance_options(machine
);
3838 static void spapr_machine_2_9_class_options(MachineClass
*mc
)
3840 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3842 spapr_machine_2_10_class_options(mc
);
3843 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_9
);
3844 mc
->numa_auto_assign_ram
= numa_legacy_auto_assign_ram
;
3845 smc
->pre_2_10_has_unused_icps
= true;
3846 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_DISABLED
;
3849 DEFINE_SPAPR_MACHINE(2_9
, "2.9", false);
3854 #define SPAPR_COMPAT_2_8 \
3857 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3858 .property = "pcie-extended-configuration-space", \
3862 static void spapr_machine_2_8_instance_options(MachineState
*machine
)
3864 spapr_machine_2_9_instance_options(machine
);
3867 static void spapr_machine_2_8_class_options(MachineClass
*mc
)
3869 spapr_machine_2_9_class_options(mc
);
3870 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_8
);
3871 mc
->numa_mem_align_shift
= 23;
3874 DEFINE_SPAPR_MACHINE(2_8
, "2.8", false);
3879 #define SPAPR_COMPAT_2_7 \
3882 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3883 .property = "mem_win_size", \
3884 .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
3887 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3888 .property = "mem64_win_size", \
3892 .driver = TYPE_POWERPC_CPU, \
3893 .property = "pre-2.8-migration", \
3897 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3898 .property = "pre-2.8-migration", \
3902 static void phb_placement_2_7(sPAPRMachineState
*spapr
, uint32_t index
,
3903 uint64_t *buid
, hwaddr
*pio
,
3904 hwaddr
*mmio32
, hwaddr
*mmio64
,
3905 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
3907 /* Legacy PHB placement for pseries-2.7 and earlier machine types */
3908 const uint64_t base_buid
= 0x800000020000000ULL
;
3909 const hwaddr phb_spacing
= 0x1000000000ULL
; /* 64 GiB */
3910 const hwaddr mmio_offset
= 0xa0000000; /* 2 GiB + 512 MiB */
3911 const hwaddr pio_offset
= 0x80000000; /* 2 GiB */
3912 const uint32_t max_index
= 255;
3913 const hwaddr phb0_alignment
= 0x10000000000ULL
; /* 1 TiB */
3915 uint64_t ram_top
= MACHINE(spapr
)->ram_size
;
3916 hwaddr phb0_base
, phb_base
;
3919 /* Do we have hotpluggable memory? */
3920 if (MACHINE(spapr
)->maxram_size
> ram_top
) {
3921 /* Can't just use maxram_size, because there may be an
3922 * alignment gap between normal and hotpluggable memory
3924 ram_top
= spapr
->hotplug_memory
.base
+
3925 memory_region_size(&spapr
->hotplug_memory
.mr
);
3928 phb0_base
= QEMU_ALIGN_UP(ram_top
, phb0_alignment
);
3930 if (index
> max_index
) {
3931 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %u)",
3936 *buid
= base_buid
+ index
;
3937 for (i
= 0; i
< n_dma
; ++i
) {
3938 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
3941 phb_base
= phb0_base
+ index
* phb_spacing
;
3942 *pio
= phb_base
+ pio_offset
;
3943 *mmio32
= phb_base
+ mmio_offset
;
3945 * We don't set the 64-bit MMIO window, relying on the PHB's
3946 * fallback behaviour of automatically splitting a large "32-bit"
3947 * window into contiguous 32-bit and 64-bit windows
3951 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
3953 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
3955 spapr_machine_2_8_instance_options(machine
);
3956 spapr
->use_hotplug_event_source
= false;
3959 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
3961 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3963 spapr_machine_2_8_class_options(mc
);
3964 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power7_v2.3");
3965 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_7
);
3966 smc
->phb_placement
= phb_placement_2_7
;
3969 DEFINE_SPAPR_MACHINE(2_7
, "2.7", false);
3974 #define SPAPR_COMPAT_2_6 \
3977 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
3979 .value = stringify(off),\
3982 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
3984 spapr_machine_2_7_instance_options(machine
);
3987 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
3989 spapr_machine_2_7_class_options(mc
);
3990 mc
->has_hotpluggable_cpus
= false;
3991 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
3994 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
3999 #define SPAPR_COMPAT_2_5 \
4002 .driver = "spapr-vlan", \
4003 .property = "use-rx-buffer-pools", \
4007 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
4009 spapr_machine_2_6_instance_options(machine
);
4012 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
4014 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4016 spapr_machine_2_6_class_options(mc
);
4017 smc
->use_ohci_by_default
= true;
4018 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
4021 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
4026 #define SPAPR_COMPAT_2_4 \
4029 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
4031 spapr_machine_2_5_instance_options(machine
);
4034 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
4036 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4038 spapr_machine_2_5_class_options(mc
);
4039 smc
->dr_lmb_enabled
= false;
4040 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
4043 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
4048 #define SPAPR_COMPAT_2_3 \
4051 .driver = "spapr-pci-host-bridge",\
4052 .property = "dynamic-reconfiguration",\
4056 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
4058 spapr_machine_2_4_instance_options(machine
);
4061 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
4063 spapr_machine_2_4_class_options(mc
);
4064 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
4066 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
4072 #define SPAPR_COMPAT_2_2 \
4075 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
4076 .property = "mem_win_size",\
4077 .value = "0x20000000",\
4080 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
4082 spapr_machine_2_3_instance_options(machine
);
4083 machine
->suppress_vmdesc
= true;
4086 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
4088 spapr_machine_2_3_class_options(mc
);
4089 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
4091 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
4096 #define SPAPR_COMPAT_2_1 \
4099 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
4101 spapr_machine_2_2_instance_options(machine
);
4104 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
4106 spapr_machine_2_2_class_options(mc
);
4107 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
4109 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
4111 static void spapr_machine_register_types(void)
4113 type_register_static(&spapr_machine_info
);
4116 type_init(spapr_machine_register_types
)