2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
31 #include "sysemu/blockdev.h"
32 #include "sysemu/cpus.h"
33 #include "sysemu/kvm.h"
35 #include "mmu-hash64.h"
37 #include "hw/boards.h"
38 #include "hw/ppc/ppc.h"
39 #include "hw/loader.h"
41 #include "hw/ppc/spapr.h"
42 #include "hw/ppc/spapr_vio.h"
43 #include "hw/pci-host/spapr.h"
44 #include "hw/ppc/xics.h"
45 #include "hw/pci/msi.h"
47 #include "hw/pci/pci.h"
49 #include "exec/address-spaces.h"
51 #include "qemu/config-file.h"
52 #include "qemu/error-report.h"
56 /* SLOF memory layout:
58 * SLOF raw image loaded at 0, copies its romfs right below the flat
59 * device-tree, then position SLOF itself 31M below that
61 * So we set FW_OVERHEAD to 40MB which should account for all of that
64 * We load our kernel at 4M, leaving space for SLOF initial image
66 #define FDT_MAX_SIZE 0x40000
67 #define RTAS_MAX_SIZE 0x10000
68 #define FW_MAX_SIZE 0x400000
69 #define FW_FILE_NAME "slof.bin"
70 #define FW_OVERHEAD 0x2800000
71 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
73 #define MIN_RMA_SLOF 128UL
75 #define TIMEBASE_FREQ 512000000ULL
78 #define XICS_IRQS 1024
80 #define PHANDLE_XICP 0x00001111
82 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
84 sPAPREnvironment
*spapr
;
86 int spapr_allocate_irq(int hint
, bool lsi
)
92 if (hint
>= spapr
->next_irq
) {
93 spapr
->next_irq
= hint
+ 1;
95 /* FIXME: we should probably check for collisions somehow */
97 irq
= spapr
->next_irq
++;
100 /* Configure irq type */
101 if (!xics_get_qirq(spapr
->icp
, irq
)) {
105 xics_set_irq_type(spapr
->icp
, irq
, lsi
);
111 * Allocate block of consequtive IRQs, returns a number of the first.
112 * If msi==true, aligns the first IRQ number to num.
114 int spapr_allocate_irq_block(int num
, bool lsi
, bool msi
)
120 * MSIMesage::data is used for storing VIRQ so
121 * it has to be aligned to num to support multiple
122 * MSI vectors. MSI-X is not affected by this.
123 * The hint is used for the first IRQ, the rest should
124 * be allocated continuously.
127 assert((num
== 1) || (num
== 2) || (num
== 4) ||
128 (num
== 8) || (num
== 16) || (num
== 32));
129 hint
= (spapr
->next_irq
+ num
- 1) & ~(num
- 1);
132 for (i
= 0; i
< num
; ++i
) {
135 irq
= spapr_allocate_irq(hint
, lsi
);
145 /* If the above doesn't create a consecutive block then that's
147 assert(irq
== (first
+ i
));
153 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
158 dev
= qdev_create(NULL
, type
);
159 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
160 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
161 if (qdev_init(dev
) < 0) {
165 return XICS_COMMON(dev
);
168 static XICSState
*xics_system_init(int nr_servers
, int nr_irqs
)
170 XICSState
*icp
= NULL
;
173 QemuOpts
*machine_opts
= qemu_get_machine_opts();
174 bool irqchip_allowed
= qemu_opt_get_bool(machine_opts
,
175 "kernel_irqchip", true);
176 bool irqchip_required
= qemu_opt_get_bool(machine_opts
,
177 "kernel_irqchip", false);
178 if (irqchip_allowed
) {
179 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
);
182 if (irqchip_required
&& !icp
) {
183 perror("Failed to create in-kernel XICS\n");
189 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
);
193 perror("Failed to create XICS\n");
200 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
205 int smt
= kvmppc_smt_threads();
206 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
209 DeviceClass
*dc
= DEVICE_GET_CLASS(cpu
);
210 uint32_t associativity
[] = {cpu_to_be32(0x5),
214 cpu_to_be32(cpu
->numa_node
),
215 cpu_to_be32(cpu
->cpu_index
)};
217 if ((cpu
->cpu_index
% smt
) != 0) {
221 snprintf(cpu_model
, 32, "/cpus/%s@%x", dc
->fw_name
,
224 offset
= fdt_path_offset(fdt
, cpu_model
);
229 if (nb_numa_nodes
> 1) {
230 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
231 sizeof(associativity
));
237 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
238 pft_size_prop
, sizeof(pft_size_prop
));
247 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
250 size_t maxcells
= maxsize
/ sizeof(uint32_t);
254 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
255 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
257 if (!sps
->page_shift
) {
260 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
261 if (sps
->enc
[count
].page_shift
== 0) {
265 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
268 *(p
++) = cpu_to_be32(sps
->page_shift
);
269 *(p
++) = cpu_to_be32(sps
->slb_enc
);
270 *(p
++) = cpu_to_be32(count
);
271 for (j
= 0; j
< count
; j
++) {
272 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
273 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
277 return (p
- prop
) * sizeof(uint32_t);
284 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
285 #exp, fdt_strerror(ret)); \
291 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
295 const char *boot_device
,
296 const char *kernel_cmdline
,
301 uint32_t start_prop
= cpu_to_be32(initrd_base
);
302 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
303 char hypertas_prop
[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
304 "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk\0hcall-set-mode";
305 char qemu_hypertas_prop
[] = "hcall-memop1";
306 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
307 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
308 int i
, smt
= kvmppc_smt_threads();
309 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
311 fdt
= g_malloc0(FDT_MAX_SIZE
);
312 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
315 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
318 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
320 _FDT((fdt_finish_reservemap(fdt
)));
323 _FDT((fdt_begin_node(fdt
, "")));
324 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
325 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
326 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
328 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
329 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
332 _FDT((fdt_begin_node(fdt
, "chosen")));
334 /* Set Form1_affinity */
335 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
337 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
338 _FDT((fdt_property(fdt
, "linux,initrd-start",
339 &start_prop
, sizeof(start_prop
))));
340 _FDT((fdt_property(fdt
, "linux,initrd-end",
341 &end_prop
, sizeof(end_prop
))));
343 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
344 cpu_to_be64(kernel_size
) };
346 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
348 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
352 _FDT((fdt_property_string(fdt
, "qemu,boot-device", boot_device
)));
354 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
355 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
356 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
358 _FDT((fdt_end_node(fdt
)));
361 _FDT((fdt_begin_node(fdt
, "cpus")));
363 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
364 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
367 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
368 CPUPPCState
*env
= &cpu
->env
;
369 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
370 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
371 int index
= cs
->cpu_index
;
372 uint32_t servers_prop
[smp_threads
];
373 uint32_t gservers_prop
[smp_threads
* 2];
375 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
376 0xffffffff, 0xffffffff};
377 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
378 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
379 uint32_t page_sizes_prop
[64];
380 size_t page_sizes_prop_size
;
382 if ((index
% smt
) != 0) {
386 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
388 _FDT((fdt_begin_node(fdt
, nodename
)));
392 _FDT((fdt_property_cell(fdt
, "reg", index
)));
393 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
395 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
396 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
397 env
->dcache_line_size
)));
398 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
399 env
->dcache_line_size
)));
400 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
401 env
->icache_line_size
)));
402 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
403 env
->icache_line_size
)));
405 if (pcc
->l1_dcache_size
) {
406 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
408 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
410 if (pcc
->l1_icache_size
) {
411 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
413 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
416 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
417 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
418 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
419 _FDT((fdt_property_string(fdt
, "status", "okay")));
420 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
422 /* Build interrupt servers and gservers properties */
423 for (i
= 0; i
< smp_threads
; i
++) {
424 servers_prop
[i
] = cpu_to_be32(index
+ i
);
425 /* Hack, direct the group queues back to cpu 0 */
426 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
427 gservers_prop
[i
*2 + 1] = 0;
429 _FDT((fdt_property(fdt
, "ibm,ppc-interrupt-server#s",
430 servers_prop
, sizeof(servers_prop
))));
431 _FDT((fdt_property(fdt
, "ibm,ppc-interrupt-gserver#s",
432 gservers_prop
, sizeof(gservers_prop
))));
434 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
435 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
438 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
439 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
440 segs
, sizeof(segs
))));
443 /* Advertise VMX/VSX (vector extensions) if available
444 * 0 / no property == no vector extensions
445 * 1 == VMX / Altivec available
446 * 2 == VSX available */
447 if (env
->insns_flags
& PPC_ALTIVEC
) {
448 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
450 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
453 /* Advertise DFP (Decimal Floating Point) if available
454 * 0 / no property == no DFP
455 * 1 == DFP available */
456 if (env
->insns_flags2
& PPC2_DFP
) {
457 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
460 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
461 sizeof(page_sizes_prop
));
462 if (page_sizes_prop_size
) {
463 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
464 page_sizes_prop
, page_sizes_prop_size
)));
467 _FDT((fdt_end_node(fdt
)));
470 _FDT((fdt_end_node(fdt
)));
473 _FDT((fdt_begin_node(fdt
, "rtas")));
475 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas_prop
,
476 sizeof(hypertas_prop
))));
477 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas_prop
,
478 sizeof(qemu_hypertas_prop
))));
480 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
481 refpoints
, sizeof(refpoints
))));
483 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
485 _FDT((fdt_end_node(fdt
)));
487 /* interrupt controller */
488 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
490 _FDT((fdt_property_string(fdt
, "device_type",
491 "PowerPC-External-Interrupt-Presentation")));
492 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
493 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
494 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
495 interrupt_server_ranges_prop
,
496 sizeof(interrupt_server_ranges_prop
))));
497 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
498 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
499 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
501 _FDT((fdt_end_node(fdt
)));
504 _FDT((fdt_begin_node(fdt
, "vdevice")));
506 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
507 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
508 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
509 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
510 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
511 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
513 _FDT((fdt_end_node(fdt
)));
516 spapr_events_fdt_skel(fdt
, epow_irq
);
518 _FDT((fdt_end_node(fdt
))); /* close root node */
519 _FDT((fdt_finish(fdt
)));
524 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
526 uint32_t associativity
[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
527 cpu_to_be32(0x0), cpu_to_be32(0x0),
530 hwaddr node0_size
, mem_start
, node_size
;
531 uint64_t mem_reg_property
[2];
535 if (nb_numa_nodes
> 1 && node_mem
[0] < ram_size
) {
536 node0_size
= node_mem
[0];
538 node0_size
= ram_size
;
542 mem_reg_property
[0] = 0;
543 mem_reg_property
[1] = cpu_to_be64(spapr
->rma_size
);
544 off
= fdt_add_subnode(fdt
, 0, "memory@0");
546 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
547 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
548 sizeof(mem_reg_property
))));
549 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
550 sizeof(associativity
))));
553 if (node0_size
> spapr
->rma_size
) {
554 mem_reg_property
[0] = cpu_to_be64(spapr
->rma_size
);
555 mem_reg_property
[1] = cpu_to_be64(node0_size
- spapr
->rma_size
);
557 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, spapr
->rma_size
);
558 off
= fdt_add_subnode(fdt
, 0, mem_name
);
560 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
561 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
562 sizeof(mem_reg_property
))));
563 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
564 sizeof(associativity
))));
567 /* RAM: Node 1 and beyond */
568 mem_start
= node0_size
;
569 for (i
= 1; i
< nb_numa_nodes
; i
++) {
570 mem_reg_property
[0] = cpu_to_be64(mem_start
);
571 if (mem_start
>= ram_size
) {
574 node_size
= node_mem
[i
];
575 if (node_size
> ram_size
- mem_start
) {
576 node_size
= ram_size
- mem_start
;
579 mem_reg_property
[1] = cpu_to_be64(node_size
);
580 associativity
[3] = associativity
[4] = cpu_to_be32(i
);
581 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, mem_start
);
582 off
= fdt_add_subnode(fdt
, 0, mem_name
);
584 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
585 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
586 sizeof(mem_reg_property
))));
587 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
588 sizeof(associativity
))));
589 mem_start
+= node_size
;
595 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
604 fdt
= g_malloc(FDT_MAX_SIZE
);
606 /* open out the base tree into a temp buffer for the final tweaks */
607 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
609 ret
= spapr_populate_memory(spapr
, fdt
);
611 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
615 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
617 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
621 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
622 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
626 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
631 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
633 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
636 /* Advertise NUMA via ibm,associativity */
637 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
639 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
642 if (!spapr
->has_graphics
) {
643 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
646 _FDT((fdt_pack(fdt
)));
648 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
649 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
650 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
654 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
659 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
661 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
664 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
666 CPUPPCState
*env
= &cpu
->env
;
669 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
670 env
->gpr
[3] = H_PRIVILEGE
;
672 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
676 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
680 /* allocate hash page table. For now we always make this 16mb,
681 * later we should probably make it scale to the size of guest
684 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
687 /* Kernel handles htab, we don't need to allocate one */
688 spapr
->htab_shift
= shift
;
691 /* Allocate an htab if we don't yet have one */
692 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
696 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
699 /* Update the RMA size if necessary */
700 if (spapr
->vrma_adjust
) {
701 hwaddr node0_size
= (nb_numa_nodes
> 1) ? node_mem
[0] : ram_size
;
702 spapr
->rma_size
= kvmppc_rma_size(node0_size
, spapr
->htab_shift
);
706 static void ppc_spapr_reset(void)
708 PowerPCCPU
*first_ppc_cpu
;
710 /* Reset the hash table & recalc the RMA */
711 spapr_reset_htab(spapr
);
713 qemu_devices_reset();
716 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
719 /* Set up the entry state */
720 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
721 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
722 first_ppc_cpu
->env
.gpr
[5] = 0;
723 first_cpu
->halted
= 0;
724 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
728 static void spapr_cpu_reset(void *opaque
)
730 PowerPCCPU
*cpu
= opaque
;
731 CPUState
*cs
= CPU(cpu
);
732 CPUPPCState
*env
= &cpu
->env
;
736 /* All CPUs start halted. CPU0 is unhalted from the machine level
737 * reset code and the rest are explicitly started up by the guest
738 * using an RTAS call */
741 env
->spr
[SPR_HIOR
] = 0;
743 env
->external_htab
= (uint8_t *)spapr
->htab
;
745 env
->htab_mask
= HTAB_SIZE(spapr
) - 1;
746 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
747 (spapr
->htab_shift
- 18);
750 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
752 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
753 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
756 qdev_prop_set_drive_nofail(dev
, "drive", dinfo
->bdrv
);
759 qdev_init_nofail(dev
);
761 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
764 /* Returns whether we want to use VGA or not */
765 static int spapr_vga_init(PCIBus
*pci_bus
)
767 switch (vga_interface_type
) {
770 return pci_vga_init(pci_bus
) != NULL
;
772 fprintf(stderr
, "This vga model is not supported,"
773 "currently it only supports -vga std\n");
779 static const VMStateDescription vmstate_spapr
= {
782 .minimum_version_id
= 1,
783 .minimum_version_id_old
= 1,
784 .fields
= (VMStateField
[]) {
785 VMSTATE_UINT32(next_irq
, sPAPREnvironment
),
788 VMSTATE_UINT64(rtc_offset
, sPAPREnvironment
),
790 VMSTATE_END_OF_LIST()
794 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
795 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
796 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
797 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
799 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
801 sPAPREnvironment
*spapr
= opaque
;
803 /* "Iteration" header */
804 qemu_put_be32(f
, spapr
->htab_shift
);
807 spapr
->htab_save_index
= 0;
808 spapr
->htab_first_pass
= true;
810 assert(kvm_enabled());
812 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
813 if (spapr
->htab_fd
< 0) {
814 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
824 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
827 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
828 int index
= spapr
->htab_save_index
;
829 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
831 assert(spapr
->htab_first_pass
);
836 /* Consume invalid HPTEs */
837 while ((index
< htabslots
)
838 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
840 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
843 /* Consume valid HPTEs */
845 while ((index
< htabslots
)
846 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
848 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
851 if (index
> chunkstart
) {
852 int n_valid
= index
- chunkstart
;
854 qemu_put_be32(f
, chunkstart
);
855 qemu_put_be16(f
, n_valid
);
857 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
858 HASH_PTE_SIZE_64
* n_valid
);
860 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
864 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
866 if (index
>= htabslots
) {
867 assert(index
== htabslots
);
869 spapr
->htab_first_pass
= false;
871 spapr
->htab_save_index
= index
;
874 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
877 bool final
= max_ns
< 0;
878 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
879 int examined
= 0, sent
= 0;
880 int index
= spapr
->htab_save_index
;
881 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
883 assert(!spapr
->htab_first_pass
);
886 int chunkstart
, invalidstart
;
888 /* Consume non-dirty HPTEs */
889 while ((index
< htabslots
)
890 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
896 /* Consume valid dirty HPTEs */
897 while ((index
< htabslots
)
898 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
899 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
900 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
905 invalidstart
= index
;
906 /* Consume invalid dirty HPTEs */
907 while ((index
< htabslots
)
908 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
909 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
910 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
915 if (index
> chunkstart
) {
916 int n_valid
= invalidstart
- chunkstart
;
917 int n_invalid
= index
- invalidstart
;
919 qemu_put_be32(f
, chunkstart
);
920 qemu_put_be16(f
, n_valid
);
921 qemu_put_be16(f
, n_invalid
);
922 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
923 HASH_PTE_SIZE_64
* n_valid
);
924 sent
+= index
- chunkstart
;
926 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
931 if (examined
>= htabslots
) {
935 if (index
>= htabslots
) {
936 assert(index
== htabslots
);
939 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
941 if (index
>= htabslots
) {
942 assert(index
== htabslots
);
946 spapr
->htab_save_index
= index
;
948 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
951 #define MAX_ITERATION_NS 5000000 /* 5 ms */
952 #define MAX_KVM_BUF_SIZE 2048
954 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
956 sPAPREnvironment
*spapr
= opaque
;
959 /* Iteration header */
963 assert(kvm_enabled());
965 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
966 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
970 } else if (spapr
->htab_first_pass
) {
971 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
973 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
984 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
986 sPAPREnvironment
*spapr
= opaque
;
988 /* Iteration header */
994 assert(kvm_enabled());
996 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1000 close(spapr
->htab_fd
);
1001 spapr
->htab_fd
= -1;
1003 htab_save_later_pass(f
, spapr
, -1);
1007 qemu_put_be32(f
, 0);
1008 qemu_put_be16(f
, 0);
1009 qemu_put_be16(f
, 0);
1014 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1016 sPAPREnvironment
*spapr
= opaque
;
1017 uint32_t section_hdr
;
1020 if (version_id
< 1 || version_id
> 1) {
1021 fprintf(stderr
, "htab_load() bad version\n");
1025 section_hdr
= qemu_get_be32(f
);
1028 /* First section, just the hash shift */
1029 if (spapr
->htab_shift
!= section_hdr
) {
1036 assert(kvm_enabled());
1038 fd
= kvmppc_get_htab_fd(true);
1040 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1047 uint16_t n_valid
, n_invalid
;
1049 index
= qemu_get_be32(f
);
1050 n_valid
= qemu_get_be16(f
);
1051 n_invalid
= qemu_get_be16(f
);
1053 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1058 if ((index
+ n_valid
+ n_invalid
) >
1059 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1060 /* Bad index in stream */
1061 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1062 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1069 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1070 HASH_PTE_SIZE_64
* n_valid
);
1073 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1074 HASH_PTE_SIZE_64
* n_invalid
);
1081 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1096 static SaveVMHandlers savevm_htab_handlers
= {
1097 .save_live_setup
= htab_save_setup
,
1098 .save_live_iterate
= htab_save_iterate
,
1099 .save_live_complete
= htab_save_complete
,
1100 .load_state
= htab_load
,
1103 /* pSeries LPAR / sPAPR hardware init */
1104 static void ppc_spapr_init(QEMUMachineInitArgs
*args
)
1106 ram_addr_t ram_size
= args
->ram_size
;
1107 const char *cpu_model
= args
->cpu_model
;
1108 const char *kernel_filename
= args
->kernel_filename
;
1109 const char *kernel_cmdline
= args
->kernel_cmdline
;
1110 const char *initrd_filename
= args
->initrd_filename
;
1111 const char *boot_device
= args
->boot_order
;
1116 MemoryRegion
*sysmem
= get_system_memory();
1117 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1118 hwaddr rma_alloc_size
;
1119 hwaddr node0_size
= (nb_numa_nodes
> 1) ? node_mem
[0] : ram_size
;
1120 uint32_t initrd_base
= 0;
1121 long kernel_size
= 0, initrd_size
= 0;
1122 long load_limit
, rtas_limit
, fw_size
;
1123 bool kernel_le
= false;
1126 msi_supported
= true;
1128 spapr
= g_malloc0(sizeof(*spapr
));
1129 QLIST_INIT(&spapr
->phbs
);
1131 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1133 /* Allocate RMA if necessary */
1134 rma_alloc_size
= kvmppc_alloc_rma("ppc_spapr.rma", sysmem
);
1136 if (rma_alloc_size
== -1) {
1137 hw_error("qemu: Unable to create RMA\n");
1141 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1142 spapr
->rma_size
= rma_alloc_size
;
1144 spapr
->rma_size
= node0_size
;
1146 /* With KVM, we don't actually know whether KVM supports an
1147 * unbounded RMA (PR KVM) or is limited by the hash table size
1148 * (HV KVM using VRMA), so we always assume the latter
1150 * In that case, we also limit the initial allocations for RTAS
1151 * etc... to 256M since we have no way to know what the VRMA size
1152 * is going to be as it depends on the size of the hash table
1153 * isn't determined yet.
1155 if (kvm_enabled()) {
1156 spapr
->vrma_adjust
= 1;
1157 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1161 if (spapr
->rma_size
> node0_size
) {
1162 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1167 /* We place the device tree and RTAS just below either the top of the RMA,
1168 * or just below 2GB, whichever is lowere, so that it can be
1169 * processed with 32-bit real mode code if necessary */
1170 rtas_limit
= MIN(spapr
->rma_size
, 0x80000000);
1171 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1172 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1173 load_limit
= spapr
->fdt_addr
- FW_OVERHEAD
;
1175 /* We aim for a hash table of size 1/128 the size of RAM. The
1176 * normal rule of thumb is 1/64 the size of RAM, but that's much
1177 * more than needed for the Linux guests we support. */
1178 spapr
->htab_shift
= 18; /* Minimum architected size */
1179 while (spapr
->htab_shift
<= 46) {
1180 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1183 spapr
->htab_shift
++;
1186 /* Set up Interrupt Controller before we create the VCPUs */
1187 spapr
->icp
= xics_system_init(smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1189 spapr
->next_irq
= XICS_IRQ_BASE
;
1192 if (cpu_model
== NULL
) {
1193 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1195 for (i
= 0; i
< smp_cpus
; i
++) {
1196 cpu
= cpu_ppc_init(cpu_model
);
1198 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1203 /* Set time-base frequency to 512 MHz */
1204 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1206 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1207 * MSR[IP] should never be set.
1209 env
->msr_mask
&= ~(1 << 6);
1211 /* Tell KVM that we're in PAPR mode */
1212 if (kvm_enabled()) {
1213 kvmppc_set_papr(cpu
);
1216 xics_cpu_setup(spapr
->icp
, cpu
);
1218 qemu_register_reset(spapr_cpu_reset
, cpu
);
1222 spapr
->ram_limit
= ram_size
;
1223 if (spapr
->ram_limit
> rma_alloc_size
) {
1224 ram_addr_t nonrma_base
= rma_alloc_size
;
1225 ram_addr_t nonrma_size
= spapr
->ram_limit
- rma_alloc_size
;
1227 memory_region_init_ram(ram
, NULL
, "ppc_spapr.ram", nonrma_size
);
1228 vmstate_register_ram_global(ram
);
1229 memory_region_add_subregion(sysmem
, nonrma_base
, ram
);
1232 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1233 spapr
->rtas_size
= load_image_targphys(filename
, spapr
->rtas_addr
,
1234 rtas_limit
- spapr
->rtas_addr
);
1235 if (spapr
->rtas_size
< 0) {
1236 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1239 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1240 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
1241 spapr
->rtas_size
, RTAS_MAX_SIZE
);
1246 /* Set up EPOW events infrastructure */
1247 spapr_events_init(spapr
);
1249 /* Set up VIO bus */
1250 spapr
->vio_bus
= spapr_vio_bus_init();
1252 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1253 if (serial_hds
[i
]) {
1254 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1258 /* We always have at least the nvram device on VIO */
1259 spapr_create_nvram(spapr
);
1262 spapr_pci_msi_init(spapr
, SPAPR_PCI_MSI_WINDOW
);
1263 spapr_pci_rtas_init();
1265 phb
= spapr_create_phb(spapr
, 0);
1267 for (i
= 0; i
< nb_nics
; i
++) {
1268 NICInfo
*nd
= &nd_table
[i
];
1271 nd
->model
= g_strdup("ibmveth");
1274 if (strcmp(nd
->model
, "ibmveth") == 0) {
1275 spapr_vlan_create(spapr
->vio_bus
, nd
);
1277 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1281 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1282 spapr_vscsi_create(spapr
->vio_bus
);
1286 if (spapr_vga_init(phb
->bus
)) {
1287 spapr
->has_graphics
= true;
1290 if (usb_enabled(spapr
->has_graphics
)) {
1291 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1292 if (spapr
->has_graphics
) {
1293 usbdevice_create("keyboard");
1294 usbdevice_create("mouse");
1298 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1299 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1300 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1304 if (kernel_filename
) {
1305 uint64_t lowaddr
= 0;
1307 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1308 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1309 if (kernel_size
< 0) {
1310 kernel_size
= load_elf(kernel_filename
,
1311 translate_kernel_address
, NULL
,
1312 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1313 kernel_le
= kernel_size
> 0;
1315 if (kernel_size
< 0) {
1316 kernel_size
= load_image_targphys(kernel_filename
,
1318 load_limit
- KERNEL_LOAD_ADDR
);
1320 if (kernel_size
< 0) {
1321 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
1327 if (initrd_filename
) {
1328 /* Try to locate the initrd in the gap between the kernel
1329 * and the firmware. Add a bit of space just in case
1331 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1332 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1333 load_limit
- initrd_base
);
1334 if (initrd_size
< 0) {
1335 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1345 if (bios_name
== NULL
) {
1346 bios_name
= FW_FILE_NAME
;
1348 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1349 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1351 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1356 spapr
->entry_point
= 0x100;
1358 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1359 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1360 &savevm_htab_handlers
, spapr
);
1362 /* Prepare the device tree */
1363 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1364 kernel_size
, kernel_le
,
1365 boot_device
, kernel_cmdline
,
1367 assert(spapr
->fdt_skel
!= NULL
);
1370 static int spapr_kvm_type(const char *vm_type
)
1376 if (!strcmp(vm_type
, "HV")) {
1380 if (!strcmp(vm_type
, "PR")) {
1384 error_report("Unknown kvm-type specified '%s'", vm_type
);
1388 static QEMUMachine spapr_machine
= {
1390 .desc
= "pSeries Logical Partition (PAPR compliant)",
1392 .init
= ppc_spapr_init
,
1393 .reset
= ppc_spapr_reset
,
1394 .block_default_type
= IF_SCSI
,
1395 .max_cpus
= MAX_CPUS
,
1397 .default_boot_order
= NULL
,
1398 .kvm_type
= spapr_kvm_type
,
1401 static void spapr_machine_init(void)
1403 qemu_register_machine(&spapr_machine
);
1406 machine_init(spapr_machine_init
);