2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
29 #include "hw/fw-path-provider.h"
32 #include "sysemu/blockdev.h"
33 #include "sysemu/cpus.h"
34 #include "sysemu/kvm.h"
36 #include "mmu-hash64.h"
39 #include "hw/boards.h"
40 #include "hw/ppc/ppc.h"
41 #include "hw/loader.h"
43 #include "hw/ppc/spapr.h"
44 #include "hw/ppc/spapr_vio.h"
45 #include "hw/pci-host/spapr.h"
46 #include "hw/ppc/xics.h"
47 #include "hw/pci/msi.h"
49 #include "hw/pci/pci.h"
50 #include "hw/scsi/scsi.h"
51 #include "hw/virtio/virtio-scsi.h"
53 #include "exec/address-spaces.h"
55 #include "qemu/config-file.h"
56 #include "qemu/error-report.h"
61 /* SLOF memory layout:
63 * SLOF raw image loaded at 0, copies its romfs right below the flat
64 * device-tree, then position SLOF itself 31M below that
66 * So we set FW_OVERHEAD to 40MB which should account for all of that
69 * We load our kernel at 4M, leaving space for SLOF initial image
71 #define FDT_MAX_SIZE 0x40000
72 #define RTAS_MAX_SIZE 0x10000
73 #define FW_MAX_SIZE 0x400000
74 #define FW_FILE_NAME "slof.bin"
75 #define FW_OVERHEAD 0x2800000
76 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
78 #define MIN_RMA_SLOF 128UL
80 #define TIMEBASE_FREQ 512000000ULL
84 #define PHANDLE_XICP 0x00001111
86 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
88 typedef struct sPAPRMachineState sPAPRMachineState
;
90 #define TYPE_SPAPR_MACHINE "spapr-machine"
91 #define SPAPR_MACHINE(obj) \
92 OBJECT_CHECK(sPAPRMachineState, (obj), TYPE_SPAPR_MACHINE)
97 struct sPAPRMachineState
{
99 MachineState parent_obj
;
105 sPAPREnvironment
*spapr
;
107 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
112 dev
= qdev_create(NULL
, type
);
113 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
114 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
115 if (qdev_init(dev
) < 0) {
119 return XICS_COMMON(dev
);
122 static XICSState
*xics_system_init(int nr_servers
, int nr_irqs
)
124 XICSState
*icp
= NULL
;
127 QemuOpts
*machine_opts
= qemu_get_machine_opts();
128 bool irqchip_allowed
= qemu_opt_get_bool(machine_opts
,
129 "kernel_irqchip", true);
130 bool irqchip_required
= qemu_opt_get_bool(machine_opts
,
131 "kernel_irqchip", false);
132 if (irqchip_allowed
) {
133 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
);
136 if (irqchip_required
&& !icp
) {
137 perror("Failed to create in-kernel XICS\n");
143 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
);
147 perror("Failed to create XICS\n");
154 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
158 uint32_t servers_prop
[smt_threads
];
159 uint32_t gservers_prop
[smt_threads
* 2];
160 int index
= ppc_get_vcpu_dt_id(cpu
);
162 if (cpu
->cpu_version
) {
163 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
169 /* Build interrupt servers and gservers properties */
170 for (i
= 0; i
< smt_threads
; i
++) {
171 servers_prop
[i
] = cpu_to_be32(index
+ i
);
172 /* Hack, direct the group queues back to cpu 0 */
173 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
174 gservers_prop
[i
*2 + 1] = 0;
176 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
177 servers_prop
, sizeof(servers_prop
));
181 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
182 gservers_prop
, sizeof(gservers_prop
));
187 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
189 int ret
= 0, offset
, cpus_offset
;
192 int smt
= kvmppc_smt_threads();
193 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
196 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
197 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
198 int index
= ppc_get_vcpu_dt_id(cpu
);
199 uint32_t associativity
[] = {cpu_to_be32(0x5),
203 cpu_to_be32(cs
->numa_node
),
206 if ((index
% smt
) != 0) {
210 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
212 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
213 if (cpus_offset
< 0) {
214 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
216 if (cpus_offset
< 0) {
220 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
222 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
228 if (nb_numa_nodes
> 1) {
229 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
230 sizeof(associativity
));
236 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
237 pft_size_prop
, sizeof(pft_size_prop
));
242 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
243 ppc_get_compat_smt_threads(cpu
));
252 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
255 size_t maxcells
= maxsize
/ sizeof(uint32_t);
259 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
260 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
262 if (!sps
->page_shift
) {
265 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
266 if (sps
->enc
[count
].page_shift
== 0) {
270 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
273 *(p
++) = cpu_to_be32(sps
->page_shift
);
274 *(p
++) = cpu_to_be32(sps
->slb_enc
);
275 *(p
++) = cpu_to_be32(count
);
276 for (j
= 0; j
< count
; j
++) {
277 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
278 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
282 return (p
- prop
) * sizeof(uint32_t);
289 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
290 #exp, fdt_strerror(ret)); \
295 static void add_str(GString
*s
, const gchar
*s1
)
297 g_string_append_len(s
, s1
, strlen(s1
) + 1);
300 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
304 const char *boot_device
,
305 const char *kernel_cmdline
,
310 uint32_t start_prop
= cpu_to_be32(initrd_base
);
311 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
312 GString
*hypertas
= g_string_sized_new(256);
313 GString
*qemu_hypertas
= g_string_sized_new(256);
314 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
315 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
316 int smt
= kvmppc_smt_threads();
317 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
318 QemuOpts
*opts
= qemu_opts_find(qemu_find_opts("smp-opts"), NULL
);
319 unsigned sockets
= opts
? qemu_opt_get_number(opts
, "sockets", 0) : 0;
320 uint32_t cpus_per_socket
= sockets
? (smp_cpus
/ sockets
) : 1;
322 add_str(hypertas
, "hcall-pft");
323 add_str(hypertas
, "hcall-term");
324 add_str(hypertas
, "hcall-dabr");
325 add_str(hypertas
, "hcall-interrupt");
326 add_str(hypertas
, "hcall-tce");
327 add_str(hypertas
, "hcall-vio");
328 add_str(hypertas
, "hcall-splpar");
329 add_str(hypertas
, "hcall-bulk");
330 add_str(hypertas
, "hcall-set-mode");
331 add_str(qemu_hypertas
, "hcall-memop1");
333 fdt
= g_malloc0(FDT_MAX_SIZE
);
334 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
337 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
340 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
342 _FDT((fdt_finish_reservemap(fdt
)));
345 _FDT((fdt_begin_node(fdt
, "")));
346 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
347 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
348 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
350 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
351 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
354 _FDT((fdt_begin_node(fdt
, "chosen")));
356 /* Set Form1_affinity */
357 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
359 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
360 _FDT((fdt_property(fdt
, "linux,initrd-start",
361 &start_prop
, sizeof(start_prop
))));
362 _FDT((fdt_property(fdt
, "linux,initrd-end",
363 &end_prop
, sizeof(end_prop
))));
365 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
366 cpu_to_be64(kernel_size
) };
368 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
370 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
374 _FDT((fdt_property_string(fdt
, "qemu,boot-device", boot_device
)));
377 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
379 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
380 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
381 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
383 _FDT((fdt_end_node(fdt
)));
386 _FDT((fdt_begin_node(fdt
, "cpus")));
388 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
389 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
392 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
393 CPUPPCState
*env
= &cpu
->env
;
394 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
395 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
396 int index
= ppc_get_vcpu_dt_id(cpu
);
398 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
399 0xffffffff, 0xffffffff};
400 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
401 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
402 uint32_t page_sizes_prop
[64];
403 size_t page_sizes_prop_size
;
405 if ((index
% smt
) != 0) {
409 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
411 _FDT((fdt_begin_node(fdt
, nodename
)));
415 _FDT((fdt_property_cell(fdt
, "reg", index
)));
416 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
418 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
419 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
420 env
->dcache_line_size
)));
421 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
422 env
->dcache_line_size
)));
423 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
424 env
->icache_line_size
)));
425 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
426 env
->icache_line_size
)));
428 if (pcc
->l1_dcache_size
) {
429 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
431 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
433 if (pcc
->l1_icache_size
) {
434 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
436 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
439 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
440 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
441 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
442 _FDT((fdt_property_string(fdt
, "status", "okay")));
443 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
445 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
446 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
449 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
450 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
451 segs
, sizeof(segs
))));
454 /* Advertise VMX/VSX (vector extensions) if available
455 * 0 / no property == no vector extensions
456 * 1 == VMX / Altivec available
457 * 2 == VSX available */
458 if (env
->insns_flags
& PPC_ALTIVEC
) {
459 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
461 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
464 /* Advertise DFP (Decimal Floating Point) if available
465 * 0 / no property == no DFP
466 * 1 == DFP available */
467 if (env
->insns_flags2
& PPC2_DFP
) {
468 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
471 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
472 sizeof(page_sizes_prop
));
473 if (page_sizes_prop_size
) {
474 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
475 page_sizes_prop
, page_sizes_prop_size
)));
478 _FDT((fdt_property_cell(fdt
, "ibm,chip-id",
479 cs
->cpu_index
/ cpus_per_socket
)));
481 _FDT((fdt_end_node(fdt
)));
484 _FDT((fdt_end_node(fdt
)));
487 _FDT((fdt_begin_node(fdt
, "rtas")));
489 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
490 add_str(hypertas
, "hcall-multi-tce");
492 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
494 g_string_free(hypertas
, TRUE
);
495 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
496 qemu_hypertas
->len
)));
497 g_string_free(qemu_hypertas
, TRUE
);
499 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
500 refpoints
, sizeof(refpoints
))));
502 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
504 _FDT((fdt_end_node(fdt
)));
506 /* interrupt controller */
507 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
509 _FDT((fdt_property_string(fdt
, "device_type",
510 "PowerPC-External-Interrupt-Presentation")));
511 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
512 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
513 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
514 interrupt_server_ranges_prop
,
515 sizeof(interrupt_server_ranges_prop
))));
516 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
517 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
518 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
520 _FDT((fdt_end_node(fdt
)));
523 _FDT((fdt_begin_node(fdt
, "vdevice")));
525 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
526 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
527 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
528 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
529 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
530 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
532 _FDT((fdt_end_node(fdt
)));
535 spapr_events_fdt_skel(fdt
, epow_irq
);
537 /* /hypervisor node */
539 uint8_t hypercall
[16];
541 /* indicate KVM hypercall interface */
542 _FDT((fdt_begin_node(fdt
, "hypervisor")));
543 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
544 if (kvmppc_has_cap_fixup_hcalls()) {
546 * Older KVM versions with older guest kernels were broken with the
547 * magic page, don't allow the guest to map it.
549 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
551 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
552 sizeof(hypercall
))));
554 _FDT((fdt_end_node(fdt
)));
557 _FDT((fdt_end_node(fdt
))); /* close root node */
558 _FDT((fdt_finish(fdt
)));
563 int spapr_h_cas_compose_response(target_ulong addr
, target_ulong size
)
565 void *fdt
, *fdt_skel
;
566 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
570 /* Create sceleton */
571 fdt_skel
= g_malloc0(size
);
572 _FDT((fdt_create(fdt_skel
, size
)));
573 _FDT((fdt_begin_node(fdt_skel
, "")));
574 _FDT((fdt_end_node(fdt_skel
)));
575 _FDT((fdt_finish(fdt_skel
)));
576 fdt
= g_malloc0(size
);
577 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
580 /* Fix skeleton up */
581 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
583 /* Pack resulting tree */
584 _FDT((fdt_pack(fdt
)));
586 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
587 trace_spapr_cas_failed(size
);
591 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
592 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
593 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
599 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
601 uint32_t associativity
[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
602 cpu_to_be32(0x0), cpu_to_be32(0x0),
605 hwaddr node0_size
, mem_start
, node_size
;
606 uint64_t mem_reg_property
[2];
610 if (nb_numa_nodes
> 1 && numa_info
[0].node_mem
< ram_size
) {
611 node0_size
= numa_info
[0].node_mem
;
613 node0_size
= ram_size
;
617 mem_reg_property
[0] = 0;
618 mem_reg_property
[1] = cpu_to_be64(spapr
->rma_size
);
619 off
= fdt_add_subnode(fdt
, 0, "memory@0");
621 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
622 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
623 sizeof(mem_reg_property
))));
624 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
625 sizeof(associativity
))));
628 if (node0_size
> spapr
->rma_size
) {
629 mem_reg_property
[0] = cpu_to_be64(spapr
->rma_size
);
630 mem_reg_property
[1] = cpu_to_be64(node0_size
- spapr
->rma_size
);
632 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, spapr
->rma_size
);
633 off
= fdt_add_subnode(fdt
, 0, mem_name
);
635 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
636 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
637 sizeof(mem_reg_property
))));
638 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
639 sizeof(associativity
))));
642 /* RAM: Node 1 and beyond */
643 mem_start
= node0_size
;
644 for (i
= 1; i
< nb_numa_nodes
; i
++) {
645 mem_reg_property
[0] = cpu_to_be64(mem_start
);
646 if (mem_start
>= ram_size
) {
649 node_size
= numa_info
[i
].node_mem
;
650 if (node_size
> ram_size
- mem_start
) {
651 node_size
= ram_size
- mem_start
;
654 mem_reg_property
[1] = cpu_to_be64(node_size
);
655 associativity
[3] = associativity
[4] = cpu_to_be32(i
);
656 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, mem_start
);
657 off
= fdt_add_subnode(fdt
, 0, mem_name
);
659 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
660 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
661 sizeof(mem_reg_property
))));
662 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
663 sizeof(associativity
))));
664 mem_start
+= node_size
;
670 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
681 fdt
= g_malloc(FDT_MAX_SIZE
);
683 /* open out the base tree into a temp buffer for the final tweaks */
684 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
686 ret
= spapr_populate_memory(spapr
, fdt
);
688 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
692 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
694 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
698 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
699 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
703 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
708 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
710 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
713 /* Advertise NUMA via ibm,associativity */
714 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
716 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
719 bootlist
= get_boot_devices_list(&cb
, true);
720 if (cb
&& bootlist
) {
721 int offset
= fdt_path_offset(fdt
, "/chosen");
725 for (i
= 0; i
< cb
; i
++) {
726 if (bootlist
[i
] == '\n') {
731 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
734 if (!spapr
->has_graphics
) {
735 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
738 _FDT((fdt_pack(fdt
)));
740 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
741 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
742 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
746 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
751 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
753 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
756 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
758 CPUPPCState
*env
= &cpu
->env
;
761 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
762 env
->gpr
[3] = H_PRIVILEGE
;
764 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
768 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
772 /* allocate hash page table. For now we always make this 16mb,
773 * later we should probably make it scale to the size of guest
776 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
779 /* Kernel handles htab, we don't need to allocate one */
780 spapr
->htab_shift
= shift
;
781 kvmppc_kern_htab
= true;
784 /* Allocate an htab if we don't yet have one */
785 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
789 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
792 /* Update the RMA size if necessary */
793 if (spapr
->vrma_adjust
) {
794 hwaddr node0_size
= (nb_numa_nodes
> 1) ?
795 numa_info
[0].node_mem
: ram_size
;
796 spapr
->rma_size
= kvmppc_rma_size(node0_size
, spapr
->htab_shift
);
800 static void ppc_spapr_reset(void)
802 PowerPCCPU
*first_ppc_cpu
;
804 /* Reset the hash table & recalc the RMA */
805 spapr_reset_htab(spapr
);
807 qemu_devices_reset();
810 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
813 /* Set up the entry state */
814 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
815 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
816 first_ppc_cpu
->env
.gpr
[5] = 0;
817 first_cpu
->halted
= 0;
818 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
822 static void spapr_cpu_reset(void *opaque
)
824 PowerPCCPU
*cpu
= opaque
;
825 CPUState
*cs
= CPU(cpu
);
826 CPUPPCState
*env
= &cpu
->env
;
830 /* All CPUs start halted. CPU0 is unhalted from the machine level
831 * reset code and the rest are explicitly started up by the guest
832 * using an RTAS call */
835 env
->spr
[SPR_HIOR
] = 0;
837 env
->external_htab
= (uint8_t *)spapr
->htab
;
838 if (kvm_enabled() && !env
->external_htab
) {
840 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
841 * functions do the right thing.
843 env
->external_htab
= (void *)1;
847 * htab_mask is the mask used to normalize hash value to PTEG index.
848 * htab_shift is log2 of hash table size.
849 * We have 8 hpte per group, and each hpte is 16 bytes.
850 * ie have 128 bytes per hpte entry.
852 env
->htab_mask
= (1ULL << ((spapr
)->htab_shift
- 7)) - 1;
853 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
854 (spapr
->htab_shift
- 18);
857 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
859 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
860 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
863 qdev_prop_set_drive_nofail(dev
, "drive", dinfo
->bdrv
);
866 qdev_init_nofail(dev
);
868 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
871 /* Returns whether we want to use VGA or not */
872 static int spapr_vga_init(PCIBus
*pci_bus
)
874 switch (vga_interface_type
) {
880 return pci_vga_init(pci_bus
) != NULL
;
882 fprintf(stderr
, "This vga model is not supported,"
883 "currently it only supports -vga std\n");
888 static const VMStateDescription vmstate_spapr
= {
891 .minimum_version_id
= 1,
892 .fields
= (VMStateField
[]) {
893 VMSTATE_UNUSED(4), /* used to be @next_irq */
896 VMSTATE_UINT64(rtc_offset
, sPAPREnvironment
),
897 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPREnvironment
, 2),
898 VMSTATE_END_OF_LIST()
902 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
903 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
904 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
905 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
907 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
909 sPAPREnvironment
*spapr
= opaque
;
911 /* "Iteration" header */
912 qemu_put_be32(f
, spapr
->htab_shift
);
915 spapr
->htab_save_index
= 0;
916 spapr
->htab_first_pass
= true;
918 assert(kvm_enabled());
920 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
921 if (spapr
->htab_fd
< 0) {
922 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
932 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
935 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
936 int index
= spapr
->htab_save_index
;
937 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
939 assert(spapr
->htab_first_pass
);
944 /* Consume invalid HPTEs */
945 while ((index
< htabslots
)
946 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
948 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
951 /* Consume valid HPTEs */
953 while ((index
< htabslots
)
954 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
956 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
959 if (index
> chunkstart
) {
960 int n_valid
= index
- chunkstart
;
962 qemu_put_be32(f
, chunkstart
);
963 qemu_put_be16(f
, n_valid
);
965 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
966 HASH_PTE_SIZE_64
* n_valid
);
968 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
972 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
974 if (index
>= htabslots
) {
975 assert(index
== htabslots
);
977 spapr
->htab_first_pass
= false;
979 spapr
->htab_save_index
= index
;
982 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
985 bool final
= max_ns
< 0;
986 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
987 int examined
= 0, sent
= 0;
988 int index
= spapr
->htab_save_index
;
989 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
991 assert(!spapr
->htab_first_pass
);
994 int chunkstart
, invalidstart
;
996 /* Consume non-dirty HPTEs */
997 while ((index
< htabslots
)
998 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1004 /* Consume valid dirty HPTEs */
1005 while ((index
< htabslots
)
1006 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1007 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1008 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1013 invalidstart
= index
;
1014 /* Consume invalid dirty HPTEs */
1015 while ((index
< htabslots
)
1016 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1017 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1018 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1023 if (index
> chunkstart
) {
1024 int n_valid
= invalidstart
- chunkstart
;
1025 int n_invalid
= index
- invalidstart
;
1027 qemu_put_be32(f
, chunkstart
);
1028 qemu_put_be16(f
, n_valid
);
1029 qemu_put_be16(f
, n_invalid
);
1030 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1031 HASH_PTE_SIZE_64
* n_valid
);
1032 sent
+= index
- chunkstart
;
1034 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1039 if (examined
>= htabslots
) {
1043 if (index
>= htabslots
) {
1044 assert(index
== htabslots
);
1047 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1049 if (index
>= htabslots
) {
1050 assert(index
== htabslots
);
1054 spapr
->htab_save_index
= index
;
1056 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1059 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1060 #define MAX_KVM_BUF_SIZE 2048
1062 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1064 sPAPREnvironment
*spapr
= opaque
;
1067 /* Iteration header */
1068 qemu_put_be32(f
, 0);
1071 assert(kvm_enabled());
1073 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1074 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1078 } else if (spapr
->htab_first_pass
) {
1079 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1081 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1085 qemu_put_be32(f
, 0);
1086 qemu_put_be16(f
, 0);
1087 qemu_put_be16(f
, 0);
1092 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1094 sPAPREnvironment
*spapr
= opaque
;
1096 /* Iteration header */
1097 qemu_put_be32(f
, 0);
1102 assert(kvm_enabled());
1104 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1108 close(spapr
->htab_fd
);
1109 spapr
->htab_fd
= -1;
1111 htab_save_later_pass(f
, spapr
, -1);
1115 qemu_put_be32(f
, 0);
1116 qemu_put_be16(f
, 0);
1117 qemu_put_be16(f
, 0);
1122 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1124 sPAPREnvironment
*spapr
= opaque
;
1125 uint32_t section_hdr
;
1128 if (version_id
< 1 || version_id
> 1) {
1129 fprintf(stderr
, "htab_load() bad version\n");
1133 section_hdr
= qemu_get_be32(f
);
1136 /* First section, just the hash shift */
1137 if (spapr
->htab_shift
!= section_hdr
) {
1144 assert(kvm_enabled());
1146 fd
= kvmppc_get_htab_fd(true);
1148 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1155 uint16_t n_valid
, n_invalid
;
1157 index
= qemu_get_be32(f
);
1158 n_valid
= qemu_get_be16(f
);
1159 n_invalid
= qemu_get_be16(f
);
1161 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1166 if ((index
+ n_valid
+ n_invalid
) >
1167 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1168 /* Bad index in stream */
1169 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1170 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1177 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1178 HASH_PTE_SIZE_64
* n_valid
);
1181 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1182 HASH_PTE_SIZE_64
* n_invalid
);
1189 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1204 static SaveVMHandlers savevm_htab_handlers
= {
1205 .save_live_setup
= htab_save_setup
,
1206 .save_live_iterate
= htab_save_iterate
,
1207 .save_live_complete
= htab_save_complete
,
1208 .load_state
= htab_load
,
1211 /* pSeries LPAR / sPAPR hardware init */
1212 static void ppc_spapr_init(MachineState
*machine
)
1214 ram_addr_t ram_size
= machine
->ram_size
;
1215 const char *cpu_model
= machine
->cpu_model
;
1216 const char *kernel_filename
= machine
->kernel_filename
;
1217 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1218 const char *initrd_filename
= machine
->initrd_filename
;
1219 const char *boot_device
= machine
->boot_order
;
1224 MemoryRegion
*sysmem
= get_system_memory();
1225 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1226 MemoryRegion
*rma_region
;
1228 hwaddr rma_alloc_size
;
1229 hwaddr node0_size
= (nb_numa_nodes
> 1) ? numa_info
[0].node_mem
: ram_size
;
1230 uint32_t initrd_base
= 0;
1231 long kernel_size
= 0, initrd_size
= 0;
1232 long load_limit
, rtas_limit
, fw_size
;
1233 bool kernel_le
= false;
1236 msi_supported
= true;
1238 spapr
= g_malloc0(sizeof(*spapr
));
1239 QLIST_INIT(&spapr
->phbs
);
1241 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1243 /* Allocate RMA if necessary */
1244 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1246 if (rma_alloc_size
== -1) {
1247 hw_error("qemu: Unable to create RMA\n");
1251 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1252 spapr
->rma_size
= rma_alloc_size
;
1254 spapr
->rma_size
= node0_size
;
1256 /* With KVM, we don't actually know whether KVM supports an
1257 * unbounded RMA (PR KVM) or is limited by the hash table size
1258 * (HV KVM using VRMA), so we always assume the latter
1260 * In that case, we also limit the initial allocations for RTAS
1261 * etc... to 256M since we have no way to know what the VRMA size
1262 * is going to be as it depends on the size of the hash table
1263 * isn't determined yet.
1265 if (kvm_enabled()) {
1266 spapr
->vrma_adjust
= 1;
1267 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1271 if (spapr
->rma_size
> node0_size
) {
1272 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1277 /* We place the device tree and RTAS just below either the top of the RMA,
1278 * or just below 2GB, whichever is lowere, so that it can be
1279 * processed with 32-bit real mode code if necessary */
1280 rtas_limit
= MIN(spapr
->rma_size
, 0x80000000);
1281 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1282 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1283 load_limit
= spapr
->fdt_addr
- FW_OVERHEAD
;
1285 /* We aim for a hash table of size 1/128 the size of RAM. The
1286 * normal rule of thumb is 1/64 the size of RAM, but that's much
1287 * more than needed for the Linux guests we support. */
1288 spapr
->htab_shift
= 18; /* Minimum architected size */
1289 while (spapr
->htab_shift
<= 46) {
1290 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1293 spapr
->htab_shift
++;
1296 /* Set up Interrupt Controller before we create the VCPUs */
1297 spapr
->icp
= xics_system_init(smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1301 if (cpu_model
== NULL
) {
1302 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1304 for (i
= 0; i
< smp_cpus
; i
++) {
1305 cpu
= cpu_ppc_init(cpu_model
);
1307 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1312 /* Set time-base frequency to 512 MHz */
1313 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1315 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1316 * MSR[IP] should never be set.
1318 env
->msr_mask
&= ~(1 << 6);
1320 /* Tell KVM that we're in PAPR mode */
1321 if (kvm_enabled()) {
1322 kvmppc_set_papr(cpu
);
1325 if (cpu
->max_compat
) {
1326 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1331 xics_cpu_setup(spapr
->icp
, cpu
);
1333 qemu_register_reset(spapr_cpu_reset
, cpu
);
1337 spapr
->ram_limit
= ram_size
;
1338 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1340 memory_region_add_subregion(sysmem
, 0, ram
);
1342 if (rma_alloc_size
&& rma
) {
1343 rma_region
= g_new(MemoryRegion
, 1);
1344 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1345 rma_alloc_size
, rma
);
1346 vmstate_register_ram_global(rma_region
);
1347 memory_region_add_subregion(sysmem
, 0, rma_region
);
1350 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1351 spapr
->rtas_size
= load_image_targphys(filename
, spapr
->rtas_addr
,
1352 rtas_limit
- spapr
->rtas_addr
);
1353 if (spapr
->rtas_size
< 0) {
1354 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1357 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1358 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
1359 spapr
->rtas_size
, RTAS_MAX_SIZE
);
1364 /* Set up EPOW events infrastructure */
1365 spapr_events_init(spapr
);
1367 /* Set up VIO bus */
1368 spapr
->vio_bus
= spapr_vio_bus_init();
1370 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1371 if (serial_hds
[i
]) {
1372 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1376 /* We always have at least the nvram device on VIO */
1377 spapr_create_nvram(spapr
);
1380 spapr_pci_msi_init(spapr
, SPAPR_PCI_MSI_WINDOW
);
1381 spapr_pci_rtas_init();
1383 phb
= spapr_create_phb(spapr
, 0);
1385 for (i
= 0; i
< nb_nics
; i
++) {
1386 NICInfo
*nd
= &nd_table
[i
];
1389 nd
->model
= g_strdup("ibmveth");
1392 if (strcmp(nd
->model
, "ibmveth") == 0) {
1393 spapr_vlan_create(spapr
->vio_bus
, nd
);
1395 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1399 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1400 spapr_vscsi_create(spapr
->vio_bus
);
1404 if (spapr_vga_init(phb
->bus
)) {
1405 spapr
->has_graphics
= true;
1408 if (usb_enabled(spapr
->has_graphics
)) {
1409 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1410 if (spapr
->has_graphics
) {
1411 usbdevice_create("keyboard");
1412 usbdevice_create("mouse");
1416 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1417 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1418 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1422 if (kernel_filename
) {
1423 uint64_t lowaddr
= 0;
1425 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1426 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1427 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1428 kernel_size
= load_elf(kernel_filename
,
1429 translate_kernel_address
, NULL
,
1430 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1431 kernel_le
= kernel_size
> 0;
1433 if (kernel_size
< 0) {
1434 fprintf(stderr
, "qemu: error loading %s: %s\n",
1435 kernel_filename
, load_elf_strerror(kernel_size
));
1440 if (initrd_filename
) {
1441 /* Try to locate the initrd in the gap between the kernel
1442 * and the firmware. Add a bit of space just in case
1444 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1445 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1446 load_limit
- initrd_base
);
1447 if (initrd_size
< 0) {
1448 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1458 if (bios_name
== NULL
) {
1459 bios_name
= FW_FILE_NAME
;
1461 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1462 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1464 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1469 spapr
->entry_point
= 0x100;
1471 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1472 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1473 &savevm_htab_handlers
, spapr
);
1475 /* Prepare the device tree */
1476 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1477 kernel_size
, kernel_le
,
1478 boot_device
, kernel_cmdline
,
1480 assert(spapr
->fdt_skel
!= NULL
);
1483 static int spapr_kvm_type(const char *vm_type
)
1489 if (!strcmp(vm_type
, "HV")) {
1493 if (!strcmp(vm_type
, "PR")) {
1497 error_report("Unknown kvm-type specified '%s'", vm_type
);
1502 * Implementation of an interface to adjust firmware patch
1503 * for the bootindex property handling.
1505 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1508 #define CAST(type, obj, name) \
1509 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1510 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1511 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1514 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1515 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1516 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1520 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1521 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1522 * in the top 16 bits of the 64-bit LUN
1524 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1525 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1526 (uint64_t)id
<< 48);
1527 } else if (virtio
) {
1529 * We use SRP luns of the form 01000000 | (target << 8) | lun
1530 * in the top 32 bits of the 64-bit LUN
1531 * Note: the quote above is from SLOF and it is wrong,
1532 * the actual binding is:
1533 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
1535 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
1536 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1537 (uint64_t)id
<< 32);
1540 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
1541 * in the top 32 bits of the 64-bit LUN
1543 unsigned usb_port
= atoi(usb
->port
->path
);
1544 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
1545 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1546 (uint64_t)id
<< 32);
1551 /* Replace "pci" with "pci@800000020000000" */
1552 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
1558 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
1560 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1562 return g_strdup(sm
->kvm_type
);
1565 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
1567 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1569 g_free(sm
->kvm_type
);
1570 sm
->kvm_type
= g_strdup(value
);
1573 static void spapr_machine_initfn(Object
*obj
)
1575 object_property_add_str(obj
, "kvm-type",
1576 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
1579 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
1581 MachineClass
*mc
= MACHINE_CLASS(oc
);
1582 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
1584 mc
->name
= "pseries";
1585 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
1587 mc
->init
= ppc_spapr_init
;
1588 mc
->reset
= ppc_spapr_reset
;
1589 mc
->block_default_type
= IF_SCSI
;
1590 mc
->max_cpus
= MAX_CPUS
;
1591 mc
->no_parallel
= 1;
1592 mc
->default_boot_order
= NULL
;
1593 mc
->kvm_type
= spapr_kvm_type
;
1595 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
1598 static const TypeInfo spapr_machine_info
= {
1599 .name
= TYPE_SPAPR_MACHINE
,
1600 .parent
= TYPE_MACHINE
,
1601 .instance_size
= sizeof(sPAPRMachineState
),
1602 .instance_init
= spapr_machine_initfn
,
1603 .class_init
= spapr_machine_class_init
,
1604 .interfaces
= (InterfaceInfo
[]) {
1605 { TYPE_FW_PATH_PROVIDER
},
1610 static void spapr_machine_2_1_class_init(ObjectClass
*oc
, void *data
)
1612 MachineClass
*mc
= MACHINE_CLASS(oc
);
1614 mc
->name
= "pseries-2.1";
1615 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.1";
1619 static const TypeInfo spapr_machine_2_1_info
= {
1620 .name
= TYPE_SPAPR_MACHINE
"2.1",
1621 .parent
= TYPE_SPAPR_MACHINE
,
1622 .class_init
= spapr_machine_2_1_class_init
,
1625 static void spapr_machine_register_types(void)
1627 type_register_static(&spapr_machine_info
);
1628 type_register_static(&spapr_machine_2_1_info
);
1631 type_init(spapr_machine_register_types
)