2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/numa.h"
33 #include "hw/fw-path-provider.h"
36 #include "sysemu/device_tree.h"
37 #include "sysemu/block-backend.h"
38 #include "sysemu/cpus.h"
39 #include "sysemu/kvm.h"
40 #include "sysemu/device_tree.h"
42 #include "migration/migration.h"
43 #include "mmu-hash64.h"
46 #include "hw/boards.h"
47 #include "hw/ppc/ppc.h"
48 #include "hw/loader.h"
50 #include "hw/ppc/fdt.h"
51 #include "hw/ppc/spapr.h"
52 #include "hw/ppc/spapr_vio.h"
53 #include "hw/pci-host/spapr.h"
54 #include "hw/ppc/xics.h"
55 #include "hw/pci/msi.h"
57 #include "hw/pci/pci.h"
58 #include "hw/scsi/scsi.h"
59 #include "hw/virtio/virtio-scsi.h"
61 #include "exec/address-spaces.h"
63 #include "qemu/config-file.h"
64 #include "qemu/error-report.h"
68 #include "hw/compat.h"
69 #include "qemu/cutils.h"
70 #include "hw/ppc/spapr_cpu_core.h"
71 #include "qmp-commands.h"
75 /* SLOF memory layout:
77 * SLOF raw image loaded at 0, copies its romfs right below the flat
78 * device-tree, then position SLOF itself 31M below that
80 * So we set FW_OVERHEAD to 40MB which should account for all of that
83 * We load our kernel at 4M, leaving space for SLOF initial image
85 #define FDT_MAX_SIZE 0x100000
86 #define RTAS_MAX_SIZE 0x10000
87 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
88 #define FW_MAX_SIZE 0x400000
89 #define FW_FILE_NAME "slof.bin"
90 #define FW_OVERHEAD 0x2800000
91 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
93 #define MIN_RMA_SLOF 128UL
95 #define PHANDLE_XICP 0x00001111
97 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
99 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
100 int nr_irqs
, Error
**errp
)
105 dev
= qdev_create(NULL
, type
);
106 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
107 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
108 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
110 error_propagate(errp
, err
);
111 object_unparent(OBJECT(dev
));
114 return XICS_COMMON(dev
);
117 static XICSState
*xics_system_init(MachineState
*machine
,
118 int nr_servers
, int nr_irqs
, Error
**errp
)
120 XICSState
*xics
= NULL
;
125 if (machine_kernel_irqchip_allowed(machine
)) {
126 xics
= try_create_xics(TYPE_XICS_SPAPR_KVM
, nr_servers
, nr_irqs
,
129 if (machine_kernel_irqchip_required(machine
) && !xics
) {
130 error_reportf_err(err
,
131 "kernel_irqchip requested but unavailable: ");
138 xics
= try_create_xics(TYPE_XICS_SPAPR
, nr_servers
, nr_irqs
, errp
);
144 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
148 uint32_t servers_prop
[smt_threads
];
149 uint32_t gservers_prop
[smt_threads
* 2];
150 int index
= ppc_get_vcpu_dt_id(cpu
);
152 if (cpu
->cpu_version
) {
153 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
159 /* Build interrupt servers and gservers properties */
160 for (i
= 0; i
< smt_threads
; i
++) {
161 servers_prop
[i
] = cpu_to_be32(index
+ i
);
162 /* Hack, direct the group queues back to cpu 0 */
163 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
164 gservers_prop
[i
*2 + 1] = 0;
166 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
167 servers_prop
, sizeof(servers_prop
));
171 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
172 gservers_prop
, sizeof(gservers_prop
));
177 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, CPUState
*cs
)
180 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
181 int index
= ppc_get_vcpu_dt_id(cpu
);
182 uint32_t associativity
[] = {cpu_to_be32(0x5),
186 cpu_to_be32(cs
->numa_node
),
189 /* Advertise NUMA via ibm,associativity */
190 if (nb_numa_nodes
> 1) {
191 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
192 sizeof(associativity
));
198 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
200 int ret
= 0, offset
, cpus_offset
;
203 int smt
= kvmppc_smt_threads();
204 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
207 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
208 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
209 int index
= ppc_get_vcpu_dt_id(cpu
);
211 if ((index
% smt
) != 0) {
215 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
217 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
218 if (cpus_offset
< 0) {
219 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
221 if (cpus_offset
< 0) {
225 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
227 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
233 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
234 pft_size_prop
, sizeof(pft_size_prop
));
239 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
);
244 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
245 ppc_get_compat_smt_threads(cpu
));
253 static hwaddr
spapr_node0_size(void)
255 MachineState
*machine
= MACHINE(qdev_get_machine());
259 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
260 if (numa_info
[i
].node_mem
) {
261 return MIN(pow2floor(numa_info
[i
].node_mem
),
266 return machine
->ram_size
;
269 static void add_str(GString
*s
, const gchar
*s1
)
271 g_string_append_len(s
, s1
, strlen(s1
) + 1);
274 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
278 const char *kernel_cmdline
,
282 uint32_t start_prop
= cpu_to_be32(initrd_base
);
283 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
284 GString
*hypertas
= g_string_sized_new(256);
285 GString
*qemu_hypertas
= g_string_sized_new(256);
286 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
287 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(max_cpus
)};
288 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
291 add_str(hypertas
, "hcall-pft");
292 add_str(hypertas
, "hcall-term");
293 add_str(hypertas
, "hcall-dabr");
294 add_str(hypertas
, "hcall-interrupt");
295 add_str(hypertas
, "hcall-tce");
296 add_str(hypertas
, "hcall-vio");
297 add_str(hypertas
, "hcall-splpar");
298 add_str(hypertas
, "hcall-bulk");
299 add_str(hypertas
, "hcall-set-mode");
300 add_str(hypertas
, "hcall-sprg0");
301 add_str(hypertas
, "hcall-copy");
302 add_str(hypertas
, "hcall-debug");
303 add_str(qemu_hypertas
, "hcall-memop1");
305 fdt
= g_malloc0(FDT_MAX_SIZE
);
306 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
309 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
312 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
314 _FDT((fdt_finish_reservemap(fdt
)));
317 _FDT((fdt_begin_node(fdt
, "")));
318 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
319 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
320 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
323 * Add info to guest to indentify which host is it being run on
324 * and what is the uuid of the guest
326 if (kvmppc_get_host_model(&buf
)) {
327 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
330 if (kvmppc_get_host_serial(&buf
)) {
331 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
335 buf
= qemu_uuid_unparse_strdup(&qemu_uuid
);
337 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
339 _FDT((fdt_property_string(fdt
, "system-id", buf
)));
343 if (qemu_get_vm_name()) {
344 _FDT((fdt_property_string(fdt
, "ibm,partition-name",
345 qemu_get_vm_name())));
348 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
349 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
352 _FDT((fdt_begin_node(fdt
, "chosen")));
354 /* Set Form1_affinity */
355 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
357 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
358 _FDT((fdt_property(fdt
, "linux,initrd-start",
359 &start_prop
, sizeof(start_prop
))));
360 _FDT((fdt_property(fdt
, "linux,initrd-end",
361 &end_prop
, sizeof(end_prop
))));
363 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
364 cpu_to_be64(kernel_size
) };
366 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
368 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
372 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
374 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
375 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
376 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
378 _FDT((fdt_end_node(fdt
)));
381 _FDT((fdt_begin_node(fdt
, "rtas")));
383 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
384 add_str(hypertas
, "hcall-multi-tce");
386 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
388 g_string_free(hypertas
, TRUE
);
389 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
390 qemu_hypertas
->len
)));
391 g_string_free(qemu_hypertas
, TRUE
);
393 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
394 refpoints
, sizeof(refpoints
))));
396 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
397 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
398 RTAS_EVENT_SCAN_RATE
)));
401 _FDT((fdt_property(fdt
, "ibm,change-msix-capable", NULL
, 0)));
405 * According to PAPR, rtas ibm,os-term does not guarantee a return
406 * back to the guest cpu.
408 * While an additional ibm,extended-os-term property indicates that
409 * rtas call return will always occur. Set this property.
411 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
413 _FDT((fdt_end_node(fdt
)));
415 /* interrupt controller */
416 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
418 _FDT((fdt_property_string(fdt
, "device_type",
419 "PowerPC-External-Interrupt-Presentation")));
420 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
421 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
422 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
423 interrupt_server_ranges_prop
,
424 sizeof(interrupt_server_ranges_prop
))));
425 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
426 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
427 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
429 _FDT((fdt_end_node(fdt
)));
432 _FDT((fdt_begin_node(fdt
, "vdevice")));
434 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
435 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
436 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
437 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
438 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
439 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
441 _FDT((fdt_end_node(fdt
)));
444 spapr_events_fdt_skel(fdt
, epow_irq
);
446 /* /hypervisor node */
448 uint8_t hypercall
[16];
450 /* indicate KVM hypercall interface */
451 _FDT((fdt_begin_node(fdt
, "hypervisor")));
452 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
453 if (kvmppc_has_cap_fixup_hcalls()) {
455 * Older KVM versions with older guest kernels were broken with the
456 * magic page, don't allow the guest to map it.
458 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
459 sizeof(hypercall
))) {
460 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
461 sizeof(hypercall
))));
464 _FDT((fdt_end_node(fdt
)));
467 _FDT((fdt_end_node(fdt
))); /* close root node */
468 _FDT((fdt_finish(fdt
)));
473 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
476 uint32_t associativity
[] = {
477 cpu_to_be32(0x4), /* length */
478 cpu_to_be32(0x0), cpu_to_be32(0x0),
479 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
482 uint64_t mem_reg_property
[2];
485 mem_reg_property
[0] = cpu_to_be64(start
);
486 mem_reg_property
[1] = cpu_to_be64(size
);
488 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
489 off
= fdt_add_subnode(fdt
, 0, mem_name
);
491 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
492 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
493 sizeof(mem_reg_property
))));
494 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
495 sizeof(associativity
))));
499 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
501 MachineState
*machine
= MACHINE(spapr
);
502 hwaddr mem_start
, node_size
;
503 int i
, nb_nodes
= nb_numa_nodes
;
504 NodeInfo
*nodes
= numa_info
;
507 /* No NUMA nodes, assume there is just one node with whole RAM */
508 if (!nb_numa_nodes
) {
510 ramnode
.node_mem
= machine
->ram_size
;
514 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
515 if (!nodes
[i
].node_mem
) {
518 if (mem_start
>= machine
->ram_size
) {
521 node_size
= nodes
[i
].node_mem
;
522 if (node_size
> machine
->ram_size
- mem_start
) {
523 node_size
= machine
->ram_size
- mem_start
;
527 /* ppc_spapr_init() checks for rma_size <= node0_size already */
528 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
529 mem_start
+= spapr
->rma_size
;
530 node_size
-= spapr
->rma_size
;
532 for ( ; node_size
; ) {
533 hwaddr sizetmp
= pow2floor(node_size
);
535 /* mem_start != 0 here */
536 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
537 sizetmp
= 1ULL << ctzl(mem_start
);
540 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
541 node_size
-= sizetmp
;
542 mem_start
+= sizetmp
;
549 /* Populate the "ibm,pa-features" property */
550 static void spapr_populate_pa_features(CPUPPCState
*env
, void *fdt
, int offset
)
552 uint8_t pa_features_206
[] = { 6, 0,
553 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
554 uint8_t pa_features_207
[] = { 24, 0,
555 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
556 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
557 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
558 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
559 uint8_t *pa_features
;
562 switch (env
->mmu_model
) {
563 case POWERPC_MMU_2_06
:
564 case POWERPC_MMU_2_06a
:
565 pa_features
= pa_features_206
;
566 pa_size
= sizeof(pa_features_206
);
568 case POWERPC_MMU_2_07
:
569 case POWERPC_MMU_2_07a
:
570 pa_features
= pa_features_207
;
571 pa_size
= sizeof(pa_features_207
);
577 if (env
->ci_large_pages
) {
579 * Note: we keep CI large pages off by default because a 64K capable
580 * guest provisioned with large pages might otherwise try to map a qemu
581 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
582 * even if that qemu runs on a 4k host.
583 * We dd this bit back here if we are confident this is not an issue
585 pa_features
[3] |= 0x20;
587 if (kvmppc_has_cap_htm() && pa_size
> 24) {
588 pa_features
[24] |= 0x80; /* Transactional memory support */
591 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
594 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
595 sPAPRMachineState
*spapr
)
597 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
598 CPUPPCState
*env
= &cpu
->env
;
599 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
600 int index
= ppc_get_vcpu_dt_id(cpu
);
601 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
602 0xffffffff, 0xffffffff};
603 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
604 : SPAPR_TIMEBASE_FREQ
;
605 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
606 uint32_t page_sizes_prop
[64];
607 size_t page_sizes_prop_size
;
608 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
609 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
610 sPAPRDRConnector
*drc
;
611 sPAPRDRConnectorClass
*drck
;
614 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU
, index
);
616 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
617 drc_index
= drck
->get_index(drc
);
618 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
621 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
622 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
624 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
625 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
626 env
->dcache_line_size
)));
627 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
628 env
->dcache_line_size
)));
629 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
630 env
->icache_line_size
)));
631 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
632 env
->icache_line_size
)));
634 if (pcc
->l1_dcache_size
) {
635 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
636 pcc
->l1_dcache_size
)));
638 error_report("Warning: Unknown L1 dcache size for cpu");
640 if (pcc
->l1_icache_size
) {
641 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
642 pcc
->l1_icache_size
)));
644 error_report("Warning: Unknown L1 icache size for cpu");
647 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
648 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
649 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
650 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
651 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
652 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
654 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
655 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
658 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
659 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
660 segs
, sizeof(segs
))));
663 /* Advertise VMX/VSX (vector extensions) if available
664 * 0 / no property == no vector extensions
665 * 1 == VMX / Altivec available
666 * 2 == VSX available */
667 if (env
->insns_flags
& PPC_ALTIVEC
) {
668 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
670 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
673 /* Advertise DFP (Decimal Floating Point) if available
674 * 0 / no property == no DFP
675 * 1 == DFP available */
676 if (env
->insns_flags2
& PPC2_DFP
) {
677 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
680 page_sizes_prop_size
= ppc_create_page_sizes_prop(env
, page_sizes_prop
,
681 sizeof(page_sizes_prop
));
682 if (page_sizes_prop_size
) {
683 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
684 page_sizes_prop
, page_sizes_prop_size
)));
687 spapr_populate_pa_features(env
, fdt
, offset
);
689 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
690 cs
->cpu_index
/ vcpus_per_socket
)));
692 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
693 pft_size_prop
, sizeof(pft_size_prop
))));
695 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
));
697 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
698 ppc_get_compat_smt_threads(cpu
)));
701 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
706 int smt
= kvmppc_smt_threads();
708 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
710 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
711 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
714 * We walk the CPUs in reverse order to ensure that CPU DT nodes
715 * created by fdt_add_subnode() end up in the right order in FDT
716 * for the guest kernel the enumerate the CPUs correctly.
718 CPU_FOREACH_REVERSE(cs
) {
719 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
720 int index
= ppc_get_vcpu_dt_id(cpu
);
721 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
724 if ((index
% smt
) != 0) {
728 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
729 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
732 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
738 * Adds ibm,dynamic-reconfiguration-memory node.
739 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
740 * of this device tree node.
742 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
744 MachineState
*machine
= MACHINE(spapr
);
746 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
747 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
748 uint32_t hotplug_lmb_start
= spapr
->hotplug_memory
.base
/ lmb_size
;
749 uint32_t nr_lmbs
= (spapr
->hotplug_memory
.base
+
750 memory_region_size(&spapr
->hotplug_memory
.mr
)) /
752 uint32_t *int_buf
, *cur_index
, buf_len
;
753 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
756 * Don't create the node if there is no hotpluggable memory
758 if (machine
->ram_size
== machine
->maxram_size
) {
763 * Allocate enough buffer size to fit in ibm,dynamic-memory
764 * or ibm,associativity-lookup-arrays
766 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
768 cur_index
= int_buf
= g_malloc0(buf_len
);
770 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
772 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
773 sizeof(prop_lmb_size
));
778 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
783 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
788 /* ibm,dynamic-memory */
789 int_buf
[0] = cpu_to_be32(nr_lmbs
);
791 for (i
= 0; i
< nr_lmbs
; i
++) {
792 uint64_t addr
= i
* lmb_size
;
793 uint32_t *dynamic_memory
= cur_index
;
795 if (i
>= hotplug_lmb_start
) {
796 sPAPRDRConnector
*drc
;
797 sPAPRDRConnectorClass
*drck
;
799 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
, i
);
801 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
803 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
804 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
805 dynamic_memory
[2] = cpu_to_be32(drck
->get_index(drc
));
806 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
807 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
808 if (memory_region_present(get_system_memory(), addr
)) {
809 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
811 dynamic_memory
[5] = cpu_to_be32(0);
815 * LMB information for RMA, boot time RAM and gap b/n RAM and
816 * hotplug memory region -- all these are marked as reserved
817 * and as having no valid DRC.
819 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
820 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
821 dynamic_memory
[2] = cpu_to_be32(0);
822 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
823 dynamic_memory
[4] = cpu_to_be32(-1);
824 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
825 SPAPR_LMB_FLAGS_DRC_INVALID
);
828 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
830 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
835 /* ibm,associativity-lookup-arrays */
837 int_buf
[0] = cpu_to_be32(nr_nodes
);
838 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
840 for (i
= 0; i
< nr_nodes
; i
++) {
841 uint32_t associativity
[] = {
847 memcpy(cur_index
, associativity
, sizeof(associativity
));
850 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
851 (cur_index
- int_buf
) * sizeof(uint32_t));
857 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
858 target_ulong addr
, target_ulong size
,
859 bool cpu_update
, bool memory_update
)
861 void *fdt
, *fdt_skel
;
862 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
863 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
867 /* Create sceleton */
868 fdt_skel
= g_malloc0(size
);
869 _FDT((fdt_create(fdt_skel
, size
)));
870 _FDT((fdt_begin_node(fdt_skel
, "")));
871 _FDT((fdt_end_node(fdt_skel
)));
872 _FDT((fdt_finish(fdt_skel
)));
873 fdt
= g_malloc0(size
);
874 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
877 /* Fixup cpu nodes */
879 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
882 /* Generate ibm,dynamic-reconfiguration-memory node if required */
883 if (memory_update
&& smc
->dr_lmb_enabled
) {
884 _FDT((spapr_populate_drconf_memory(spapr
, fdt
)));
887 /* Pack resulting tree */
888 _FDT((fdt_pack(fdt
)));
890 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
891 trace_spapr_cas_failed(size
);
895 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
896 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
897 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
903 static void *spapr_build_fdt(sPAPRMachineState
*spapr
,
907 MachineState
*machine
= MACHINE(qdev_get_machine());
908 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
909 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
910 const char *boot_device
= machine
->boot_order
;
917 fdt
= g_malloc(FDT_MAX_SIZE
);
919 /* open out the base tree into a temp buffer for the final tweaks */
920 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
922 ret
= spapr_populate_memory(spapr
, fdt
);
924 error_report("couldn't setup memory nodes in fdt");
928 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
930 error_report("couldn't setup vio devices in fdt");
934 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
935 ret
= spapr_rng_populate_dt(fdt
);
937 error_report("could not set up rng device in the fdt");
942 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
943 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
945 error_report("couldn't setup PCI devices in fdt");
951 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
953 error_report("Couldn't set up RTAS device tree properties");
957 spapr_populate_cpus_dt_node(fdt
, spapr
);
959 bootlist
= get_boot_devices_list(&cb
, true);
960 if (cb
&& bootlist
) {
961 int offset
= fdt_path_offset(fdt
, "/chosen");
965 for (i
= 0; i
< cb
; i
++) {
966 if (bootlist
[i
] == '\n') {
971 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
974 if (boot_device
&& strlen(boot_device
)) {
975 int offset
= fdt_path_offset(fdt
, "/chosen");
980 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
983 if (!spapr
->has_graphics
) {
984 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
987 if (smc
->dr_lmb_enabled
) {
988 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
991 if (mc
->query_hotpluggable_cpus
) {
992 int offset
= fdt_path_offset(fdt
, "/cpus");
993 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
994 SPAPR_DR_CONNECTOR_TYPE_CPU
);
996 error_report("Couldn't set up CPU DR device tree properties");
1005 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1007 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1010 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
1012 CPUPPCState
*env
= &cpu
->env
;
1015 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1016 env
->gpr
[3] = H_PRIVILEGE
;
1018 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1022 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1023 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1024 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1025 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1026 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1029 * Get the fd to access the kernel htab, re-opening it if necessary
1031 static int get_htab_fd(sPAPRMachineState
*spapr
)
1033 if (spapr
->htab_fd
>= 0) {
1034 return spapr
->htab_fd
;
1037 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1038 if (spapr
->htab_fd
< 0) {
1039 error_report("Unable to open fd for reading hash table from KVM: %s",
1043 return spapr
->htab_fd
;
1046 static void close_htab_fd(sPAPRMachineState
*spapr
)
1048 if (spapr
->htab_fd
>= 0) {
1049 close(spapr
->htab_fd
);
1051 spapr
->htab_fd
= -1;
1054 static int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1058 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1059 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1060 * that's much more than is needed for Linux guests */
1061 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1062 shift
= MAX(shift
, 18); /* Minimum architected size */
1063 shift
= MIN(shift
, 46); /* Maximum architected size */
1067 static void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1072 /* Clean up any HPT info from a previous boot */
1073 g_free(spapr
->htab
);
1075 spapr
->htab_shift
= 0;
1076 close_htab_fd(spapr
);
1078 rc
= kvmppc_reset_htab(shift
);
1080 /* kernel-side HPT needed, but couldn't allocate one */
1081 error_setg_errno(errp
, errno
,
1082 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1084 /* This is almost certainly fatal, but if the caller really
1085 * wants to carry on with shift == 0, it's welcome to try */
1086 } else if (rc
> 0) {
1087 /* kernel-side HPT allocated */
1090 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1094 spapr
->htab_shift
= shift
;
1097 /* kernel-side HPT not needed, allocate in userspace instead */
1098 size_t size
= 1ULL << shift
;
1101 spapr
->htab
= qemu_memalign(size
, size
);
1103 error_setg_errno(errp
, errno
,
1104 "Could not allocate HPT of order %d", shift
);
1108 memset(spapr
->htab
, 0, size
);
1109 spapr
->htab_shift
= shift
;
1111 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1112 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1117 static void find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1119 bool matched
= false;
1121 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1126 error_report("Device %s is not supported by this machine yet.",
1127 qdev_fw_name(DEVICE(sbdev
)));
1132 static void ppc_spapr_reset(void)
1134 MachineState
*machine
= MACHINE(qdev_get_machine());
1135 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1136 PowerPCCPU
*first_ppc_cpu
;
1137 uint32_t rtas_limit
;
1138 hwaddr rtas_addr
, fdt_addr
;
1142 /* Check for unknown sysbus devices */
1143 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1145 /* Allocate and/or reset the hash page table */
1146 spapr_reallocate_hpt(spapr
,
1147 spapr_hpt_shift_for_ramsize(machine
->maxram_size
),
1150 /* Update the RMA size if necessary */
1151 if (spapr
->vrma_adjust
) {
1152 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
1156 qemu_devices_reset();
1159 * We place the device tree and RTAS just below either the top of the RMA,
1160 * or just below 2GB, whichever is lowere, so that it can be
1161 * processed with 32-bit real mode code if necessary
1163 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1164 rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1165 fdt_addr
= rtas_addr
- FDT_MAX_SIZE
;
1167 fdt
= spapr_build_fdt(spapr
, rtas_addr
, spapr
->rtas_size
);
1169 /* Copy RTAS over */
1170 cpu_physical_memory_write(rtas_addr
, spapr
->rtas_blob
, spapr
->rtas_size
);
1174 /* Should only fail if we've built a corrupted tree */
1177 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1178 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1179 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1184 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1185 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1188 /* Set up the entry state */
1189 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1190 first_ppc_cpu
->env
.gpr
[3] = fdt_addr
;
1191 first_ppc_cpu
->env
.gpr
[5] = 0;
1192 first_cpu
->halted
= 0;
1193 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1197 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1199 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1200 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1203 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1207 qdev_init_nofail(dev
);
1209 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1212 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1214 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1216 qdev_init_nofail(dev
);
1219 object_property_add_alias(qdev_get_machine(), "rtc-time",
1220 OBJECT(spapr
->rtc
), "date", NULL
);
1223 /* Returns whether we want to use VGA or not */
1224 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1226 switch (vga_interface_type
) {
1233 return pci_vga_init(pci_bus
) != NULL
;
1236 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1241 static int spapr_post_load(void *opaque
, int version_id
)
1243 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1246 /* In earlier versions, there was no separate qdev for the PAPR
1247 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1248 * So when migrating from those versions, poke the incoming offset
1249 * value into the RTC device */
1250 if (version_id
< 3) {
1251 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1257 static bool version_before_3(void *opaque
, int version_id
)
1259 return version_id
< 3;
1262 static const VMStateDescription vmstate_spapr
= {
1265 .minimum_version_id
= 1,
1266 .post_load
= spapr_post_load
,
1267 .fields
= (VMStateField
[]) {
1268 /* used to be @next_irq */
1269 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1272 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1274 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1275 VMSTATE_END_OF_LIST()
1279 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1281 sPAPRMachineState
*spapr
= opaque
;
1283 /* "Iteration" header */
1284 qemu_put_be32(f
, spapr
->htab_shift
);
1287 spapr
->htab_save_index
= 0;
1288 spapr
->htab_first_pass
= true;
1290 assert(kvm_enabled());
1297 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1300 bool has_timeout
= max_ns
!= -1;
1301 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1302 int index
= spapr
->htab_save_index
;
1303 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1305 assert(spapr
->htab_first_pass
);
1310 /* Consume invalid HPTEs */
1311 while ((index
< htabslots
)
1312 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1314 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1317 /* Consume valid HPTEs */
1319 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1320 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1322 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1325 if (index
> chunkstart
) {
1326 int n_valid
= index
- chunkstart
;
1328 qemu_put_be32(f
, chunkstart
);
1329 qemu_put_be16(f
, n_valid
);
1330 qemu_put_be16(f
, 0);
1331 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1332 HASH_PTE_SIZE_64
* n_valid
);
1335 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1339 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1341 if (index
>= htabslots
) {
1342 assert(index
== htabslots
);
1344 spapr
->htab_first_pass
= false;
1346 spapr
->htab_save_index
= index
;
1349 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1352 bool final
= max_ns
< 0;
1353 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1354 int examined
= 0, sent
= 0;
1355 int index
= spapr
->htab_save_index
;
1356 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1358 assert(!spapr
->htab_first_pass
);
1361 int chunkstart
, invalidstart
;
1363 /* Consume non-dirty HPTEs */
1364 while ((index
< htabslots
)
1365 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1371 /* Consume valid dirty HPTEs */
1372 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1373 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1374 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1375 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1380 invalidstart
= index
;
1381 /* Consume invalid dirty HPTEs */
1382 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1383 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1384 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1385 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1390 if (index
> chunkstart
) {
1391 int n_valid
= invalidstart
- chunkstart
;
1392 int n_invalid
= index
- invalidstart
;
1394 qemu_put_be32(f
, chunkstart
);
1395 qemu_put_be16(f
, n_valid
);
1396 qemu_put_be16(f
, n_invalid
);
1397 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1398 HASH_PTE_SIZE_64
* n_valid
);
1399 sent
+= index
- chunkstart
;
1401 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1406 if (examined
>= htabslots
) {
1410 if (index
>= htabslots
) {
1411 assert(index
== htabslots
);
1414 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1416 if (index
>= htabslots
) {
1417 assert(index
== htabslots
);
1421 spapr
->htab_save_index
= index
;
1423 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1426 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1427 #define MAX_KVM_BUF_SIZE 2048
1429 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1431 sPAPRMachineState
*spapr
= opaque
;
1435 /* Iteration header */
1436 qemu_put_be32(f
, 0);
1439 assert(kvm_enabled());
1441 fd
= get_htab_fd(spapr
);
1446 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1450 } else if (spapr
->htab_first_pass
) {
1451 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1453 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1457 qemu_put_be32(f
, 0);
1458 qemu_put_be16(f
, 0);
1459 qemu_put_be16(f
, 0);
1464 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1466 sPAPRMachineState
*spapr
= opaque
;
1469 /* Iteration header */
1470 qemu_put_be32(f
, 0);
1475 assert(kvm_enabled());
1477 fd
= get_htab_fd(spapr
);
1482 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
1487 if (spapr
->htab_first_pass
) {
1488 htab_save_first_pass(f
, spapr
, -1);
1490 htab_save_later_pass(f
, spapr
, -1);
1494 qemu_put_be32(f
, 0);
1495 qemu_put_be16(f
, 0);
1496 qemu_put_be16(f
, 0);
1501 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1503 sPAPRMachineState
*spapr
= opaque
;
1504 uint32_t section_hdr
;
1507 if (version_id
< 1 || version_id
> 1) {
1508 error_report("htab_load() bad version");
1512 section_hdr
= qemu_get_be32(f
);
1515 Error
*local_err
= NULL
;
1517 /* First section gives the htab size */
1518 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
1520 error_report_err(local_err
);
1527 assert(kvm_enabled());
1529 fd
= kvmppc_get_htab_fd(true);
1531 error_report("Unable to open fd to restore KVM hash table: %s",
1538 uint16_t n_valid
, n_invalid
;
1540 index
= qemu_get_be32(f
);
1541 n_valid
= qemu_get_be16(f
);
1542 n_invalid
= qemu_get_be16(f
);
1544 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1549 if ((index
+ n_valid
+ n_invalid
) >
1550 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1551 /* Bad index in stream */
1553 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
1554 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
1560 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1561 HASH_PTE_SIZE_64
* n_valid
);
1564 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1565 HASH_PTE_SIZE_64
* n_invalid
);
1572 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1587 static void htab_cleanup(void *opaque
)
1589 sPAPRMachineState
*spapr
= opaque
;
1591 close_htab_fd(spapr
);
1594 static SaveVMHandlers savevm_htab_handlers
= {
1595 .save_live_setup
= htab_save_setup
,
1596 .save_live_iterate
= htab_save_iterate
,
1597 .save_live_complete_precopy
= htab_save_complete
,
1598 .cleanup
= htab_cleanup
,
1599 .load_state
= htab_load
,
1602 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1605 MachineState
*machine
= MACHINE(qdev_get_machine());
1606 machine
->boot_order
= g_strdup(boot_device
);
1610 * Reset routine for LMB DR devices.
1612 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
1613 * routine. Reset for PCI DR devices will be handled by PHB reset routine
1614 * when it walks all its children devices. LMB devices reset occurs
1615 * as part of spapr_ppc_reset().
1617 static void spapr_drc_reset(void *opaque
)
1619 sPAPRDRConnector
*drc
= opaque
;
1620 DeviceState
*d
= DEVICE(drc
);
1627 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
1629 MachineState
*machine
= MACHINE(spapr
);
1630 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
1631 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
1634 for (i
= 0; i
< nr_lmbs
; i
++) {
1635 sPAPRDRConnector
*drc
;
1638 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
1639 drc
= spapr_dr_connector_new(OBJECT(spapr
), SPAPR_DR_CONNECTOR_TYPE_LMB
,
1641 qemu_register_reset(spapr_drc_reset
, drc
);
1646 * If RAM size, maxmem size and individual node mem sizes aren't aligned
1647 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
1648 * since we can't support such unaligned sizes with DRCONF_MEMORY.
1650 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
1654 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1655 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
1656 " is not aligned to %llu MiB",
1658 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1662 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1663 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
1664 " is not aligned to %llu MiB",
1666 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1670 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1671 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
1673 "Node %d memory size 0x%" PRIx64
1674 " is not aligned to %llu MiB",
1675 i
, numa_info
[i
].node_mem
,
1676 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1682 /* pSeries LPAR / sPAPR hardware init */
1683 static void ppc_spapr_init(MachineState
*machine
)
1685 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1686 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1687 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1688 const char *kernel_filename
= machine
->kernel_filename
;
1689 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1690 const char *initrd_filename
= machine
->initrd_filename
;
1693 MemoryRegion
*sysmem
= get_system_memory();
1694 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1695 MemoryRegion
*rma_region
;
1697 hwaddr rma_alloc_size
;
1698 hwaddr node0_size
= spapr_node0_size();
1699 uint32_t initrd_base
= 0;
1700 long kernel_size
= 0, initrd_size
= 0;
1701 long load_limit
, fw_size
;
1702 bool kernel_le
= false;
1704 int smt
= kvmppc_smt_threads();
1705 int spapr_cores
= smp_cpus
/ smp_threads
;
1706 int spapr_max_cores
= max_cpus
/ smp_threads
;
1708 if (mc
->query_hotpluggable_cpus
) {
1709 if (smp_cpus
% smp_threads
) {
1710 error_report("smp_cpus (%u) must be multiple of threads (%u)",
1711 smp_cpus
, smp_threads
);
1714 if (max_cpus
% smp_threads
) {
1715 error_report("max_cpus (%u) must be multiple of threads (%u)",
1716 max_cpus
, smp_threads
);
1721 msi_nonbroken
= true;
1723 QLIST_INIT(&spapr
->phbs
);
1725 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1727 /* Allocate RMA if necessary */
1728 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1730 if (rma_alloc_size
== -1) {
1731 error_report("Unable to create RMA");
1735 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1736 spapr
->rma_size
= rma_alloc_size
;
1738 spapr
->rma_size
= node0_size
;
1740 /* With KVM, we don't actually know whether KVM supports an
1741 * unbounded RMA (PR KVM) or is limited by the hash table size
1742 * (HV KVM using VRMA), so we always assume the latter
1744 * In that case, we also limit the initial allocations for RTAS
1745 * etc... to 256M since we have no way to know what the VRMA size
1746 * is going to be as it depends on the size of the hash table
1747 * isn't determined yet.
1749 if (kvm_enabled()) {
1750 spapr
->vrma_adjust
= 1;
1751 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1754 /* Actually we don't support unbounded RMA anymore since we
1755 * added proper emulation of HV mode. The max we can get is
1756 * 16G which also happens to be what we configure for PAPR
1757 * mode so make sure we don't do anything bigger than that
1759 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x400000000ull
);
1762 if (spapr
->rma_size
> node0_size
) {
1763 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
1768 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1769 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1771 /* Set up Interrupt Controller before we create the VCPUs */
1772 spapr
->xics
= xics_system_init(machine
,
1773 DIV_ROUND_UP(max_cpus
* smt
, smp_threads
),
1774 XICS_IRQS_SPAPR
, &error_fatal
);
1776 if (smc
->dr_lmb_enabled
) {
1777 spapr_validate_node_memory(machine
, &error_fatal
);
1781 if (machine
->cpu_model
== NULL
) {
1782 machine
->cpu_model
= kvm_enabled() ? "host" : smc
->tcg_default_cpu
;
1785 ppc_cpu_parse_features(machine
->cpu_model
);
1787 if (mc
->query_hotpluggable_cpus
) {
1788 char *type
= spapr_get_cpu_core_type(machine
->cpu_model
);
1791 error_report("Unable to find sPAPR CPU Core definition");
1795 spapr
->cores
= g_new0(Object
*, spapr_max_cores
);
1796 for (i
= 0; i
< spapr_max_cores
; i
++) {
1797 int core_id
= i
* smp_threads
;
1798 sPAPRDRConnector
*drc
=
1799 spapr_dr_connector_new(OBJECT(spapr
),
1800 SPAPR_DR_CONNECTOR_TYPE_CPU
,
1801 (core_id
/ smp_threads
) * smt
);
1803 qemu_register_reset(spapr_drc_reset
, drc
);
1805 if (i
< spapr_cores
) {
1806 Object
*core
= object_new(type
);
1807 object_property_set_int(core
, smp_threads
, "nr-threads",
1809 object_property_set_int(core
, core_id
, CPU_CORE_PROP_CORE_ID
,
1811 object_property_set_bool(core
, true, "realized", &error_fatal
);
1816 for (i
= 0; i
< smp_cpus
; i
++) {
1817 PowerPCCPU
*cpu
= cpu_ppc_init(machine
->cpu_model
);
1819 error_report("Unable to find PowerPC CPU definition");
1822 spapr_cpu_init(spapr
, cpu
, &error_fatal
);
1826 if (kvm_enabled()) {
1827 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1828 kvmppc_enable_logical_ci_hcalls();
1829 kvmppc_enable_set_mode_hcall();
1831 /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
1832 kvmppc_enable_clear_ref_mod_hcalls();
1836 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1838 memory_region_add_subregion(sysmem
, 0, ram
);
1840 if (rma_alloc_size
&& rma
) {
1841 rma_region
= g_new(MemoryRegion
, 1);
1842 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1843 rma_alloc_size
, rma
);
1844 vmstate_register_ram_global(rma_region
);
1845 memory_region_add_subregion(sysmem
, 0, rma_region
);
1848 /* initialize hotplug memory address space */
1849 if (machine
->ram_size
< machine
->maxram_size
) {
1850 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
1852 * Limit the number of hotpluggable memory slots to half the number
1853 * slots that KVM supports, leaving the other half for PCI and other
1854 * devices. However ensure that number of slots doesn't drop below 32.
1856 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
1857 SPAPR_MAX_RAM_SLOTS
;
1859 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
1860 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
1862 if (machine
->ram_slots
> max_memslots
) {
1863 error_report("Specified number of memory slots %"
1864 PRIu64
" exceeds max supported %d",
1865 machine
->ram_slots
, max_memslots
);
1869 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
1870 SPAPR_HOTPLUG_MEM_ALIGN
);
1871 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
1872 "hotplug-memory", hotplug_mem_size
);
1873 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
1874 &spapr
->hotplug_memory
.mr
);
1877 if (smc
->dr_lmb_enabled
) {
1878 spapr_create_lmb_dr_connectors(spapr
);
1881 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1883 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1886 spapr
->rtas_size
= get_image_size(filename
);
1887 if (spapr
->rtas_size
< 0) {
1888 error_report("Could not get size of LPAR rtas '%s'", filename
);
1891 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1892 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1893 error_report("Could not load LPAR rtas '%s'", filename
);
1896 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1897 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1898 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1903 /* Set up EPOW events infrastructure */
1904 spapr_events_init(spapr
);
1906 /* Set up the RTC RTAS interfaces */
1907 spapr_rtc_create(spapr
);
1909 /* Set up VIO bus */
1910 spapr
->vio_bus
= spapr_vio_bus_init();
1912 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1913 if (serial_hds
[i
]) {
1914 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1918 /* We always have at least the nvram device on VIO */
1919 spapr_create_nvram(spapr
);
1922 spapr_pci_rtas_init();
1924 phb
= spapr_create_phb(spapr
, 0);
1926 for (i
= 0; i
< nb_nics
; i
++) {
1927 NICInfo
*nd
= &nd_table
[i
];
1930 nd
->model
= g_strdup("ibmveth");
1933 if (strcmp(nd
->model
, "ibmveth") == 0) {
1934 spapr_vlan_create(spapr
->vio_bus
, nd
);
1936 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1940 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1941 spapr_vscsi_create(spapr
->vio_bus
);
1945 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
1946 spapr
->has_graphics
= true;
1947 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1951 if (smc
->use_ohci_by_default
) {
1952 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1954 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
1957 if (spapr
->has_graphics
) {
1958 USBBus
*usb_bus
= usb_bus_find(-1);
1960 usb_create_simple(usb_bus
, "usb-kbd");
1961 usb_create_simple(usb_bus
, "usb-mouse");
1965 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1967 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
1972 if (kernel_filename
) {
1973 uint64_t lowaddr
= 0;
1975 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1976 NULL
, &lowaddr
, NULL
, 1, PPC_ELF_MACHINE
,
1978 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1979 kernel_size
= load_elf(kernel_filename
,
1980 translate_kernel_address
, NULL
,
1981 NULL
, &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
1983 kernel_le
= kernel_size
> 0;
1985 if (kernel_size
< 0) {
1986 error_report("error loading %s: %s",
1987 kernel_filename
, load_elf_strerror(kernel_size
));
1992 if (initrd_filename
) {
1993 /* Try to locate the initrd in the gap between the kernel
1994 * and the firmware. Add a bit of space just in case
1996 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1997 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1998 load_limit
- initrd_base
);
1999 if (initrd_size
< 0) {
2000 error_report("could not load initial ram disk '%s'",
2010 if (bios_name
== NULL
) {
2011 bios_name
= FW_FILE_NAME
;
2013 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2015 error_report("Could not find LPAR firmware '%s'", bios_name
);
2018 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2020 error_report("Could not load LPAR firmware '%s'", filename
);
2025 /* FIXME: Should register things through the MachineState's qdev
2026 * interface, this is a legacy from the sPAPREnvironment structure
2027 * which predated MachineState but had a similar function */
2028 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2029 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2030 &savevm_htab_handlers
, spapr
);
2032 /* Prepare the device tree */
2033 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
2034 kernel_size
, kernel_le
,
2036 spapr
->check_exception_irq
);
2037 assert(spapr
->fdt_skel
!= NULL
);
2040 QTAILQ_INIT(&spapr
->ccs_list
);
2041 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
2043 qemu_register_boot_set(spapr_boot_set
, spapr
);
2046 static int spapr_kvm_type(const char *vm_type
)
2052 if (!strcmp(vm_type
, "HV")) {
2056 if (!strcmp(vm_type
, "PR")) {
2060 error_report("Unknown kvm-type specified '%s'", vm_type
);
2065 * Implementation of an interface to adjust firmware path
2066 * for the bootindex property handling.
2068 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2071 #define CAST(type, obj, name) \
2072 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2073 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2074 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2077 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2078 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2079 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2083 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2084 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2085 * in the top 16 bits of the 64-bit LUN
2087 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2088 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2089 (uint64_t)id
<< 48);
2090 } else if (virtio
) {
2092 * We use SRP luns of the form 01000000 | (target << 8) | lun
2093 * in the top 32 bits of the 64-bit LUN
2094 * Note: the quote above is from SLOF and it is wrong,
2095 * the actual binding is:
2096 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2098 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2099 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2100 (uint64_t)id
<< 32);
2103 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2104 * in the top 32 bits of the 64-bit LUN
2106 unsigned usb_port
= atoi(usb
->port
->path
);
2107 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2108 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2109 (uint64_t)id
<< 32);
2114 /* Replace "pci" with "pci@800000020000000" */
2115 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2121 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2123 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2125 return g_strdup(spapr
->kvm_type
);
2128 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2130 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2132 g_free(spapr
->kvm_type
);
2133 spapr
->kvm_type
= g_strdup(value
);
2136 static void spapr_machine_initfn(Object
*obj
)
2138 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2140 spapr
->htab_fd
= -1;
2141 object_property_add_str(obj
, "kvm-type",
2142 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2143 object_property_set_description(obj
, "kvm-type",
2144 "Specifies the KVM virtualization mode (HV, PR)",
2148 static void spapr_machine_finalizefn(Object
*obj
)
2150 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2152 g_free(spapr
->kvm_type
);
2155 static void ppc_cpu_do_nmi_on_cpu(CPUState
*cs
, void *arg
)
2157 cpu_synchronize_state(cs
);
2158 ppc_cpu_do_system_reset(cs
);
2161 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2166 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, NULL
);
2170 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr
, uint64_t size
,
2171 uint32_t node
, Error
**errp
)
2173 sPAPRDRConnector
*drc
;
2174 sPAPRDRConnectorClass
*drck
;
2175 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2176 int i
, fdt_offset
, fdt_size
;
2179 for (i
= 0; i
< nr_lmbs
; i
++) {
2180 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2181 addr
/SPAPR_MEMORY_BLOCK_SIZE
);
2184 fdt
= create_device_tree(&fdt_size
);
2185 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2186 SPAPR_MEMORY_BLOCK_SIZE
);
2188 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
2189 drck
->attach(drc
, dev
, fdt
, fdt_offset
, !dev
->hotplugged
, errp
);
2190 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2192 /* send hotplug notification to the
2193 * guest only in case of hotplugged memory
2195 if (dev
->hotplugged
) {
2196 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
, nr_lmbs
);
2200 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2201 uint32_t node
, Error
**errp
)
2203 Error
*local_err
= NULL
;
2204 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2205 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2206 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2207 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
2208 uint64_t align
= memory_region_get_alignment(mr
);
2209 uint64_t size
= memory_region_size(mr
);
2212 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2213 error_setg(&local_err
, "Hotplugged memory size must be a multiple of "
2214 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
2218 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2223 addr
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
, &local_err
);
2225 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2229 spapr_add_lmbs(dev
, addr
, size
, node
, &error_abort
);
2232 error_propagate(errp
, local_err
);
2235 void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
2236 sPAPRMachineState
*spapr
)
2238 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
2239 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
2240 int id
= ppc_get_vcpu_dt_id(cpu
);
2242 int offset
, fdt_size
;
2245 fdt
= create_device_tree(&fdt_size
);
2246 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
2247 offset
= fdt_add_subnode(fdt
, 0, nodename
);
2249 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
2252 *fdt_offset
= offset
;
2256 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
2257 DeviceState
*dev
, Error
**errp
)
2259 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
2261 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2264 if (!smc
->dr_lmb_enabled
) {
2265 error_setg(errp
, "Memory hotplug not supported for this machine");
2268 node
= object_property_get_int(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
2272 if (node
< 0 || node
>= MAX_NODES
) {
2273 error_setg(errp
, "Invaild node %d", node
);
2278 * Currently PowerPC kernel doesn't allow hot-adding memory to
2279 * memory-less node, but instead will silently add the memory
2280 * to the first node that has some memory. This causes two
2281 * unexpected behaviours for the user.
2283 * - Memory gets hotplugged to a different node than what the user
2285 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
2286 * to memory-less node, a reboot will set things accordingly
2287 * and the previously hotplugged memory now ends in the right node.
2288 * This appears as if some memory moved from one node to another.
2290 * So until kernel starts supporting memory hotplug to memory-less
2291 * nodes, just prevent such attempts upfront in QEMU.
2293 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
2294 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
2299 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
2300 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2301 spapr_core_plug(hotplug_dev
, dev
, errp
);
2305 static void spapr_machine_device_unplug(HotplugHandler
*hotplug_dev
,
2306 DeviceState
*dev
, Error
**errp
)
2308 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
2310 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2311 error_setg(errp
, "Memory hot unplug not supported by sPAPR");
2312 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2313 if (!mc
->query_hotpluggable_cpus
) {
2314 error_setg(errp
, "CPU hot unplug not supported on this machine");
2317 spapr_core_unplug(hotplug_dev
, dev
, errp
);
2321 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
2322 DeviceState
*dev
, Error
**errp
)
2324 if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2325 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
2329 static HotplugHandler
*spapr_get_hotplug_handler(MachineState
*machine
,
2332 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
2333 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2334 return HOTPLUG_HANDLER(machine
);
2339 static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index
)
2341 /* Allocate to NUMA nodes on a "socket" basis (not that concept of
2342 * socket means much for the paravirtualized PAPR platform) */
2343 return cpu_index
/ smp_threads
/ smp_cores
;
2346 static HotpluggableCPUList
*spapr_query_hotpluggable_cpus(MachineState
*machine
)
2349 HotpluggableCPUList
*head
= NULL
;
2350 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2351 int spapr_max_cores
= max_cpus
/ smp_threads
;
2353 for (i
= 0; i
< spapr_max_cores
; i
++) {
2354 HotpluggableCPUList
*list_item
= g_new0(typeof(*list_item
), 1);
2355 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
2356 CpuInstanceProperties
*cpu_props
= g_new0(typeof(*cpu_props
), 1);
2358 cpu_item
->type
= spapr_get_cpu_core_type(machine
->cpu_model
);
2359 cpu_item
->vcpus_count
= smp_threads
;
2360 cpu_props
->has_core_id
= true;
2361 cpu_props
->core_id
= i
* smp_threads
;
2362 /* TODO: add 'has_node/node' here to describe
2363 to which node core belongs */
2365 cpu_item
->props
= cpu_props
;
2366 if (spapr
->cores
[i
]) {
2367 cpu_item
->has_qom_path
= true;
2368 cpu_item
->qom_path
= object_get_canonical_path(spapr
->cores
[i
]);
2370 list_item
->value
= cpu_item
;
2371 list_item
->next
= head
;
2377 static void spapr_phb_placement(sPAPRMachineState
*spapr
, uint32_t index
,
2378 uint64_t *buid
, hwaddr
*pio
,
2379 hwaddr
*mmio32
, hwaddr
*mmio64
,
2380 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
2383 * New-style PHB window placement.
2385 * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
2386 * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
2389 * Some guest kernels can't work with MMIO windows above 1<<46
2390 * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
2392 * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
2393 * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
2394 * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
2395 * 1TiB 64-bit MMIO windows for each PHB.
2397 const uint64_t base_buid
= 0x800000020000000ULL
;
2398 const int max_phbs
=
2399 (SPAPR_PCI_LIMIT
- SPAPR_PCI_BASE
) / SPAPR_PCI_MEM64_WIN_SIZE
- 1;
2402 /* Sanity check natural alignments */
2403 QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
2404 QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
2405 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE
% SPAPR_PCI_MEM32_WIN_SIZE
) != 0);
2406 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE
% SPAPR_PCI_IO_WIN_SIZE
) != 0);
2407 /* Sanity check bounds */
2408 QEMU_BUILD_BUG_ON((max_phbs
* SPAPR_PCI_IO_WIN_SIZE
) > SPAPR_PCI_MEM32_WIN_SIZE
);
2409 QEMU_BUILD_BUG_ON((max_phbs
* SPAPR_PCI_MEM32_WIN_SIZE
) > SPAPR_PCI_MEM64_WIN_SIZE
);
2411 if (index
>= max_phbs
) {
2412 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %u)",
2417 *buid
= base_buid
+ index
;
2418 for (i
= 0; i
< n_dma
; ++i
) {
2419 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
2422 *pio
= SPAPR_PCI_BASE
+ index
* SPAPR_PCI_IO_WIN_SIZE
;
2423 *mmio32
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM32_WIN_SIZE
;
2424 *mmio64
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM64_WIN_SIZE
;
2427 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
2429 MachineClass
*mc
= MACHINE_CLASS(oc
);
2430 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
2431 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
2432 NMIClass
*nc
= NMI_CLASS(oc
);
2433 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
2435 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
2438 * We set up the default / latest behaviour here. The class_init
2439 * functions for the specific versioned machine types can override
2440 * these details for backwards compatibility
2442 mc
->init
= ppc_spapr_init
;
2443 mc
->reset
= ppc_spapr_reset
;
2444 mc
->block_default_type
= IF_SCSI
;
2446 mc
->no_parallel
= 1;
2447 mc
->default_boot_order
= "";
2448 mc
->default_ram_size
= 512 * M_BYTE
;
2449 mc
->kvm_type
= spapr_kvm_type
;
2450 mc
->has_dynamic_sysbus
= true;
2451 mc
->pci_allow_0_address
= true;
2452 mc
->get_hotplug_handler
= spapr_get_hotplug_handler
;
2453 hc
->pre_plug
= spapr_machine_device_pre_plug
;
2454 hc
->plug
= spapr_machine_device_plug
;
2455 hc
->unplug
= spapr_machine_device_unplug
;
2456 mc
->cpu_index_to_socket_id
= spapr_cpu_index_to_socket_id
;
2458 smc
->dr_lmb_enabled
= true;
2459 smc
->tcg_default_cpu
= "POWER8";
2460 mc
->query_hotpluggable_cpus
= spapr_query_hotpluggable_cpus
;
2461 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
2462 nc
->nmi_monitor_handler
= spapr_nmi
;
2463 smc
->phb_placement
= spapr_phb_placement
;
2466 static const TypeInfo spapr_machine_info
= {
2467 .name
= TYPE_SPAPR_MACHINE
,
2468 .parent
= TYPE_MACHINE
,
2470 .instance_size
= sizeof(sPAPRMachineState
),
2471 .instance_init
= spapr_machine_initfn
,
2472 .instance_finalize
= spapr_machine_finalizefn
,
2473 .class_size
= sizeof(sPAPRMachineClass
),
2474 .class_init
= spapr_machine_class_init
,
2475 .interfaces
= (InterfaceInfo
[]) {
2476 { TYPE_FW_PATH_PROVIDER
},
2478 { TYPE_HOTPLUG_HANDLER
},
2483 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
2484 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
2487 MachineClass *mc = MACHINE_CLASS(oc); \
2488 spapr_machine_##suffix##_class_options(mc); \
2490 mc->alias = "pseries"; \
2491 mc->is_default = 1; \
2494 static void spapr_machine_##suffix##_instance_init(Object *obj) \
2496 MachineState *machine = MACHINE(obj); \
2497 spapr_machine_##suffix##_instance_options(machine); \
2499 static const TypeInfo spapr_machine_##suffix##_info = { \
2500 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
2501 .parent = TYPE_SPAPR_MACHINE, \
2502 .class_init = spapr_machine_##suffix##_class_init, \
2503 .instance_init = spapr_machine_##suffix##_instance_init, \
2505 static void spapr_machine_register_##suffix(void) \
2507 type_register(&spapr_machine_##suffix##_info); \
2509 type_init(spapr_machine_register_##suffix)
2514 static void spapr_machine_2_8_instance_options(MachineState
*machine
)
2518 static void spapr_machine_2_8_class_options(MachineClass
*mc
)
2520 /* Defaults for the latest behaviour inherited from the base class */
2523 DEFINE_SPAPR_MACHINE(2_8
, "2.8", true);
2528 #define SPAPR_COMPAT_2_7 \
2531 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
2532 .property = "mem_win_size", \
2533 .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
2536 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
2537 .property = "mem64_win_size", \
2541 static void phb_placement_2_7(sPAPRMachineState
*spapr
, uint32_t index
,
2542 uint64_t *buid
, hwaddr
*pio
,
2543 hwaddr
*mmio32
, hwaddr
*mmio64
,
2544 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
2546 /* Legacy PHB placement for pseries-2.7 and earlier machine types */
2547 const uint64_t base_buid
= 0x800000020000000ULL
;
2548 const hwaddr phb_spacing
= 0x1000000000ULL
; /* 64 GiB */
2549 const hwaddr mmio_offset
= 0xa0000000; /* 2 GiB + 512 MiB */
2550 const hwaddr pio_offset
= 0x80000000; /* 2 GiB */
2551 const uint32_t max_index
= 255;
2552 const hwaddr phb0_alignment
= 0x10000000000ULL
; /* 1 TiB */
2554 uint64_t ram_top
= MACHINE(spapr
)->ram_size
;
2555 hwaddr phb0_base
, phb_base
;
2558 /* Do we have hotpluggable memory? */
2559 if (MACHINE(spapr
)->maxram_size
> ram_top
) {
2560 /* Can't just use maxram_size, because there may be an
2561 * alignment gap between normal and hotpluggable memory
2563 ram_top
= spapr
->hotplug_memory
.base
+
2564 memory_region_size(&spapr
->hotplug_memory
.mr
);
2567 phb0_base
= QEMU_ALIGN_UP(ram_top
, phb0_alignment
);
2569 if (index
> max_index
) {
2570 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %u)",
2575 *buid
= base_buid
+ index
;
2576 for (i
= 0; i
< n_dma
; ++i
) {
2577 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
2580 phb_base
= phb0_base
+ index
* phb_spacing
;
2581 *pio
= phb_base
+ pio_offset
;
2582 *mmio32
= phb_base
+ mmio_offset
;
2584 * We don't set the 64-bit MMIO window, relying on the PHB's
2585 * fallback behaviour of automatically splitting a large "32-bit"
2586 * window into contiguous 32-bit and 64-bit windows
2590 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
2592 spapr_machine_2_8_instance_options(machine
);
2595 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
2597 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2599 spapr_machine_2_8_class_options(mc
);
2600 smc
->tcg_default_cpu
= "POWER7";
2601 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_7
);
2602 smc
->phb_placement
= phb_placement_2_7
;
2605 DEFINE_SPAPR_MACHINE(2_7
, "2.7", false);
2610 #define SPAPR_COMPAT_2_6 \
2613 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2615 .value = stringify(off),\
2618 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
2620 spapr_machine_2_7_instance_options(machine
);
2623 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
2625 spapr_machine_2_7_class_options(mc
);
2626 mc
->query_hotpluggable_cpus
= NULL
;
2627 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
2630 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
2635 #define SPAPR_COMPAT_2_5 \
2638 .driver = "spapr-vlan", \
2639 .property = "use-rx-buffer-pools", \
2643 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
2645 spapr_machine_2_6_instance_options(machine
);
2648 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
2650 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2652 spapr_machine_2_6_class_options(mc
);
2653 smc
->use_ohci_by_default
= true;
2654 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
2657 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
2662 #define SPAPR_COMPAT_2_4 \
2665 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
2667 spapr_machine_2_5_instance_options(machine
);
2670 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
2672 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2674 spapr_machine_2_5_class_options(mc
);
2675 smc
->dr_lmb_enabled
= false;
2676 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
2679 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
2684 #define SPAPR_COMPAT_2_3 \
2687 .driver = "spapr-pci-host-bridge",\
2688 .property = "dynamic-reconfiguration",\
2692 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
2694 spapr_machine_2_4_instance_options(machine
);
2695 savevm_skip_section_footers();
2696 global_state_set_optional();
2697 savevm_skip_configuration();
2700 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
2702 spapr_machine_2_4_class_options(mc
);
2703 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
2705 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
2711 #define SPAPR_COMPAT_2_2 \
2714 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2715 .property = "mem_win_size",\
2716 .value = "0x20000000",\
2719 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
2721 spapr_machine_2_3_instance_options(machine
);
2722 machine
->suppress_vmdesc
= true;
2725 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
2727 spapr_machine_2_3_class_options(mc
);
2728 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
2730 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
2735 #define SPAPR_COMPAT_2_1 \
2738 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
2740 spapr_machine_2_2_instance_options(machine
);
2743 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
2745 spapr_machine_2_2_class_options(mc
);
2746 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
2748 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
2750 static void spapr_machine_register_types(void)
2752 type_register_static(&spapr_machine_info
);
2755 type_init(spapr_machine_register_types
)