2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
29 #include "hw/fw-path-provider.h"
32 #include "sysemu/blockdev.h"
33 #include "sysemu/cpus.h"
34 #include "sysemu/kvm.h"
36 #include "mmu-hash64.h"
39 #include "hw/boards.h"
40 #include "hw/ppc/ppc.h"
41 #include "hw/loader.h"
43 #include "hw/ppc/spapr.h"
44 #include "hw/ppc/spapr_vio.h"
45 #include "hw/pci-host/spapr.h"
46 #include "hw/ppc/xics.h"
47 #include "hw/pci/msi.h"
49 #include "hw/pci/pci.h"
50 #include "hw/scsi/scsi.h"
51 #include "hw/virtio/virtio-scsi.h"
53 #include "exec/address-spaces.h"
55 #include "qemu/config-file.h"
56 #include "qemu/error-report.h"
62 /* SLOF memory layout:
64 * SLOF raw image loaded at 0, copies its romfs right below the flat
65 * device-tree, then position SLOF itself 31M below that
67 * So we set FW_OVERHEAD to 40MB which should account for all of that
70 * We load our kernel at 4M, leaving space for SLOF initial image
72 #define FDT_MAX_SIZE 0x40000
73 #define RTAS_MAX_SIZE 0x10000
74 #define FW_MAX_SIZE 0x400000
75 #define FW_FILE_NAME "slof.bin"
76 #define FW_OVERHEAD 0x2800000
77 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
79 #define MIN_RMA_SLOF 128UL
81 #define TIMEBASE_FREQ 512000000ULL
85 #define PHANDLE_XICP 0x00001111
87 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
89 typedef struct sPAPRMachineState sPAPRMachineState
;
91 #define TYPE_SPAPR_MACHINE "spapr-machine"
92 #define SPAPR_MACHINE(obj) \
93 OBJECT_CHECK(sPAPRMachineState, (obj), TYPE_SPAPR_MACHINE)
98 struct sPAPRMachineState
{
100 MachineState parent_obj
;
106 sPAPREnvironment
*spapr
;
108 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
113 dev
= qdev_create(NULL
, type
);
114 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
115 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
116 if (qdev_init(dev
) < 0) {
120 return XICS_COMMON(dev
);
123 static XICSState
*xics_system_init(int nr_servers
, int nr_irqs
)
125 XICSState
*icp
= NULL
;
128 QemuOpts
*machine_opts
= qemu_get_machine_opts();
129 bool irqchip_allowed
= qemu_opt_get_bool(machine_opts
,
130 "kernel_irqchip", true);
131 bool irqchip_required
= qemu_opt_get_bool(machine_opts
,
132 "kernel_irqchip", false);
133 if (irqchip_allowed
) {
134 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
);
137 if (irqchip_required
&& !icp
) {
138 perror("Failed to create in-kernel XICS\n");
144 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
);
148 perror("Failed to create XICS\n");
155 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
159 uint32_t servers_prop
[smt_threads
];
160 uint32_t gservers_prop
[smt_threads
* 2];
161 int index
= ppc_get_vcpu_dt_id(cpu
);
163 if (cpu
->cpu_version
) {
164 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
170 /* Build interrupt servers and gservers properties */
171 for (i
= 0; i
< smt_threads
; i
++) {
172 servers_prop
[i
] = cpu_to_be32(index
+ i
);
173 /* Hack, direct the group queues back to cpu 0 */
174 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
175 gservers_prop
[i
*2 + 1] = 0;
177 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
178 servers_prop
, sizeof(servers_prop
));
182 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
183 gservers_prop
, sizeof(gservers_prop
));
188 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
190 int ret
= 0, offset
, cpus_offset
;
193 int smt
= kvmppc_smt_threads();
194 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
197 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
198 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
199 int index
= ppc_get_vcpu_dt_id(cpu
);
200 uint32_t associativity
[] = {cpu_to_be32(0x5),
204 cpu_to_be32(cs
->numa_node
),
207 if ((index
% smt
) != 0) {
211 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
213 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
214 if (cpus_offset
< 0) {
215 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
217 if (cpus_offset
< 0) {
221 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
223 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
229 if (nb_numa_nodes
> 1) {
230 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
231 sizeof(associativity
));
237 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
238 pft_size_prop
, sizeof(pft_size_prop
));
243 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
244 ppc_get_compat_smt_threads(cpu
));
253 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
256 size_t maxcells
= maxsize
/ sizeof(uint32_t);
260 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
261 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
263 if (!sps
->page_shift
) {
266 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
267 if (sps
->enc
[count
].page_shift
== 0) {
271 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
274 *(p
++) = cpu_to_be32(sps
->page_shift
);
275 *(p
++) = cpu_to_be32(sps
->slb_enc
);
276 *(p
++) = cpu_to_be32(count
);
277 for (j
= 0; j
< count
; j
++) {
278 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
279 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
283 return (p
- prop
) * sizeof(uint32_t);
290 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
291 #exp, fdt_strerror(ret)); \
296 static void add_str(GString
*s
, const gchar
*s1
)
298 g_string_append_len(s
, s1
, strlen(s1
) + 1);
301 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
305 const char *boot_device
,
306 const char *kernel_cmdline
,
311 uint32_t start_prop
= cpu_to_be32(initrd_base
);
312 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
313 GString
*hypertas
= g_string_sized_new(256);
314 GString
*qemu_hypertas
= g_string_sized_new(256);
315 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
316 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
317 int smt
= kvmppc_smt_threads();
318 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
319 QemuOpts
*opts
= qemu_opts_find(qemu_find_opts("smp-opts"), NULL
);
320 unsigned sockets
= opts
? qemu_opt_get_number(opts
, "sockets", 0) : 0;
321 uint32_t cpus_per_socket
= sockets
? (smp_cpus
/ sockets
) : 1;
324 add_str(hypertas
, "hcall-pft");
325 add_str(hypertas
, "hcall-term");
326 add_str(hypertas
, "hcall-dabr");
327 add_str(hypertas
, "hcall-interrupt");
328 add_str(hypertas
, "hcall-tce");
329 add_str(hypertas
, "hcall-vio");
330 add_str(hypertas
, "hcall-splpar");
331 add_str(hypertas
, "hcall-bulk");
332 add_str(hypertas
, "hcall-set-mode");
333 add_str(qemu_hypertas
, "hcall-memop1");
335 fdt
= g_malloc0(FDT_MAX_SIZE
);
336 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
339 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
342 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
344 _FDT((fdt_finish_reservemap(fdt
)));
347 _FDT((fdt_begin_node(fdt
, "")));
348 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
349 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
350 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
353 _FDT((fdt_property_string(fdt
, "hypervisor", "kvm")));
357 * Add info to guest to indentify which host is it being run on
358 * and what is the uuid of the guest
360 if (kvmppc_get_host_model(&buf
)) {
361 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
364 if (kvmppc_get_host_serial(&buf
)) {
365 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
369 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
370 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
371 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
372 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
373 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
374 qemu_uuid
[14], qemu_uuid
[15]);
376 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
379 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
380 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
383 _FDT((fdt_begin_node(fdt
, "chosen")));
385 /* Set Form1_affinity */
386 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
388 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
389 _FDT((fdt_property(fdt
, "linux,initrd-start",
390 &start_prop
, sizeof(start_prop
))));
391 _FDT((fdt_property(fdt
, "linux,initrd-end",
392 &end_prop
, sizeof(end_prop
))));
394 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
395 cpu_to_be64(kernel_size
) };
397 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
399 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
403 _FDT((fdt_property_string(fdt
, "qemu,boot-device", boot_device
)));
406 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
408 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
409 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
410 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
412 _FDT((fdt_end_node(fdt
)));
415 _FDT((fdt_begin_node(fdt
, "cpus")));
417 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
418 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
421 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
422 CPUPPCState
*env
= &cpu
->env
;
423 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
424 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
425 int index
= ppc_get_vcpu_dt_id(cpu
);
427 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
428 0xffffffff, 0xffffffff};
429 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
430 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
431 uint32_t page_sizes_prop
[64];
432 size_t page_sizes_prop_size
;
434 if ((index
% smt
) != 0) {
438 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
440 _FDT((fdt_begin_node(fdt
, nodename
)));
444 _FDT((fdt_property_cell(fdt
, "reg", index
)));
445 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
447 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
448 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
449 env
->dcache_line_size
)));
450 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
451 env
->dcache_line_size
)));
452 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
453 env
->icache_line_size
)));
454 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
455 env
->icache_line_size
)));
457 if (pcc
->l1_dcache_size
) {
458 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
460 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
462 if (pcc
->l1_icache_size
) {
463 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
465 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
468 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
469 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
470 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
471 _FDT((fdt_property_string(fdt
, "status", "okay")));
472 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
474 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
475 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
478 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
479 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
480 segs
, sizeof(segs
))));
483 /* Advertise VMX/VSX (vector extensions) if available
484 * 0 / no property == no vector extensions
485 * 1 == VMX / Altivec available
486 * 2 == VSX available */
487 if (env
->insns_flags
& PPC_ALTIVEC
) {
488 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
490 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
493 /* Advertise DFP (Decimal Floating Point) if available
494 * 0 / no property == no DFP
495 * 1 == DFP available */
496 if (env
->insns_flags2
& PPC2_DFP
) {
497 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
500 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
501 sizeof(page_sizes_prop
));
502 if (page_sizes_prop_size
) {
503 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
504 page_sizes_prop
, page_sizes_prop_size
)));
507 _FDT((fdt_property_cell(fdt
, "ibm,chip-id",
508 cs
->cpu_index
/ cpus_per_socket
)));
510 _FDT((fdt_end_node(fdt
)));
513 _FDT((fdt_end_node(fdt
)));
516 _FDT((fdt_begin_node(fdt
, "rtas")));
518 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
519 add_str(hypertas
, "hcall-multi-tce");
521 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
523 g_string_free(hypertas
, TRUE
);
524 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
525 qemu_hypertas
->len
)));
526 g_string_free(qemu_hypertas
, TRUE
);
528 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
529 refpoints
, sizeof(refpoints
))));
531 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
534 * According to PAPR, rtas ibm,os-term, does not gaurantee a return
535 * back to the guest cpu.
537 * While an additional ibm,extended-os-term property indicates that
538 * rtas call return will always occur. Set this property.
540 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
542 _FDT((fdt_end_node(fdt
)));
544 /* interrupt controller */
545 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
547 _FDT((fdt_property_string(fdt
, "device_type",
548 "PowerPC-External-Interrupt-Presentation")));
549 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
550 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
551 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
552 interrupt_server_ranges_prop
,
553 sizeof(interrupt_server_ranges_prop
))));
554 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
555 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
556 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
558 _FDT((fdt_end_node(fdt
)));
561 _FDT((fdt_begin_node(fdt
, "vdevice")));
563 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
564 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
565 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
566 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
567 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
568 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
570 _FDT((fdt_end_node(fdt
)));
573 spapr_events_fdt_skel(fdt
, epow_irq
);
575 /* /hypervisor node */
577 uint8_t hypercall
[16];
579 /* indicate KVM hypercall interface */
580 _FDT((fdt_begin_node(fdt
, "hypervisor")));
581 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
582 if (kvmppc_has_cap_fixup_hcalls()) {
584 * Older KVM versions with older guest kernels were broken with the
585 * magic page, don't allow the guest to map it.
587 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
589 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
590 sizeof(hypercall
))));
592 _FDT((fdt_end_node(fdt
)));
595 _FDT((fdt_end_node(fdt
))); /* close root node */
596 _FDT((fdt_finish(fdt
)));
601 int spapr_h_cas_compose_response(target_ulong addr
, target_ulong size
)
603 void *fdt
, *fdt_skel
;
604 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
608 /* Create sceleton */
609 fdt_skel
= g_malloc0(size
);
610 _FDT((fdt_create(fdt_skel
, size
)));
611 _FDT((fdt_begin_node(fdt_skel
, "")));
612 _FDT((fdt_end_node(fdt_skel
)));
613 _FDT((fdt_finish(fdt_skel
)));
614 fdt
= g_malloc0(size
);
615 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
618 /* Fix skeleton up */
619 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
621 /* Pack resulting tree */
622 _FDT((fdt_pack(fdt
)));
624 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
625 trace_spapr_cas_failed(size
);
629 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
630 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
631 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
637 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
639 uint32_t associativity
[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
640 cpu_to_be32(0x0), cpu_to_be32(0x0),
643 hwaddr node0_size
, mem_start
, node_size
;
644 uint64_t mem_reg_property
[2];
648 if (nb_numa_nodes
> 1 && numa_info
[0].node_mem
< ram_size
) {
649 node0_size
= numa_info
[0].node_mem
;
651 node0_size
= ram_size
;
655 mem_reg_property
[0] = 0;
656 mem_reg_property
[1] = cpu_to_be64(spapr
->rma_size
);
657 off
= fdt_add_subnode(fdt
, 0, "memory@0");
659 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
660 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
661 sizeof(mem_reg_property
))));
662 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
663 sizeof(associativity
))));
666 if (node0_size
> spapr
->rma_size
) {
667 mem_reg_property
[0] = cpu_to_be64(spapr
->rma_size
);
668 mem_reg_property
[1] = cpu_to_be64(node0_size
- spapr
->rma_size
);
670 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, spapr
->rma_size
);
671 off
= fdt_add_subnode(fdt
, 0, mem_name
);
673 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
674 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
675 sizeof(mem_reg_property
))));
676 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
677 sizeof(associativity
))));
680 /* RAM: Node 1 and beyond */
681 mem_start
= node0_size
;
682 for (i
= 1; i
< nb_numa_nodes
; i
++) {
683 mem_reg_property
[0] = cpu_to_be64(mem_start
);
684 if (mem_start
>= ram_size
) {
687 node_size
= numa_info
[i
].node_mem
;
688 if (node_size
> ram_size
- mem_start
) {
689 node_size
= ram_size
- mem_start
;
692 mem_reg_property
[1] = cpu_to_be64(node_size
);
693 associativity
[3] = associativity
[4] = cpu_to_be32(i
);
694 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, mem_start
);
695 off
= fdt_add_subnode(fdt
, 0, mem_name
);
697 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
698 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
699 sizeof(mem_reg_property
))));
700 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
701 sizeof(associativity
))));
702 mem_start
+= node_size
;
708 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
719 fdt
= g_malloc(FDT_MAX_SIZE
);
721 /* open out the base tree into a temp buffer for the final tweaks */
722 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
724 ret
= spapr_populate_memory(spapr
, fdt
);
726 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
730 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
732 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
736 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
737 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
741 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
746 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
748 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
751 /* Advertise NUMA via ibm,associativity */
752 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
754 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
757 bootlist
= get_boot_devices_list(&cb
, true);
758 if (cb
&& bootlist
) {
759 int offset
= fdt_path_offset(fdt
, "/chosen");
763 for (i
= 0; i
< cb
; i
++) {
764 if (bootlist
[i
] == '\n') {
769 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
772 if (!spapr
->has_graphics
) {
773 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
776 _FDT((fdt_pack(fdt
)));
778 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
779 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
780 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
784 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
789 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
791 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
794 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
796 CPUPPCState
*env
= &cpu
->env
;
799 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
800 env
->gpr
[3] = H_PRIVILEGE
;
802 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
806 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
810 /* allocate hash page table. For now we always make this 16mb,
811 * later we should probably make it scale to the size of guest
814 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
817 /* Kernel handles htab, we don't need to allocate one */
818 spapr
->htab_shift
= shift
;
819 kvmppc_kern_htab
= true;
822 /* Allocate an htab if we don't yet have one */
823 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
827 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
830 /* Update the RMA size if necessary */
831 if (spapr
->vrma_adjust
) {
832 hwaddr node0_size
= (nb_numa_nodes
> 1) ?
833 numa_info
[0].node_mem
: ram_size
;
834 spapr
->rma_size
= kvmppc_rma_size(node0_size
, spapr
->htab_shift
);
838 static void ppc_spapr_reset(void)
840 PowerPCCPU
*first_ppc_cpu
;
842 /* Reset the hash table & recalc the RMA */
843 spapr_reset_htab(spapr
);
845 qemu_devices_reset();
848 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
851 /* Set up the entry state */
852 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
853 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
854 first_ppc_cpu
->env
.gpr
[5] = 0;
855 first_cpu
->halted
= 0;
856 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
860 static void spapr_cpu_reset(void *opaque
)
862 PowerPCCPU
*cpu
= opaque
;
863 CPUState
*cs
= CPU(cpu
);
864 CPUPPCState
*env
= &cpu
->env
;
868 /* All CPUs start halted. CPU0 is unhalted from the machine level
869 * reset code and the rest are explicitly started up by the guest
870 * using an RTAS call */
873 env
->spr
[SPR_HIOR
] = 0;
875 env
->external_htab
= (uint8_t *)spapr
->htab
;
876 if (kvm_enabled() && !env
->external_htab
) {
878 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
879 * functions do the right thing.
881 env
->external_htab
= (void *)1;
885 * htab_mask is the mask used to normalize hash value to PTEG index.
886 * htab_shift is log2 of hash table size.
887 * We have 8 hpte per group, and each hpte is 16 bytes.
888 * ie have 128 bytes per hpte entry.
890 env
->htab_mask
= (1ULL << ((spapr
)->htab_shift
- 7)) - 1;
891 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
892 (spapr
->htab_shift
- 18);
895 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
897 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
898 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
901 qdev_prop_set_drive_nofail(dev
, "drive", dinfo
->bdrv
);
904 qdev_init_nofail(dev
);
906 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
909 /* Returns whether we want to use VGA or not */
910 static int spapr_vga_init(PCIBus
*pci_bus
)
912 switch (vga_interface_type
) {
918 return pci_vga_init(pci_bus
) != NULL
;
920 fprintf(stderr
, "This vga model is not supported,"
921 "currently it only supports -vga std\n");
926 static const VMStateDescription vmstate_spapr
= {
929 .minimum_version_id
= 1,
930 .fields
= (VMStateField
[]) {
931 VMSTATE_UNUSED(4), /* used to be @next_irq */
934 VMSTATE_UINT64(rtc_offset
, sPAPREnvironment
),
935 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPREnvironment
, 2),
936 VMSTATE_END_OF_LIST()
940 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
941 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
942 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
943 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
945 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
947 sPAPREnvironment
*spapr
= opaque
;
949 /* "Iteration" header */
950 qemu_put_be32(f
, spapr
->htab_shift
);
953 spapr
->htab_save_index
= 0;
954 spapr
->htab_first_pass
= true;
956 assert(kvm_enabled());
958 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
959 if (spapr
->htab_fd
< 0) {
960 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
970 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
973 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
974 int index
= spapr
->htab_save_index
;
975 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
977 assert(spapr
->htab_first_pass
);
982 /* Consume invalid HPTEs */
983 while ((index
< htabslots
)
984 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
986 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
989 /* Consume valid HPTEs */
991 while ((index
< htabslots
)
992 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
994 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
997 if (index
> chunkstart
) {
998 int n_valid
= index
- chunkstart
;
1000 qemu_put_be32(f
, chunkstart
);
1001 qemu_put_be16(f
, n_valid
);
1002 qemu_put_be16(f
, 0);
1003 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1004 HASH_PTE_SIZE_64
* n_valid
);
1006 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1010 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1012 if (index
>= htabslots
) {
1013 assert(index
== htabslots
);
1015 spapr
->htab_first_pass
= false;
1017 spapr
->htab_save_index
= index
;
1020 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
1023 bool final
= max_ns
< 0;
1024 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1025 int examined
= 0, sent
= 0;
1026 int index
= spapr
->htab_save_index
;
1027 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1029 assert(!spapr
->htab_first_pass
);
1032 int chunkstart
, invalidstart
;
1034 /* Consume non-dirty HPTEs */
1035 while ((index
< htabslots
)
1036 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1042 /* Consume valid dirty HPTEs */
1043 while ((index
< htabslots
)
1044 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1045 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1046 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1051 invalidstart
= index
;
1052 /* Consume invalid dirty HPTEs */
1053 while ((index
< htabslots
)
1054 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1055 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1056 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1061 if (index
> chunkstart
) {
1062 int n_valid
= invalidstart
- chunkstart
;
1063 int n_invalid
= index
- invalidstart
;
1065 qemu_put_be32(f
, chunkstart
);
1066 qemu_put_be16(f
, n_valid
);
1067 qemu_put_be16(f
, n_invalid
);
1068 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1069 HASH_PTE_SIZE_64
* n_valid
);
1070 sent
+= index
- chunkstart
;
1072 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1077 if (examined
>= htabslots
) {
1081 if (index
>= htabslots
) {
1082 assert(index
== htabslots
);
1085 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1087 if (index
>= htabslots
) {
1088 assert(index
== htabslots
);
1092 spapr
->htab_save_index
= index
;
1094 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1097 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1098 #define MAX_KVM_BUF_SIZE 2048
1100 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1102 sPAPREnvironment
*spapr
= opaque
;
1105 /* Iteration header */
1106 qemu_put_be32(f
, 0);
1109 assert(kvm_enabled());
1111 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1112 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1116 } else if (spapr
->htab_first_pass
) {
1117 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1119 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1123 qemu_put_be32(f
, 0);
1124 qemu_put_be16(f
, 0);
1125 qemu_put_be16(f
, 0);
1130 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1132 sPAPREnvironment
*spapr
= opaque
;
1134 /* Iteration header */
1135 qemu_put_be32(f
, 0);
1140 assert(kvm_enabled());
1142 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1146 close(spapr
->htab_fd
);
1147 spapr
->htab_fd
= -1;
1149 htab_save_later_pass(f
, spapr
, -1);
1153 qemu_put_be32(f
, 0);
1154 qemu_put_be16(f
, 0);
1155 qemu_put_be16(f
, 0);
1160 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1162 sPAPREnvironment
*spapr
= opaque
;
1163 uint32_t section_hdr
;
1166 if (version_id
< 1 || version_id
> 1) {
1167 fprintf(stderr
, "htab_load() bad version\n");
1171 section_hdr
= qemu_get_be32(f
);
1174 /* First section, just the hash shift */
1175 if (spapr
->htab_shift
!= section_hdr
) {
1182 assert(kvm_enabled());
1184 fd
= kvmppc_get_htab_fd(true);
1186 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1193 uint16_t n_valid
, n_invalid
;
1195 index
= qemu_get_be32(f
);
1196 n_valid
= qemu_get_be16(f
);
1197 n_invalid
= qemu_get_be16(f
);
1199 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1204 if ((index
+ n_valid
+ n_invalid
) >
1205 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1206 /* Bad index in stream */
1207 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1208 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1215 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1216 HASH_PTE_SIZE_64
* n_valid
);
1219 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1220 HASH_PTE_SIZE_64
* n_invalid
);
1227 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1242 static SaveVMHandlers savevm_htab_handlers
= {
1243 .save_live_setup
= htab_save_setup
,
1244 .save_live_iterate
= htab_save_iterate
,
1245 .save_live_complete
= htab_save_complete
,
1246 .load_state
= htab_load
,
1249 /* pSeries LPAR / sPAPR hardware init */
1250 static void ppc_spapr_init(MachineState
*machine
)
1252 ram_addr_t ram_size
= machine
->ram_size
;
1253 const char *cpu_model
= machine
->cpu_model
;
1254 const char *kernel_filename
= machine
->kernel_filename
;
1255 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1256 const char *initrd_filename
= machine
->initrd_filename
;
1257 const char *boot_device
= machine
->boot_order
;
1262 MemoryRegion
*sysmem
= get_system_memory();
1263 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1264 MemoryRegion
*rma_region
;
1266 hwaddr rma_alloc_size
;
1267 hwaddr node0_size
= (nb_numa_nodes
> 1) ? numa_info
[0].node_mem
: ram_size
;
1268 uint32_t initrd_base
= 0;
1269 long kernel_size
= 0, initrd_size
= 0;
1270 long load_limit
, rtas_limit
, fw_size
;
1271 bool kernel_le
= false;
1274 msi_supported
= true;
1276 spapr
= g_malloc0(sizeof(*spapr
));
1277 QLIST_INIT(&spapr
->phbs
);
1279 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1281 /* Allocate RMA if necessary */
1282 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1284 if (rma_alloc_size
== -1) {
1285 hw_error("qemu: Unable to create RMA\n");
1289 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1290 spapr
->rma_size
= rma_alloc_size
;
1292 spapr
->rma_size
= node0_size
;
1294 /* With KVM, we don't actually know whether KVM supports an
1295 * unbounded RMA (PR KVM) or is limited by the hash table size
1296 * (HV KVM using VRMA), so we always assume the latter
1298 * In that case, we also limit the initial allocations for RTAS
1299 * etc... to 256M since we have no way to know what the VRMA size
1300 * is going to be as it depends on the size of the hash table
1301 * isn't determined yet.
1303 if (kvm_enabled()) {
1304 spapr
->vrma_adjust
= 1;
1305 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1309 if (spapr
->rma_size
> node0_size
) {
1310 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1315 /* We place the device tree and RTAS just below either the top of the RMA,
1316 * or just below 2GB, whichever is lowere, so that it can be
1317 * processed with 32-bit real mode code if necessary */
1318 rtas_limit
= MIN(spapr
->rma_size
, 0x80000000);
1319 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1320 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1321 load_limit
= spapr
->fdt_addr
- FW_OVERHEAD
;
1323 /* We aim for a hash table of size 1/128 the size of RAM. The
1324 * normal rule of thumb is 1/64 the size of RAM, but that's much
1325 * more than needed for the Linux guests we support. */
1326 spapr
->htab_shift
= 18; /* Minimum architected size */
1327 while (spapr
->htab_shift
<= 46) {
1328 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1331 spapr
->htab_shift
++;
1334 /* Set up Interrupt Controller before we create the VCPUs */
1335 spapr
->icp
= xics_system_init(smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1339 if (cpu_model
== NULL
) {
1340 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1342 for (i
= 0; i
< smp_cpus
; i
++) {
1343 cpu
= cpu_ppc_init(cpu_model
);
1345 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1350 /* Set time-base frequency to 512 MHz */
1351 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1353 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1354 * MSR[IP] should never be set.
1356 env
->msr_mask
&= ~(1 << 6);
1358 /* Tell KVM that we're in PAPR mode */
1359 if (kvm_enabled()) {
1360 kvmppc_set_papr(cpu
);
1363 if (cpu
->max_compat
) {
1364 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1369 xics_cpu_setup(spapr
->icp
, cpu
);
1371 qemu_register_reset(spapr_cpu_reset
, cpu
);
1375 spapr
->ram_limit
= ram_size
;
1376 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1378 memory_region_add_subregion(sysmem
, 0, ram
);
1380 if (rma_alloc_size
&& rma
) {
1381 rma_region
= g_new(MemoryRegion
, 1);
1382 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1383 rma_alloc_size
, rma
);
1384 vmstate_register_ram_global(rma_region
);
1385 memory_region_add_subregion(sysmem
, 0, rma_region
);
1388 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1389 spapr
->rtas_size
= load_image_targphys(filename
, spapr
->rtas_addr
,
1390 rtas_limit
- spapr
->rtas_addr
);
1391 if (spapr
->rtas_size
< 0) {
1392 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1395 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1396 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
1397 spapr
->rtas_size
, RTAS_MAX_SIZE
);
1402 /* Set up EPOW events infrastructure */
1403 spapr_events_init(spapr
);
1405 /* Set up VIO bus */
1406 spapr
->vio_bus
= spapr_vio_bus_init();
1408 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1409 if (serial_hds
[i
]) {
1410 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1414 /* We always have at least the nvram device on VIO */
1415 spapr_create_nvram(spapr
);
1418 spapr_pci_msi_init(spapr
, SPAPR_PCI_MSI_WINDOW
);
1419 spapr_pci_rtas_init();
1421 phb
= spapr_create_phb(spapr
, 0);
1423 for (i
= 0; i
< nb_nics
; i
++) {
1424 NICInfo
*nd
= &nd_table
[i
];
1427 nd
->model
= g_strdup("ibmveth");
1430 if (strcmp(nd
->model
, "ibmveth") == 0) {
1431 spapr_vlan_create(spapr
->vio_bus
, nd
);
1433 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1437 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1438 spapr_vscsi_create(spapr
->vio_bus
);
1442 if (spapr_vga_init(phb
->bus
)) {
1443 spapr
->has_graphics
= true;
1446 if (usb_enabled(spapr
->has_graphics
)) {
1447 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1448 if (spapr
->has_graphics
) {
1449 usbdevice_create("keyboard");
1450 usbdevice_create("mouse");
1454 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1455 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1456 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1460 if (kernel_filename
) {
1461 uint64_t lowaddr
= 0;
1463 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1464 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1465 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1466 kernel_size
= load_elf(kernel_filename
,
1467 translate_kernel_address
, NULL
,
1468 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1469 kernel_le
= kernel_size
> 0;
1471 if (kernel_size
< 0) {
1472 fprintf(stderr
, "qemu: error loading %s: %s\n",
1473 kernel_filename
, load_elf_strerror(kernel_size
));
1478 if (initrd_filename
) {
1479 /* Try to locate the initrd in the gap between the kernel
1480 * and the firmware. Add a bit of space just in case
1482 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1483 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1484 load_limit
- initrd_base
);
1485 if (initrd_size
< 0) {
1486 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1496 if (bios_name
== NULL
) {
1497 bios_name
= FW_FILE_NAME
;
1499 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1500 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1502 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1507 spapr
->entry_point
= 0x100;
1509 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1510 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1511 &savevm_htab_handlers
, spapr
);
1513 /* Prepare the device tree */
1514 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1515 kernel_size
, kernel_le
,
1516 boot_device
, kernel_cmdline
,
1518 assert(spapr
->fdt_skel
!= NULL
);
1521 static int spapr_kvm_type(const char *vm_type
)
1527 if (!strcmp(vm_type
, "HV")) {
1531 if (!strcmp(vm_type
, "PR")) {
1535 error_report("Unknown kvm-type specified '%s'", vm_type
);
1540 * Implementation of an interface to adjust firmware patch
1541 * for the bootindex property handling.
1543 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1546 #define CAST(type, obj, name) \
1547 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1548 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1549 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1552 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1553 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1554 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1558 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1559 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1560 * in the top 16 bits of the 64-bit LUN
1562 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1563 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1564 (uint64_t)id
<< 48);
1565 } else if (virtio
) {
1567 * We use SRP luns of the form 01000000 | (target << 8) | lun
1568 * in the top 32 bits of the 64-bit LUN
1569 * Note: the quote above is from SLOF and it is wrong,
1570 * the actual binding is:
1571 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
1573 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
1574 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1575 (uint64_t)id
<< 32);
1578 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
1579 * in the top 32 bits of the 64-bit LUN
1581 unsigned usb_port
= atoi(usb
->port
->path
);
1582 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
1583 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1584 (uint64_t)id
<< 32);
1589 /* Replace "pci" with "pci@800000020000000" */
1590 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
1596 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
1598 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1600 return g_strdup(sm
->kvm_type
);
1603 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
1605 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1607 g_free(sm
->kvm_type
);
1608 sm
->kvm_type
= g_strdup(value
);
1611 static void spapr_machine_initfn(Object
*obj
)
1613 object_property_add_str(obj
, "kvm-type",
1614 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
1617 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
1621 cpu_synchronize_state(cs
);
1622 ppc_cpu_do_system_reset(cs
);
1625 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
1630 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
1634 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
1636 MachineClass
*mc
= MACHINE_CLASS(oc
);
1637 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
1638 NMIClass
*nc
= NMI_CLASS(oc
);
1640 mc
->name
= "pseries";
1641 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
1643 mc
->init
= ppc_spapr_init
;
1644 mc
->reset
= ppc_spapr_reset
;
1645 mc
->block_default_type
= IF_SCSI
;
1646 mc
->max_cpus
= MAX_CPUS
;
1647 mc
->no_parallel
= 1;
1648 mc
->default_boot_order
= NULL
;
1649 mc
->kvm_type
= spapr_kvm_type
;
1651 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
1652 nc
->nmi_monitor_handler
= spapr_nmi
;
1655 static const TypeInfo spapr_machine_info
= {
1656 .name
= TYPE_SPAPR_MACHINE
,
1657 .parent
= TYPE_MACHINE
,
1658 .instance_size
= sizeof(sPAPRMachineState
),
1659 .instance_init
= spapr_machine_initfn
,
1660 .class_init
= spapr_machine_class_init
,
1661 .interfaces
= (InterfaceInfo
[]) {
1662 { TYPE_FW_PATH_PROVIDER
},
1668 static void spapr_machine_2_1_class_init(ObjectClass
*oc
, void *data
)
1670 MachineClass
*mc
= MACHINE_CLASS(oc
);
1672 mc
->name
= "pseries-2.1";
1673 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.1";
1677 static const TypeInfo spapr_machine_2_1_info
= {
1678 .name
= TYPE_SPAPR_MACHINE
"2.1",
1679 .parent
= TYPE_SPAPR_MACHINE
,
1680 .class_init
= spapr_machine_2_1_class_init
,
1683 static void spapr_machine_register_types(void)
1685 type_register_static(&spapr_machine_info
);
1686 type_register_static(&spapr_machine_2_1_info
);
1689 type_init(spapr_machine_register_types
)