2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
29 #include "hw/fw-path-provider.h"
32 #include "sysemu/blockdev.h"
33 #include "sysemu/cpus.h"
34 #include "sysemu/kvm.h"
36 #include "mmu-hash64.h"
39 #include "hw/boards.h"
40 #include "hw/ppc/ppc.h"
41 #include "hw/loader.h"
43 #include "hw/ppc/spapr.h"
44 #include "hw/ppc/spapr_vio.h"
45 #include "hw/pci-host/spapr.h"
46 #include "hw/ppc/xics.h"
47 #include "hw/pci/msi.h"
49 #include "hw/pci/pci.h"
50 #include "hw/scsi/scsi.h"
51 #include "hw/virtio/virtio-scsi.h"
53 #include "exec/address-spaces.h"
55 #include "qemu/config-file.h"
56 #include "qemu/error-report.h"
61 /* SLOF memory layout:
63 * SLOF raw image loaded at 0, copies its romfs right below the flat
64 * device-tree, then position SLOF itself 31M below that
66 * So we set FW_OVERHEAD to 40MB which should account for all of that
69 * We load our kernel at 4M, leaving space for SLOF initial image
71 #define FDT_MAX_SIZE 0x40000
72 #define RTAS_MAX_SIZE 0x10000
73 #define FW_MAX_SIZE 0x400000
74 #define FW_FILE_NAME "slof.bin"
75 #define FW_OVERHEAD 0x2800000
76 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
78 #define MIN_RMA_SLOF 128UL
80 #define TIMEBASE_FREQ 512000000ULL
83 #define XICS_IRQS 1024
85 #define PHANDLE_XICP 0x00001111
87 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
89 #define TYPE_SPAPR_MACHINE "spapr-machine"
91 sPAPREnvironment
*spapr
;
93 int spapr_allocate_irq(int hint
, bool lsi
)
99 if (hint
>= spapr
->next_irq
) {
100 spapr
->next_irq
= hint
+ 1;
102 /* FIXME: we should probably check for collisions somehow */
104 irq
= spapr
->next_irq
++;
107 /* Configure irq type */
108 if (!xics_get_qirq(spapr
->icp
, irq
)) {
112 xics_set_irq_type(spapr
->icp
, irq
, lsi
);
118 * Allocate block of consequtive IRQs, returns a number of the first.
119 * If msi==true, aligns the first IRQ number to num.
121 int spapr_allocate_irq_block(int num
, bool lsi
, bool msi
)
127 * MSIMesage::data is used for storing VIRQ so
128 * it has to be aligned to num to support multiple
129 * MSI vectors. MSI-X is not affected by this.
130 * The hint is used for the first IRQ, the rest should
131 * be allocated continuously.
134 assert((num
== 1) || (num
== 2) || (num
== 4) ||
135 (num
== 8) || (num
== 16) || (num
== 32));
136 hint
= (spapr
->next_irq
+ num
- 1) & ~(num
- 1);
139 for (i
= 0; i
< num
; ++i
) {
142 irq
= spapr_allocate_irq(hint
, lsi
);
152 /* If the above doesn't create a consecutive block then that's
154 assert(irq
== (first
+ i
));
160 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
165 dev
= qdev_create(NULL
, type
);
166 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
167 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
168 if (qdev_init(dev
) < 0) {
172 return XICS_COMMON(dev
);
175 static XICSState
*xics_system_init(int nr_servers
, int nr_irqs
)
177 XICSState
*icp
= NULL
;
180 QemuOpts
*machine_opts
= qemu_get_machine_opts();
181 bool irqchip_allowed
= qemu_opt_get_bool(machine_opts
,
182 "kernel_irqchip", true);
183 bool irqchip_required
= qemu_opt_get_bool(machine_opts
,
184 "kernel_irqchip", false);
185 if (irqchip_allowed
) {
186 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
);
189 if (irqchip_required
&& !icp
) {
190 perror("Failed to create in-kernel XICS\n");
196 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
);
200 perror("Failed to create XICS\n");
207 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
211 uint32_t servers_prop
[smt_threads
];
212 uint32_t gservers_prop
[smt_threads
* 2];
213 int index
= ppc_get_vcpu_dt_id(cpu
);
215 if (cpu
->cpu_version
) {
216 ret
= fdt_setprop(fdt
, offset
, "cpu-version",
217 &cpu
->cpu_version
, sizeof(cpu
->cpu_version
));
223 /* Build interrupt servers and gservers properties */
224 for (i
= 0; i
< smt_threads
; i
++) {
225 servers_prop
[i
] = cpu_to_be32(index
+ i
);
226 /* Hack, direct the group queues back to cpu 0 */
227 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
228 gservers_prop
[i
*2 + 1] = 0;
230 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
231 servers_prop
, sizeof(servers_prop
));
235 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
236 gservers_prop
, sizeof(gservers_prop
));
241 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
243 int ret
= 0, offset
, cpus_offset
;
246 int smt
= kvmppc_smt_threads();
247 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
250 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
251 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
252 int index
= ppc_get_vcpu_dt_id(cpu
);
253 uint32_t associativity
[] = {cpu_to_be32(0x5),
257 cpu_to_be32(cs
->numa_node
),
260 if ((index
% smt
) != 0) {
264 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
266 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
267 if (cpus_offset
< 0) {
268 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
270 if (cpus_offset
< 0) {
274 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
276 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
282 if (nb_numa_nodes
> 1) {
283 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
284 sizeof(associativity
));
290 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
291 pft_size_prop
, sizeof(pft_size_prop
));
296 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
297 ppc_get_compat_smt_threads(cpu
));
306 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
309 size_t maxcells
= maxsize
/ sizeof(uint32_t);
313 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
314 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
316 if (!sps
->page_shift
) {
319 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
320 if (sps
->enc
[count
].page_shift
== 0) {
324 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
327 *(p
++) = cpu_to_be32(sps
->page_shift
);
328 *(p
++) = cpu_to_be32(sps
->slb_enc
);
329 *(p
++) = cpu_to_be32(count
);
330 for (j
= 0; j
< count
; j
++) {
331 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
332 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
336 return (p
- prop
) * sizeof(uint32_t);
343 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
344 #exp, fdt_strerror(ret)); \
349 static void add_str(GString
*s
, const gchar
*s1
)
351 g_string_append_len(s
, s1
, strlen(s1
) + 1);
354 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
358 const char *boot_device
,
359 const char *kernel_cmdline
,
364 uint32_t start_prop
= cpu_to_be32(initrd_base
);
365 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
366 GString
*hypertas
= g_string_sized_new(256);
367 GString
*qemu_hypertas
= g_string_sized_new(256);
368 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
369 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
370 int smt
= kvmppc_smt_threads();
371 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
372 QemuOpts
*opts
= qemu_opts_find(qemu_find_opts("smp-opts"), NULL
);
373 unsigned sockets
= opts
? qemu_opt_get_number(opts
, "sockets", 0) : 0;
374 uint32_t cpus_per_socket
= sockets
? (smp_cpus
/ sockets
) : 1;
376 add_str(hypertas
, "hcall-pft");
377 add_str(hypertas
, "hcall-term");
378 add_str(hypertas
, "hcall-dabr");
379 add_str(hypertas
, "hcall-interrupt");
380 add_str(hypertas
, "hcall-tce");
381 add_str(hypertas
, "hcall-vio");
382 add_str(hypertas
, "hcall-splpar");
383 add_str(hypertas
, "hcall-bulk");
384 add_str(hypertas
, "hcall-set-mode");
385 add_str(qemu_hypertas
, "hcall-memop1");
387 fdt
= g_malloc0(FDT_MAX_SIZE
);
388 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
391 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
394 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
396 _FDT((fdt_finish_reservemap(fdt
)));
399 _FDT((fdt_begin_node(fdt
, "")));
400 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
401 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
402 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
404 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
405 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
408 _FDT((fdt_begin_node(fdt
, "chosen")));
410 /* Set Form1_affinity */
411 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
413 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
414 _FDT((fdt_property(fdt
, "linux,initrd-start",
415 &start_prop
, sizeof(start_prop
))));
416 _FDT((fdt_property(fdt
, "linux,initrd-end",
417 &end_prop
, sizeof(end_prop
))));
419 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
420 cpu_to_be64(kernel_size
) };
422 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
424 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
428 _FDT((fdt_property_string(fdt
, "qemu,boot-device", boot_device
)));
430 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
431 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
432 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
434 _FDT((fdt_end_node(fdt
)));
437 _FDT((fdt_begin_node(fdt
, "cpus")));
439 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
440 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
443 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
444 CPUPPCState
*env
= &cpu
->env
;
445 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
446 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
447 int index
= ppc_get_vcpu_dt_id(cpu
);
449 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
450 0xffffffff, 0xffffffff};
451 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
452 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
453 uint32_t page_sizes_prop
[64];
454 size_t page_sizes_prop_size
;
456 if ((index
% smt
) != 0) {
460 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
462 _FDT((fdt_begin_node(fdt
, nodename
)));
466 _FDT((fdt_property_cell(fdt
, "reg", index
)));
467 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
469 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
470 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
471 env
->dcache_line_size
)));
472 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
473 env
->dcache_line_size
)));
474 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
475 env
->icache_line_size
)));
476 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
477 env
->icache_line_size
)));
479 if (pcc
->l1_dcache_size
) {
480 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
482 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
484 if (pcc
->l1_icache_size
) {
485 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
487 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
490 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
491 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
492 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
493 _FDT((fdt_property_string(fdt
, "status", "okay")));
494 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
496 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
497 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
500 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
501 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
502 segs
, sizeof(segs
))));
505 /* Advertise VMX/VSX (vector extensions) if available
506 * 0 / no property == no vector extensions
507 * 1 == VMX / Altivec available
508 * 2 == VSX available */
509 if (env
->insns_flags
& PPC_ALTIVEC
) {
510 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
512 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
515 /* Advertise DFP (Decimal Floating Point) if available
516 * 0 / no property == no DFP
517 * 1 == DFP available */
518 if (env
->insns_flags2
& PPC2_DFP
) {
519 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
522 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
523 sizeof(page_sizes_prop
));
524 if (page_sizes_prop_size
) {
525 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
526 page_sizes_prop
, page_sizes_prop_size
)));
529 _FDT((fdt_property_cell(fdt
, "ibm,chip-id",
530 cs
->cpu_index
/ cpus_per_socket
)));
532 _FDT((fdt_end_node(fdt
)));
535 _FDT((fdt_end_node(fdt
)));
538 _FDT((fdt_begin_node(fdt
, "rtas")));
540 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
541 add_str(hypertas
, "hcall-multi-tce");
543 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
545 g_string_free(hypertas
, TRUE
);
546 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
547 qemu_hypertas
->len
)));
548 g_string_free(qemu_hypertas
, TRUE
);
550 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
551 refpoints
, sizeof(refpoints
))));
553 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
555 _FDT((fdt_end_node(fdt
)));
557 /* interrupt controller */
558 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
560 _FDT((fdt_property_string(fdt
, "device_type",
561 "PowerPC-External-Interrupt-Presentation")));
562 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
563 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
564 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
565 interrupt_server_ranges_prop
,
566 sizeof(interrupt_server_ranges_prop
))));
567 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
568 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
569 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
571 _FDT((fdt_end_node(fdt
)));
574 _FDT((fdt_begin_node(fdt
, "vdevice")));
576 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
577 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
578 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
579 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
580 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
581 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
583 _FDT((fdt_end_node(fdt
)));
586 spapr_events_fdt_skel(fdt
, epow_irq
);
588 /* /hypervisor node */
590 uint8_t hypercall
[16];
592 /* indicate KVM hypercall interface */
593 _FDT((fdt_begin_node(fdt
, "hypervisor")));
594 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
595 if (kvmppc_has_cap_fixup_hcalls()) {
597 * Older KVM versions with older guest kernels were broken with the
598 * magic page, don't allow the guest to map it.
600 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
602 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
603 sizeof(hypercall
))));
605 _FDT((fdt_end_node(fdt
)));
608 _FDT((fdt_end_node(fdt
))); /* close root node */
609 _FDT((fdt_finish(fdt
)));
614 int spapr_h_cas_compose_response(target_ulong addr
, target_ulong size
)
616 void *fdt
, *fdt_skel
;
617 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
621 /* Create sceleton */
622 fdt_skel
= g_malloc0(size
);
623 _FDT((fdt_create(fdt_skel
, size
)));
624 _FDT((fdt_begin_node(fdt_skel
, "")));
625 _FDT((fdt_end_node(fdt_skel
)));
626 _FDT((fdt_finish(fdt_skel
)));
627 fdt
= g_malloc0(size
);
628 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
631 /* Fix skeleton up */
632 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
634 /* Pack resulting tree */
635 _FDT((fdt_pack(fdt
)));
637 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
638 trace_spapr_cas_failed(size
);
642 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
643 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
644 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
650 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
652 uint32_t associativity
[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
653 cpu_to_be32(0x0), cpu_to_be32(0x0),
656 hwaddr node0_size
, mem_start
, node_size
;
657 uint64_t mem_reg_property
[2];
661 if (nb_numa_nodes
> 1 && node_mem
[0] < ram_size
) {
662 node0_size
= node_mem
[0];
664 node0_size
= ram_size
;
668 mem_reg_property
[0] = 0;
669 mem_reg_property
[1] = cpu_to_be64(spapr
->rma_size
);
670 off
= fdt_add_subnode(fdt
, 0, "memory@0");
672 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
673 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
674 sizeof(mem_reg_property
))));
675 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
676 sizeof(associativity
))));
679 if (node0_size
> spapr
->rma_size
) {
680 mem_reg_property
[0] = cpu_to_be64(spapr
->rma_size
);
681 mem_reg_property
[1] = cpu_to_be64(node0_size
- spapr
->rma_size
);
683 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, spapr
->rma_size
);
684 off
= fdt_add_subnode(fdt
, 0, mem_name
);
686 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
687 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
688 sizeof(mem_reg_property
))));
689 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
690 sizeof(associativity
))));
693 /* RAM: Node 1 and beyond */
694 mem_start
= node0_size
;
695 for (i
= 1; i
< nb_numa_nodes
; i
++) {
696 mem_reg_property
[0] = cpu_to_be64(mem_start
);
697 if (mem_start
>= ram_size
) {
700 node_size
= node_mem
[i
];
701 if (node_size
> ram_size
- mem_start
) {
702 node_size
= ram_size
- mem_start
;
705 mem_reg_property
[1] = cpu_to_be64(node_size
);
706 associativity
[3] = associativity
[4] = cpu_to_be32(i
);
707 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, mem_start
);
708 off
= fdt_add_subnode(fdt
, 0, mem_name
);
710 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
711 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
712 sizeof(mem_reg_property
))));
713 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
714 sizeof(associativity
))));
715 mem_start
+= node_size
;
721 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
732 fdt
= g_malloc(FDT_MAX_SIZE
);
734 /* open out the base tree into a temp buffer for the final tweaks */
735 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
737 ret
= spapr_populate_memory(spapr
, fdt
);
739 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
743 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
745 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
749 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
750 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
754 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
759 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
761 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
764 /* Advertise NUMA via ibm,associativity */
765 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
767 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
770 bootlist
= get_boot_devices_list(&cb
, true);
771 if (cb
&& bootlist
) {
772 int offset
= fdt_path_offset(fdt
, "/chosen");
776 for (i
= 0; i
< cb
; i
++) {
777 if (bootlist
[i
] == '\n') {
782 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
785 if (!spapr
->has_graphics
) {
786 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
789 _FDT((fdt_pack(fdt
)));
791 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
792 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
793 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
797 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
802 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
804 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
807 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
809 CPUPPCState
*env
= &cpu
->env
;
812 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
813 env
->gpr
[3] = H_PRIVILEGE
;
815 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
819 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
823 /* allocate hash page table. For now we always make this 16mb,
824 * later we should probably make it scale to the size of guest
827 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
830 /* Kernel handles htab, we don't need to allocate one */
831 spapr
->htab_shift
= shift
;
832 kvmppc_kern_htab
= true;
835 /* Allocate an htab if we don't yet have one */
836 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
840 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
843 /* Update the RMA size if necessary */
844 if (spapr
->vrma_adjust
) {
845 hwaddr node0_size
= (nb_numa_nodes
> 1) ? node_mem
[0] : ram_size
;
846 spapr
->rma_size
= kvmppc_rma_size(node0_size
, spapr
->htab_shift
);
850 static void ppc_spapr_reset(void)
852 PowerPCCPU
*first_ppc_cpu
;
854 /* Reset the hash table & recalc the RMA */
855 spapr_reset_htab(spapr
);
857 qemu_devices_reset();
860 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
863 /* Set up the entry state */
864 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
865 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
866 first_ppc_cpu
->env
.gpr
[5] = 0;
867 first_cpu
->halted
= 0;
868 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
872 static void spapr_cpu_reset(void *opaque
)
874 PowerPCCPU
*cpu
= opaque
;
875 CPUState
*cs
= CPU(cpu
);
876 CPUPPCState
*env
= &cpu
->env
;
880 /* All CPUs start halted. CPU0 is unhalted from the machine level
881 * reset code and the rest are explicitly started up by the guest
882 * using an RTAS call */
885 env
->spr
[SPR_HIOR
] = 0;
887 env
->external_htab
= (uint8_t *)spapr
->htab
;
888 if (kvm_enabled() && !env
->external_htab
) {
890 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
891 * functions do the right thing.
893 env
->external_htab
= (void *)1;
897 * htab_mask is the mask used to normalize hash value to PTEG index.
898 * htab_shift is log2 of hash table size.
899 * We have 8 hpte per group, and each hpte is 16 bytes.
900 * ie have 128 bytes per hpte entry.
902 env
->htab_mask
= (1ULL << ((spapr
)->htab_shift
- 7)) - 1;
903 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
904 (spapr
->htab_shift
- 18);
907 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
909 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
910 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
913 qdev_prop_set_drive_nofail(dev
, "drive", dinfo
->bdrv
);
916 qdev_init_nofail(dev
);
918 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
921 /* Returns whether we want to use VGA or not */
922 static int spapr_vga_init(PCIBus
*pci_bus
)
924 switch (vga_interface_type
) {
930 return pci_vga_init(pci_bus
) != NULL
;
932 fprintf(stderr
, "This vga model is not supported,"
933 "currently it only supports -vga std\n");
938 static const VMStateDescription vmstate_spapr
= {
941 .minimum_version_id
= 1,
942 .fields
= (VMStateField
[]) {
943 VMSTATE_UINT32(next_irq
, sPAPREnvironment
),
946 VMSTATE_UINT64(rtc_offset
, sPAPREnvironment
),
947 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPREnvironment
, 2),
948 VMSTATE_END_OF_LIST()
952 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
953 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
954 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
955 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
957 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
959 sPAPREnvironment
*spapr
= opaque
;
961 /* "Iteration" header */
962 qemu_put_be32(f
, spapr
->htab_shift
);
965 spapr
->htab_save_index
= 0;
966 spapr
->htab_first_pass
= true;
968 assert(kvm_enabled());
970 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
971 if (spapr
->htab_fd
< 0) {
972 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
982 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
985 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
986 int index
= spapr
->htab_save_index
;
987 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
989 assert(spapr
->htab_first_pass
);
994 /* Consume invalid HPTEs */
995 while ((index
< htabslots
)
996 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
998 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1001 /* Consume valid HPTEs */
1003 while ((index
< htabslots
)
1004 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1006 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1009 if (index
> chunkstart
) {
1010 int n_valid
= index
- chunkstart
;
1012 qemu_put_be32(f
, chunkstart
);
1013 qemu_put_be16(f
, n_valid
);
1014 qemu_put_be16(f
, 0);
1015 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1016 HASH_PTE_SIZE_64
* n_valid
);
1018 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1022 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1024 if (index
>= htabslots
) {
1025 assert(index
== htabslots
);
1027 spapr
->htab_first_pass
= false;
1029 spapr
->htab_save_index
= index
;
1032 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
1035 bool final
= max_ns
< 0;
1036 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1037 int examined
= 0, sent
= 0;
1038 int index
= spapr
->htab_save_index
;
1039 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1041 assert(!spapr
->htab_first_pass
);
1044 int chunkstart
, invalidstart
;
1046 /* Consume non-dirty HPTEs */
1047 while ((index
< htabslots
)
1048 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1054 /* Consume valid dirty HPTEs */
1055 while ((index
< htabslots
)
1056 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1057 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1058 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1063 invalidstart
= index
;
1064 /* Consume invalid dirty HPTEs */
1065 while ((index
< htabslots
)
1066 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1067 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1068 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1073 if (index
> chunkstart
) {
1074 int n_valid
= invalidstart
- chunkstart
;
1075 int n_invalid
= index
- invalidstart
;
1077 qemu_put_be32(f
, chunkstart
);
1078 qemu_put_be16(f
, n_valid
);
1079 qemu_put_be16(f
, n_invalid
);
1080 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1081 HASH_PTE_SIZE_64
* n_valid
);
1082 sent
+= index
- chunkstart
;
1084 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1089 if (examined
>= htabslots
) {
1093 if (index
>= htabslots
) {
1094 assert(index
== htabslots
);
1097 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1099 if (index
>= htabslots
) {
1100 assert(index
== htabslots
);
1104 spapr
->htab_save_index
= index
;
1106 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1109 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1110 #define MAX_KVM_BUF_SIZE 2048
1112 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1114 sPAPREnvironment
*spapr
= opaque
;
1117 /* Iteration header */
1118 qemu_put_be32(f
, 0);
1121 assert(kvm_enabled());
1123 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1124 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1128 } else if (spapr
->htab_first_pass
) {
1129 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1131 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1135 qemu_put_be32(f
, 0);
1136 qemu_put_be16(f
, 0);
1137 qemu_put_be16(f
, 0);
1142 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1144 sPAPREnvironment
*spapr
= opaque
;
1146 /* Iteration header */
1147 qemu_put_be32(f
, 0);
1152 assert(kvm_enabled());
1154 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1158 close(spapr
->htab_fd
);
1159 spapr
->htab_fd
= -1;
1161 htab_save_later_pass(f
, spapr
, -1);
1165 qemu_put_be32(f
, 0);
1166 qemu_put_be16(f
, 0);
1167 qemu_put_be16(f
, 0);
1172 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1174 sPAPREnvironment
*spapr
= opaque
;
1175 uint32_t section_hdr
;
1178 if (version_id
< 1 || version_id
> 1) {
1179 fprintf(stderr
, "htab_load() bad version\n");
1183 section_hdr
= qemu_get_be32(f
);
1186 /* First section, just the hash shift */
1187 if (spapr
->htab_shift
!= section_hdr
) {
1194 assert(kvm_enabled());
1196 fd
= kvmppc_get_htab_fd(true);
1198 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1205 uint16_t n_valid
, n_invalid
;
1207 index
= qemu_get_be32(f
);
1208 n_valid
= qemu_get_be16(f
);
1209 n_invalid
= qemu_get_be16(f
);
1211 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1216 if ((index
+ n_valid
+ n_invalid
) >
1217 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1218 /* Bad index in stream */
1219 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1220 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1227 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1228 HASH_PTE_SIZE_64
* n_valid
);
1231 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1232 HASH_PTE_SIZE_64
* n_invalid
);
1239 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1254 static SaveVMHandlers savevm_htab_handlers
= {
1255 .save_live_setup
= htab_save_setup
,
1256 .save_live_iterate
= htab_save_iterate
,
1257 .save_live_complete
= htab_save_complete
,
1258 .load_state
= htab_load
,
1261 /* pSeries LPAR / sPAPR hardware init */
1262 static void ppc_spapr_init(MachineState
*machine
)
1264 ram_addr_t ram_size
= machine
->ram_size
;
1265 const char *cpu_model
= machine
->cpu_model
;
1266 const char *kernel_filename
= machine
->kernel_filename
;
1267 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1268 const char *initrd_filename
= machine
->initrd_filename
;
1269 const char *boot_device
= machine
->boot_order
;
1274 MemoryRegion
*sysmem
= get_system_memory();
1275 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1276 hwaddr rma_alloc_size
;
1277 hwaddr node0_size
= (nb_numa_nodes
> 1) ? node_mem
[0] : ram_size
;
1278 uint32_t initrd_base
= 0;
1279 long kernel_size
= 0, initrd_size
= 0;
1280 long load_limit
, rtas_limit
, fw_size
;
1281 bool kernel_le
= false;
1284 msi_supported
= true;
1286 spapr
= g_malloc0(sizeof(*spapr
));
1287 QLIST_INIT(&spapr
->phbs
);
1289 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1291 /* Allocate RMA if necessary */
1292 rma_alloc_size
= kvmppc_alloc_rma("ppc_spapr.rma", sysmem
);
1294 if (rma_alloc_size
== -1) {
1295 hw_error("qemu: Unable to create RMA\n");
1299 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1300 spapr
->rma_size
= rma_alloc_size
;
1302 spapr
->rma_size
= node0_size
;
1304 /* With KVM, we don't actually know whether KVM supports an
1305 * unbounded RMA (PR KVM) or is limited by the hash table size
1306 * (HV KVM using VRMA), so we always assume the latter
1308 * In that case, we also limit the initial allocations for RTAS
1309 * etc... to 256M since we have no way to know what the VRMA size
1310 * is going to be as it depends on the size of the hash table
1311 * isn't determined yet.
1313 if (kvm_enabled()) {
1314 spapr
->vrma_adjust
= 1;
1315 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1319 if (spapr
->rma_size
> node0_size
) {
1320 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1325 /* We place the device tree and RTAS just below either the top of the RMA,
1326 * or just below 2GB, whichever is lowere, so that it can be
1327 * processed with 32-bit real mode code if necessary */
1328 rtas_limit
= MIN(spapr
->rma_size
, 0x80000000);
1329 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1330 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1331 load_limit
= spapr
->fdt_addr
- FW_OVERHEAD
;
1333 /* We aim for a hash table of size 1/128 the size of RAM. The
1334 * normal rule of thumb is 1/64 the size of RAM, but that's much
1335 * more than needed for the Linux guests we support. */
1336 spapr
->htab_shift
= 18; /* Minimum architected size */
1337 while (spapr
->htab_shift
<= 46) {
1338 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1341 spapr
->htab_shift
++;
1344 /* Set up Interrupt Controller before we create the VCPUs */
1345 spapr
->icp
= xics_system_init(smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1347 spapr
->next_irq
= XICS_IRQ_BASE
;
1350 if (cpu_model
== NULL
) {
1351 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1353 for (i
= 0; i
< smp_cpus
; i
++) {
1354 cpu
= cpu_ppc_init(cpu_model
);
1356 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1361 /* Set time-base frequency to 512 MHz */
1362 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1364 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1365 * MSR[IP] should never be set.
1367 env
->msr_mask
&= ~(1 << 6);
1369 /* Tell KVM that we're in PAPR mode */
1370 if (kvm_enabled()) {
1371 kvmppc_set_papr(cpu
);
1374 if (cpu
->max_compat
) {
1375 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1380 xics_cpu_setup(spapr
->icp
, cpu
);
1382 qemu_register_reset(spapr_cpu_reset
, cpu
);
1386 spapr
->ram_limit
= ram_size
;
1387 if (spapr
->ram_limit
> rma_alloc_size
) {
1388 ram_addr_t nonrma_base
= rma_alloc_size
;
1389 ram_addr_t nonrma_size
= spapr
->ram_limit
- rma_alloc_size
;
1391 memory_region_init_ram(ram
, NULL
, "ppc_spapr.ram", nonrma_size
);
1392 vmstate_register_ram_global(ram
);
1393 memory_region_add_subregion(sysmem
, nonrma_base
, ram
);
1396 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1397 spapr
->rtas_size
= load_image_targphys(filename
, spapr
->rtas_addr
,
1398 rtas_limit
- spapr
->rtas_addr
);
1399 if (spapr
->rtas_size
< 0) {
1400 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1403 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1404 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
1405 spapr
->rtas_size
, RTAS_MAX_SIZE
);
1410 /* Set up EPOW events infrastructure */
1411 spapr_events_init(spapr
);
1413 /* Set up VIO bus */
1414 spapr
->vio_bus
= spapr_vio_bus_init();
1416 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1417 if (serial_hds
[i
]) {
1418 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1422 /* We always have at least the nvram device on VIO */
1423 spapr_create_nvram(spapr
);
1426 spapr_pci_msi_init(spapr
, SPAPR_PCI_MSI_WINDOW
);
1427 spapr_pci_rtas_init();
1429 phb
= spapr_create_phb(spapr
, 0);
1431 for (i
= 0; i
< nb_nics
; i
++) {
1432 NICInfo
*nd
= &nd_table
[i
];
1435 nd
->model
= g_strdup("ibmveth");
1438 if (strcmp(nd
->model
, "ibmveth") == 0) {
1439 spapr_vlan_create(spapr
->vio_bus
, nd
);
1441 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1445 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1446 spapr_vscsi_create(spapr
->vio_bus
);
1450 if (spapr_vga_init(phb
->bus
)) {
1451 spapr
->has_graphics
= true;
1454 if (usb_enabled(spapr
->has_graphics
)) {
1455 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1456 if (spapr
->has_graphics
) {
1457 usbdevice_create("keyboard");
1458 usbdevice_create("mouse");
1462 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1463 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1464 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1468 if (kernel_filename
) {
1469 uint64_t lowaddr
= 0;
1471 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1472 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1473 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1474 kernel_size
= load_elf(kernel_filename
,
1475 translate_kernel_address
, NULL
,
1476 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1477 kernel_le
= kernel_size
> 0;
1479 if (kernel_size
< 0) {
1480 fprintf(stderr
, "qemu: error loading %s: %s\n",
1481 kernel_filename
, load_elf_strerror(kernel_size
));
1486 if (initrd_filename
) {
1487 /* Try to locate the initrd in the gap between the kernel
1488 * and the firmware. Add a bit of space just in case
1490 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1491 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1492 load_limit
- initrd_base
);
1493 if (initrd_size
< 0) {
1494 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1504 if (bios_name
== NULL
) {
1505 bios_name
= FW_FILE_NAME
;
1507 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1508 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1510 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1515 spapr
->entry_point
= 0x100;
1517 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1518 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1519 &savevm_htab_handlers
, spapr
);
1521 /* Prepare the device tree */
1522 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1523 kernel_size
, kernel_le
,
1524 boot_device
, kernel_cmdline
,
1526 assert(spapr
->fdt_skel
!= NULL
);
1529 static int spapr_kvm_type(const char *vm_type
)
1535 if (!strcmp(vm_type
, "HV")) {
1539 if (!strcmp(vm_type
, "PR")) {
1543 error_report("Unknown kvm-type specified '%s'", vm_type
);
1548 * Implementation of an interface to adjust firmware patch
1549 * for the bootindex property handling.
1551 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1554 #define CAST(type, obj, name) \
1555 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1556 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1557 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1560 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1561 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1562 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1566 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1567 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1568 * in the top 16 bits of the 64-bit LUN
1570 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1571 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1572 (uint64_t)id
<< 48);
1573 } else if (virtio
) {
1575 * We use SRP luns of the form 01000000 | (target << 8) | lun
1576 * in the top 32 bits of the 64-bit LUN
1577 * Note: the quote above is from SLOF and it is wrong,
1578 * the actual binding is:
1579 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
1581 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
1582 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1583 (uint64_t)id
<< 32);
1586 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
1587 * in the top 32 bits of the 64-bit LUN
1589 unsigned usb_port
= atoi(usb
->port
->path
);
1590 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
1591 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1592 (uint64_t)id
<< 32);
1597 /* Replace "pci" with "pci@800000020000000" */
1598 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
1604 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
1606 MachineClass
*mc
= MACHINE_CLASS(oc
);
1607 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
1609 mc
->name
= "pseries";
1610 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
1612 mc
->init
= ppc_spapr_init
;
1613 mc
->reset
= ppc_spapr_reset
;
1614 mc
->block_default_type
= IF_SCSI
;
1615 mc
->max_cpus
= MAX_CPUS
;
1616 mc
->no_parallel
= 1;
1617 mc
->default_boot_order
= NULL
;
1618 mc
->kvm_type
= spapr_kvm_type
;
1620 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
1623 static const TypeInfo spapr_machine_info
= {
1624 .name
= TYPE_SPAPR_MACHINE
,
1625 .parent
= TYPE_MACHINE
,
1626 .class_init
= spapr_machine_class_init
,
1627 .interfaces
= (InterfaceInfo
[]) {
1628 { TYPE_FW_PATH_PROVIDER
},
1633 static void spapr_machine_register_types(void)
1635 type_register_static(&spapr_machine_info
);
1638 type_init(spapr_machine_register_types
)