hw/ppc/spapr_caps.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition capabilities handling
   3  *
   4  * Copyright (c) 2017 David Gibson, Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qemu/error-report.h"
  27 #include "qapi/error.h"
  28 #include "qapi/visitor.h"
  29 #include "sysemu/hw_accel.h"
  30 #include "exec/ram_addr.h"
  31 #include "target/ppc/cpu.h"
  32 #include "target/ppc/mmu-hash64.h"
  33 #include "cpu-models.h"
  34 #include "kvm_ppc.h"
  35 #include "migration/vmstate.h"
  36 #include "sysemu/tcg.h"
  37
  38 #include "hw/ppc/spapr.h"
  39
  40 typedef struct SpaprCapPossible {
  41     int num;            /* size of vals array below */
  42     const char *help;   /* help text for vals */
  43     /*
  44      * Note:
  45      * - because of the way compatibility is determined vals MUST be ordered
  46      *   such that later options are a superset of all preceding options.
  47      * - the order of vals must be preserved, that is their index is important,
  48      *   however vals may be added to the end of the list so long as the above
  49      *   point is observed
  50      */
  51     const char *vals[];
  52 } SpaprCapPossible;
  53
  54 typedef struct SpaprCapabilityInfo {
  55     const char *name;
  56     const char *description;
  57     int index;
  58
  59     /* Getter and Setter Function Pointers */
  60     ObjectPropertyAccessor *get;
  61     ObjectPropertyAccessor *set;
  62     const char *type;
  63     /* Possible values if this is a custom string type */
  64     SpaprCapPossible *possible;
  65     /* Make sure the virtual hardware can support this capability */
  66     void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp);
  67     void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu,
  68                       uint8_t val, Error **errp);
  69     bool (*migrate_needed)(void *opaque);
  70 } SpaprCapabilityInfo;
  71
  72 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name,
  73                                void *opaque, Error **errp)
  74 {
  75     SpaprCapabilityInfo *cap = opaque;
  76     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
  77     bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON;
  78
  79     visit_type_bool(v, name, &value, errp);
  80 }
  81
  82 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name,
  83                                void *opaque, Error **errp)
  84 {
  85     SpaprCapabilityInfo *cap = opaque;
  86     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
  87     bool value;
  88
  89     if (!visit_type_bool(v, name, &value, errp)) {
  90         return;
  91     }
  92
  93     spapr->cmd_line_caps[cap->index] = true;
  94     spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF;
  95 }
  96
  97
  98 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name,
  99                                  void *opaque, Error **errp)
 100 {
 101     SpaprCapabilityInfo *cap = opaque;
 102     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 103     g_autofree char *val = NULL;
 104     uint8_t value = spapr_get_cap(spapr, cap->index);
 105
 106     if (value >= cap->possible->num) {
 107         error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name);
 108         return;
 109     }
 110
 111     val = g_strdup(cap->possible->vals[value]);
 112
 113     visit_type_str(v, name, &val, errp);
 114 }
 115
 116 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name,
 117                                  void *opaque, Error **errp)
 118 {
 119     SpaprCapabilityInfo *cap = opaque;
 120     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 121     uint8_t i;
 122     g_autofree char *val = NULL;
 123
 124     if (!visit_type_str(v, name, &val, errp)) {
 125         return;
 126     }
 127
 128     if (!strcmp(val, "?")) {
 129         error_setg(errp, "%s", cap->possible->help);
 130         return;
 131     }
 132     for (i = 0; i < cap->possible->num; i++) {
 133         if (!strcasecmp(val, cap->possible->vals[i])) {
 134             spapr->cmd_line_caps[cap->index] = true;
 135             spapr->eff.caps[cap->index] = i;
 136             return;
 137         }
 138     }
 139
 140     error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val,
 141                cap->name);
 142 }
 143
 144 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name,
 145                                    void *opaque, Error **errp)
 146 {
 147     SpaprCapabilityInfo *cap = opaque;
 148     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 149     uint8_t val = spapr_get_cap(spapr, cap->index);
 150     uint64_t pagesize = (1ULL << val);
 151
 152     visit_type_size(v, name, &pagesize, errp);
 153 }
 154
 155 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name,
 156                                    void *opaque, Error **errp)
 157 {
 158     SpaprCapabilityInfo *cap = opaque;
 159     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 160     uint64_t pagesize;
 161     uint8_t val;
 162
 163     if (!visit_type_size(v, name, &pagesize, errp)) {
 164         return;
 165     }
 166
 167     if (!is_power_of_2(pagesize)) {
 168         error_setg(errp, "cap-%s must be a power of 2", cap->name);
 169         return;
 170     }
 171
 172     val = ctz64(pagesize);
 173     spapr->cmd_line_caps[cap->index] = true;
 174     spapr->eff.caps[cap->index] = val;
 175 }
 176
 177 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
 178 {
 179     ERRP_GUARD();
 180     if (!val) {
 181         /* TODO: We don't support disabling htm yet */
 182         return;
 183     }
 184     if (tcg_enabled()) {
 185         error_setg(errp, "No Transactional Memory support in TCG");
 186         error_append_hint(errp, "Try appending -machine cap-htm=off\n");
 187     } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
 188         error_setg(errp,
 189                    "KVM implementation does not support Transactional Memory");
 190         error_append_hint(errp, "Try appending -machine cap-htm=off\n");
 191     }
 192 }
 193
 194 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
 195 {
 196     ERRP_GUARD();
 197     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 198     CPUPPCState *env = &cpu->env;
 199
 200     if (!val) {
 201         /* TODO: We don't support disabling vsx yet */
 202         return;
 203     }
 204     /* Allowable CPUs in spapr_cpu_core.c should already have gotten
 205      * rid of anything that doesn't do VMX */
 206     g_assert(env->insns_flags & PPC_ALTIVEC);
 207     if (!(env->insns_flags2 & PPC2_VSX)) {
 208         error_setg(errp, "VSX support not available");
 209         error_append_hint(errp, "Try appending -machine cap-vsx=off\n");
 210     }
 211 }
 212
 213 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
 214 {
 215     ERRP_GUARD();
 216     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 217     CPUPPCState *env = &cpu->env;
 218
 219     if (!val) {
 220         /* TODO: We don't support disabling dfp yet */
 221         return;
 222     }
 223     if (!(env->insns_flags2 & PPC2_DFP)) {
 224         error_setg(errp, "DFP support not available");
 225         error_append_hint(errp, "Try appending -machine cap-dfp=off\n");
 226     }
 227 }
 228
 229 SpaprCapPossible cap_cfpc_possible = {
 230     .num = 3,
 231     .vals = {"broken", "workaround", "fixed"},
 232     .help = "broken - no protection, workaround - workaround available,"
 233             " fixed - fixed in hardware",
 234 };
 235
 236 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val,
 237                                  Error **errp)
 238 {
 239     ERRP_GUARD();
 240     uint8_t kvm_val =  kvmppc_get_cap_safe_cache();
 241
 242     if (tcg_enabled() && val) {
 243         /* TCG only supports broken, allow other values and print a warning */
 244         warn_report("TCG doesn't support requested feature, cap-cfpc=%s",
 245                     cap_cfpc_possible.vals[val]);
 246     } else if (kvm_enabled() && (val > kvm_val)) {
 247         error_setg(errp,
 248                    "Requested safe cache capability level not supported by KVM");
 249         error_append_hint(errp, "Try appending -machine cap-cfpc=%s\n",
 250                           cap_cfpc_possible.vals[kvm_val]);
 251     }
 252 }
 253
 254 SpaprCapPossible cap_sbbc_possible = {
 255     .num = 3,
 256     .vals = {"broken", "workaround", "fixed"},
 257     .help = "broken - no protection, workaround - workaround available,"
 258             " fixed - fixed in hardware",
 259 };
 260
 261 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val,
 262                                         Error **errp)
 263 {
 264     ERRP_GUARD();
 265     uint8_t kvm_val =  kvmppc_get_cap_safe_bounds_check();
 266
 267     if (tcg_enabled() && val) {
 268         /* TCG only supports broken, allow other values and print a warning */
 269         warn_report("TCG doesn't support requested feature, cap-sbbc=%s",
 270                     cap_sbbc_possible.vals[val]);
 271     } else if (kvm_enabled() && (val > kvm_val)) {
 272         error_setg(errp,
 273 "Requested safe bounds check capability level not supported by KVM");
 274         error_append_hint(errp, "Try appending -machine cap-sbbc=%s\n",
 275                           cap_sbbc_possible.vals[kvm_val]);
 276     }
 277 }
 278
 279 SpaprCapPossible cap_ibs_possible = {
 280     .num = 5,
 281     /* Note workaround only maintained for compatibility */
 282     .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
 283     .help = "broken - no protection, workaround - count cache flush"
 284             ", fixed-ibs - indirect branch serialisation,"
 285             " fixed-ccd - cache count disabled,"
 286             " fixed-na - fixed in hardware (no longer applicable)",
 287 };
 288
 289 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
 290                                            uint8_t val, Error **errp)
 291 {
 292     ERRP_GUARD();
 293     uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
 294
 295     if (tcg_enabled() && val) {
 296         /* TCG only supports broken, allow other values and print a warning */
 297         warn_report("TCG doesn't support requested feature, cap-ibs=%s",
 298                     cap_ibs_possible.vals[val]);
 299     } else if (kvm_enabled() && (val > kvm_val)) {
 300         error_setg(errp,
 301 "Requested safe indirect branch capability level not supported by KVM");
 302         error_append_hint(errp, "Try appending -machine cap-ibs=%s\n",
 303                           cap_ibs_possible.vals[kvm_val]);
 304     }
 305 }
 306
 307 #define VALUE_DESC_TRISTATE     " (broken, workaround, fixed)"
 308
 309 bool spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
 310                           Error **errp)
 311 {
 312     hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]);
 313
 314     if (!kvmppc_hpt_needs_host_contiguous_pages()) {
 315         return true;
 316     }
 317
 318     if (maxpagesize > pagesize) {
 319         error_setg(errp,
 320                    "Can't support %"HWADDR_PRIu" kiB guest pages with %"
 321                    HWADDR_PRIu" kiB host pages with this KVM implementation",
 322                    maxpagesize >> 10, pagesize >> 10);
 323         return false;
 324     }
 325
 326     return true;
 327 }
 328
 329 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr,
 330                                       uint8_t val, Error **errp)
 331 {
 332     if (val < 12) {
 333         error_setg(errp, "Require at least 4kiB hpt-max-page-size");
 334         return;
 335     } else if (val < 16) {
 336         warn_report("Many guests require at least 64kiB hpt-max-page-size");
 337     }
 338
 339     spapr_check_pagesize(spapr, qemu_minrampagesize(), errp);
 340 }
 341
 342 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque)
 343 {
 344     return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration;
 345 }
 346
 347 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
 348                               uint32_t pshift)
 349 {
 350     unsigned maxshift = *((unsigned *)opaque);
 351
 352     assert(pshift >= seg_pshift);
 353
 354     /* Don't allow the guest to use pages bigger than the configured
 355      * maximum size */
 356     if (pshift > maxshift) {
 357         return false;
 358     }
 359
 360     /* For whatever reason, KVM doesn't allow multiple pagesizes
 361      * within a segment, *except* for the case of 16M pages in a 4k or
 362      * 64k segment.  Always exclude other cases, so that TCG and KVM
 363      * guests see a consistent environment */
 364     if ((pshift != seg_pshift) && (pshift != 24)) {
 365         return false;
 366     }
 367
 368     return true;
 369 }
 370
 371 static void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu,
 372                                  bool (*cb)(void *, uint32_t, uint32_t),
 373                                  void *opaque)
 374 {
 375     PPCHash64Options *opts = cpu->hash64_opts;
 376     int i;
 377     int n = 0;
 378     bool ci_largepage = false;
 379
 380     assert(opts);
 381
 382     n = 0;
 383     for (i = 0; i < ARRAY_SIZE(opts->sps); i++) {
 384         PPCHash64SegmentPageSizes *sps = &opts->sps[i];
 385         int j;
 386         int m = 0;
 387
 388         assert(n <= i);
 389
 390         if (!sps->page_shift) {
 391             break;
 392         }
 393
 394         for (j = 0; j < ARRAY_SIZE(sps->enc); j++) {
 395             PPCHash64PageSize *ps = &sps->enc[j];
 396
 397             assert(m <= j);
 398             if (!ps->page_shift) {
 399                 break;
 400             }
 401
 402             if (cb(opaque, sps->page_shift, ps->page_shift)) {
 403                 if (ps->page_shift >= 16) {
 404                     ci_largepage = true;
 405                 }
 406                 sps->enc[m++] = *ps;
 407             }
 408         }
 409
 410         /* Clear rest of the row */
 411         for (j = m; j < ARRAY_SIZE(sps->enc); j++) {
 412             memset(&sps->enc[j], 0, sizeof(sps->enc[j]));
 413         }
 414
 415         if (m) {
 416             n++;
 417         }
 418     }
 419
 420     /* Clear the rest of the table */
 421     for (i = n; i < ARRAY_SIZE(opts->sps); i++) {
 422         memset(&opts->sps[i], 0, sizeof(opts->sps[i]));
 423     }
 424
 425     if (!ci_largepage) {
 426         opts->flags &= ~PPC_HASH64_CI_LARGEPAGE;
 427     }
 428 }
 429
 430 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr,
 431                                           PowerPCCPU *cpu,
 432                                           uint8_t val, Error **errp)
 433 {
 434     unsigned maxshift = val;
 435
 436     ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
 437 }
 438
 439 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr,
 440                                     uint8_t val, Error **errp)
 441 {
 442     ERRP_GUARD();
 443     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 444     CPUPPCState *env = &cpu->env;
 445
 446     if (!val) {
 447         /* capability disabled by default */
 448         return;
 449     }
 450
 451     if (!(env->insns_flags2 & PPC2_ISA300)) {
 452         error_setg(errp, "Nested-HV only supported on POWER9 and later");
 453         error_append_hint(errp, "Try appending -machine cap-nested-hv=off\n");
 454         return;
 455     }
 456
 457     if (kvm_enabled()) {
 458         if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
 459                               spapr->max_compat_pvr)) {
 460             error_setg(errp, "Nested-HV only supported on POWER9 and later");
 461             error_append_hint(errp,
 462                               "Try appending -machine max-cpu-compat=power9\n");
 463             return;
 464         }
 465
 466         if (!kvmppc_has_cap_nested_kvm_hv()) {
 467             error_setg(errp,
 468                        "KVM implementation does not support Nested-HV");
 469             error_append_hint(errp,
 470                               "Try appending -machine cap-nested-hv=off\n");
 471         } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
 472                 error_setg(errp, "Error enabling cap-nested-hv with KVM");
 473                 error_append_hint(errp,
 474                                   "Try appending -machine cap-nested-hv=off\n");
 475         }
 476     }
 477 }
 478
 479 static void cap_large_decr_apply(SpaprMachineState *spapr,
 480                                  uint8_t val, Error **errp)
 481 {
 482     ERRP_GUARD();
 483     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 484     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
 485
 486     if (!val) {
 487         return; /* Disabled by default */
 488     }
 489
 490     if (tcg_enabled()) {
 491         if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
 492                               spapr->max_compat_pvr)) {
 493             error_setg(errp, "Large decrementer only supported on POWER9");
 494             error_append_hint(errp, "Try -cpu POWER9\n");
 495             return;
 496         }
 497     } else if (kvm_enabled()) {
 498         int kvm_nr_bits = kvmppc_get_cap_large_decr();
 499
 500         if (!kvm_nr_bits) {
 501             error_setg(errp, "No large decrementer support");
 502             error_append_hint(errp,
 503                               "Try appending -machine cap-large-decr=off\n");
 504         } else if (pcc->lrg_decr_bits != kvm_nr_bits) {
 505             error_setg(errp,
 506                        "KVM large decrementer size (%d) differs to model (%d)",
 507                        kvm_nr_bits, pcc->lrg_decr_bits);
 508             error_append_hint(errp,
 509                               "Try appending -machine cap-large-decr=off\n");
 510         }
 511     }
 512 }
 513
 514 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr,
 515                                      PowerPCCPU *cpu,
 516                                      uint8_t val, Error **errp)
 517 {
 518     ERRP_GUARD();
 519     CPUPPCState *env = &cpu->env;
 520     target_ulong lpcr = env->spr[SPR_LPCR];
 521
 522     if (kvm_enabled()) {
 523         if (kvmppc_enable_cap_large_decr(cpu, val)) {
 524             error_setg(errp, "No large decrementer support");
 525             error_append_hint(errp,
 526                               "Try appending -machine cap-large-decr=off\n");
 527         }
 528     }
 529
 530     if (val) {
 531         lpcr |= LPCR_LD;
 532     } else {
 533         lpcr &= ~LPCR_LD;
 534     }
 535     ppc_store_lpcr(cpu, lpcr);
 536 }
 537
 538 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
 539                                  Error **errp)
 540 {
 541     ERRP_GUARD();
 542     uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
 543
 544     if (tcg_enabled() && val) {
 545         /* TCG doesn't implement anything here, but allow with a warning */
 546         warn_report("TCG doesn't support requested feature, cap-ccf-assist=on");
 547     } else if (kvm_enabled() && (val > kvm_val)) {
 548         uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch();
 549
 550         if (kvm_ibs == SPAPR_CAP_FIXED_CCD) {
 551             /*
 552              * If we don't have CCF assist on the host, the assist
 553              * instruction is a harmless no-op.  It won't correctly
 554              * implement the cache count flush *but* if we have
 555              * count-cache-disabled in the host, that flush is
 556              * unnecessary.  So, specifically allow this case.  This
 557              * allows us to have better performance on POWER9 DD2.3,
 558              * while still working on POWER9 DD2.2 and POWER8 host
 559              * cpus.
 560              */
 561             return;
 562         }
 563         error_setg(errp,
 564                    "Requested count cache flush assist capability level not supported by KVM");
 565         error_append_hint(errp, "Try appending -machine cap-ccf-assist=off\n");
 566     }
 567 }
 568
 569 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val,
 570                                 Error **errp)
 571 {
 572     ERRP_GUARD();
 573     if (!val) {
 574         return; /* Disabled by default */
 575     }
 576
 577     if (kvm_enabled()) {
 578         if (!kvmppc_get_fwnmi()) {
 579             error_setg(errp,
 580 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM.");
 581             error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n");
 582         }
 583     }
 584 }
 585
 586 static void cap_rpt_invalidate_apply(SpaprMachineState *spapr,
 587                                      uint8_t val, Error **errp)
 588 {
 589     ERRP_GUARD();
 590
 591     if (!val) {
 592         /* capability disabled by default */
 593         return;
 594     }
 595
 596     if (tcg_enabled()) {
 597         error_setg(errp, "No H_RPT_INVALIDATE support in TCG");
 598         error_append_hint(errp,
 599                           "Try appending -machine cap-rpt-invalidate=off\n");
 600     } else if (kvm_enabled()) {
 601         if (!kvmppc_has_cap_mmu_radix()) {
 602             error_setg(errp, "H_RPT_INVALIDATE only supported on Radix");
 603             return;
 604         }
 605
 606         if (!kvmppc_has_cap_rpt_invalidate()) {
 607             error_setg(errp,
 608                        "KVM implementation does not support H_RPT_INVALIDATE");
 609             error_append_hint(errp,
 610                               "Try appending -machine cap-rpt-invalidate=off\n");
 611         } else {
 612             kvmppc_enable_h_rpt_invalidate();
 613         }
 614     }
 615 }
 616
 617 static void cap_ail_mode_3_apply(SpaprMachineState *spapr,
 618                                      uint8_t val, Error **errp)
 619 {
 620     ERRP_GUARD();
 621     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 622     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
 623
 624     if (!val) {
 625         return;
 626     }
 627
 628     if (tcg_enabled()) {
 629         /* AIL-3 is only supported on POWER8 and above CPUs. */
 630         if (!(pcc->insns_flags2 & PPC2_ISA207S)) {
 631             error_setg(errp, "TCG only supports cap-ail-mode-3 on POWER8 and later CPUs");
 632             error_append_hint(errp, "Try appending -machine cap-ail-mode-3=off\n");
 633             return;
 634         }
 635     } else if (kvm_enabled()) {
 636         if (!kvmppc_supports_ail_3()) {
 637             error_setg(errp, "KVM implementation does not support cap-ail-mode-3");
 638             error_append_hint(errp, "Try appending -machine cap-ail-mode-3=off\n");
 639             return;
 640         }
 641     }
 642 }
 643
 644 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
 645     [SPAPR_CAP_HTM] = {
 646         .name = "htm",
 647         .description = "Allow Hardware Transactional Memory (HTM)",
 648         .index = SPAPR_CAP_HTM,
 649         .get = spapr_cap_get_bool,
 650         .set = spapr_cap_set_bool,
 651         .type = "bool",
 652         .apply = cap_htm_apply,
 653     },
 654     [SPAPR_CAP_VSX] = {
 655         .name = "vsx",
 656         .description = "Allow Vector Scalar Extensions (VSX)",
 657         .index = SPAPR_CAP_VSX,
 658         .get = spapr_cap_get_bool,
 659         .set = spapr_cap_set_bool,
 660         .type = "bool",
 661         .apply = cap_vsx_apply,
 662     },
 663     [SPAPR_CAP_DFP] = {
 664         .name = "dfp",
 665         .description = "Allow Decimal Floating Point (DFP)",
 666         .index = SPAPR_CAP_DFP,
 667         .get = spapr_cap_get_bool,
 668         .set = spapr_cap_set_bool,
 669         .type = "bool",
 670         .apply = cap_dfp_apply,
 671     },
 672     [SPAPR_CAP_CFPC] = {
 673         .name = "cfpc",
 674         .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE,
 675         .index = SPAPR_CAP_CFPC,
 676         .get = spapr_cap_get_string,
 677         .set = spapr_cap_set_string,
 678         .type = "string",
 679         .possible = &cap_cfpc_possible,
 680         .apply = cap_safe_cache_apply,
 681     },
 682     [SPAPR_CAP_SBBC] = {
 683         .name = "sbbc",
 684         .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE,
 685         .index = SPAPR_CAP_SBBC,
 686         .get = spapr_cap_get_string,
 687         .set = spapr_cap_set_string,
 688         .type = "string",
 689         .possible = &cap_sbbc_possible,
 690         .apply = cap_safe_bounds_check_apply,
 691     },
 692     [SPAPR_CAP_IBS] = {
 693         .name = "ibs",
 694         .description =
 695             "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
 696             "fixed-ccd, fixed-na)",
 697         .index = SPAPR_CAP_IBS,
 698         .get = spapr_cap_get_string,
 699         .set = spapr_cap_set_string,
 700         .type = "string",
 701         .possible = &cap_ibs_possible,
 702         .apply = cap_safe_indirect_branch_apply,
 703     },
 704     [SPAPR_CAP_HPT_MAXPAGESIZE] = {
 705         .name = "hpt-max-page-size",
 706         .description = "Maximum page size for Hash Page Table guests",
 707         .index = SPAPR_CAP_HPT_MAXPAGESIZE,
 708         .get = spapr_cap_get_pagesize,
 709         .set = spapr_cap_set_pagesize,
 710         .type = "int",
 711         .apply = cap_hpt_maxpagesize_apply,
 712         .cpu_apply = cap_hpt_maxpagesize_cpu_apply,
 713         .migrate_needed = cap_hpt_maxpagesize_migrate_needed,
 714     },
 715     [SPAPR_CAP_NESTED_KVM_HV] = {
 716         .name = "nested-hv",
 717         .description = "Allow Nested KVM-HV",
 718         .index = SPAPR_CAP_NESTED_KVM_HV,
 719         .get = spapr_cap_get_bool,
 720         .set = spapr_cap_set_bool,
 721         .type = "bool",
 722         .apply = cap_nested_kvm_hv_apply,
 723     },
 724     [SPAPR_CAP_LARGE_DECREMENTER] = {
 725         .name = "large-decr",
 726         .description = "Allow Large Decrementer",
 727         .index = SPAPR_CAP_LARGE_DECREMENTER,
 728         .get = spapr_cap_get_bool,
 729         .set = spapr_cap_set_bool,
 730         .type = "bool",
 731         .apply = cap_large_decr_apply,
 732         .cpu_apply = cap_large_decr_cpu_apply,
 733     },
 734     [SPAPR_CAP_CCF_ASSIST] = {
 735         .name = "ccf-assist",
 736         .description = "Count Cache Flush Assist via HW Instruction",
 737         .index = SPAPR_CAP_CCF_ASSIST,
 738         .get = spapr_cap_get_bool,
 739         .set = spapr_cap_set_bool,
 740         .type = "bool",
 741         .apply = cap_ccf_assist_apply,
 742     },
 743     [SPAPR_CAP_FWNMI] = {
 744         .name = "fwnmi",
 745         .description = "Implements PAPR FWNMI option",
 746         .index = SPAPR_CAP_FWNMI,
 747         .get = spapr_cap_get_bool,
 748         .set = spapr_cap_set_bool,
 749         .type = "bool",
 750         .apply = cap_fwnmi_apply,
 751     },
 752     [SPAPR_CAP_RPT_INVALIDATE] = {
 753         .name = "rpt-invalidate",
 754         .description = "Allow H_RPT_INVALIDATE",
 755         .index = SPAPR_CAP_RPT_INVALIDATE,
 756         .get = spapr_cap_get_bool,
 757         .set = spapr_cap_set_bool,
 758         .type = "bool",
 759         .apply = cap_rpt_invalidate_apply,
 760     },
 761     [SPAPR_CAP_AIL_MODE_3] = {
 762         .name = "ail-mode-3",
 763         .description = "Alternate Interrupt Location (AIL) mode 3 support",
 764         .index = SPAPR_CAP_AIL_MODE_3,
 765         .get = spapr_cap_get_bool,
 766         .set = spapr_cap_set_bool,
 767         .type = "bool",
 768         .apply = cap_ail_mode_3_apply,
 769     },
 770 };
 771
 772 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr,
 773                                                const char *cputype)
 774 {
 775     SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
 776     SpaprCapabilities caps;
 777
 778     caps = smc->default_caps;
 779
 780     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00,
 781                                0, spapr->max_compat_pvr)) {
 782         caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF;
 783     }
 784
 785     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
 786                                0, spapr->max_compat_pvr)) {
 787         caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
 788         caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
 789         caps.caps[SPAPR_CAP_AIL_MODE_3] = SPAPR_CAP_OFF;
 790     }
 791
 792     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
 793                                0, spapr->max_compat_pvr)) {
 794         caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
 795     }
 796
 797     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
 798                                0, spapr->max_compat_pvr)) {
 799         caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
 800         caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
 801         caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
 802     }
 803
 804     /* This is for pseries-2.12 and older */
 805     if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) {
 806         uint8_t mps;
 807
 808         if (kvmppc_hpt_needs_host_contiguous_pages()) {
 809             mps = ctz64(qemu_minrampagesize());
 810         } else {
 811             mps = 34; /* allow everything up to 16GiB, i.e. everything */
 812         }
 813
 814         caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps;
 815     }
 816
 817     return caps;
 818 }
 819
 820 int spapr_caps_pre_load(void *opaque)
 821 {
 822     SpaprMachineState *spapr = opaque;
 823
 824     /* Set to default so we can tell if this came in with the migration */
 825     spapr->mig = spapr->def;
 826     return 0;
 827 }
 828
 829 int spapr_caps_pre_save(void *opaque)
 830 {
 831     SpaprMachineState *spapr = opaque;
 832
 833     spapr->mig = spapr->eff;
 834     return 0;
 835 }
 836
 837 /* This has to be called from the top-level spapr post_load, not the
 838  * caps specific one.  Otherwise it wouldn't be called when the source
 839  * caps are all defaults, which could still conflict with overridden
 840  * caps on the destination */
 841 int spapr_caps_post_migration(SpaprMachineState *spapr)
 842 {
 843     int i;
 844     bool ok = true;
 845     SpaprCapabilities dstcaps = spapr->eff;
 846     SpaprCapabilities srccaps;
 847
 848     srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
 849     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 850         /* If not default value then assume came in with the migration */
 851         if (spapr->mig.caps[i] != spapr->def.caps[i]) {
 852             srccaps.caps[i] = spapr->mig.caps[i];
 853         }
 854     }
 855
 856     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 857         SpaprCapabilityInfo *info = &capability_table[i];
 858
 859         if (srccaps.caps[i] > dstcaps.caps[i]) {
 860             error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
 861                          info->name, srccaps.caps[i], dstcaps.caps[i]);
 862             ok = false;
 863         }
 864
 865         if (srccaps.caps[i] < dstcaps.caps[i]) {
 866             warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
 867                          info->name, srccaps.caps[i], dstcaps.caps[i]);
 868         }
 869     }
 870
 871     return ok ? 0 : -EINVAL;
 872 }
 873
 874 /* Used to generate the migration field and needed function for a spapr cap */
 875 #define SPAPR_CAP_MIG_STATE(sname, cap)                 \
 876 static bool spapr_cap_##sname##_needed(void *opaque)    \
 877 {                                                       \
 878     SpaprMachineState *spapr = opaque;                  \
 879     bool (*needed)(void *opaque) =                      \
 880         capability_table[cap].migrate_needed;           \
 881                                                         \
 882     return needed ? needed(opaque) : true &&            \
 883            spapr->cmd_line_caps[cap] &&                 \
 884            (spapr->eff.caps[cap] !=                     \
 885             spapr->def.caps[cap]);                      \
 886 }                                                       \
 887                                                         \
 888 const VMStateDescription vmstate_spapr_cap_##sname = {  \
 889     .name = "spapr/cap/" #sname,                        \
 890     .version_id = 1,                                    \
 891     .minimum_version_id = 1,                            \
 892     .needed = spapr_cap_##sname##_needed,               \
 893     .fields = (VMStateField[]) {                        \
 894         VMSTATE_UINT8(mig.caps[cap],                    \
 895                       SpaprMachineState),               \
 896         VMSTATE_END_OF_LIST()                           \
 897     },                                                  \
 898 }
 899
 900 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM);
 901 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX);
 902 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP);
 903 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC);
 904 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
 905 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
 906 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE);
 907 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV);
 908 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER);
 909 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST);
 910 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI);
 911 SPAPR_CAP_MIG_STATE(rpt_invalidate, SPAPR_CAP_RPT_INVALIDATE);
 912
 913 void spapr_caps_init(SpaprMachineState *spapr)
 914 {
 915     SpaprCapabilities default_caps;
 916     int i;
 917
 918     /* Compute the actual set of caps we should run with */
 919     default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
 920
 921     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 922         /* Store the defaults */
 923         spapr->def.caps[i] = default_caps.caps[i];
 924         /* If not set on the command line then apply the default value */
 925         if (!spapr->cmd_line_caps[i]) {
 926             spapr->eff.caps[i] = default_caps.caps[i];
 927         }
 928     }
 929 }
 930
 931 void spapr_caps_apply(SpaprMachineState *spapr)
 932 {
 933     int i;
 934
 935     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 936         SpaprCapabilityInfo *info = &capability_table[i];
 937
 938         /*
 939          * If the apply function can't set the desired level and thinks it's
 940          * fatal, it should cause that.
 941          */
 942         info->apply(spapr, spapr->eff.caps[i], &error_fatal);
 943     }
 944 }
 945
 946 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu)
 947 {
 948     int i;
 949
 950     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 951         SpaprCapabilityInfo *info = &capability_table[i];
 952
 953         /*
 954          * If the apply function can't set the desired level and thinks it's
 955          * fatal, it should cause that.
 956          */
 957         if (info->cpu_apply) {
 958             info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal);
 959         }
 960     }
 961 }
 962
 963 void spapr_caps_add_properties(SpaprMachineClass *smc)
 964 {
 965     ObjectClass *klass = OBJECT_CLASS(smc);
 966     int i;
 967
 968     for (i = 0; i < ARRAY_SIZE(capability_table); i++) {
 969         SpaprCapabilityInfo *cap = &capability_table[i];
 970         g_autofree char *name = g_strdup_printf("cap-%s", cap->name);
 971         g_autofree char *desc = g_strdup_printf("%s", cap->description);
 972
 973         object_class_property_add(klass, name, cap->type,
 974                                   cap->get, cap->set,
 975                                   NULL, cap);
 976
 977         object_class_property_set_description(klass, name, desc);
 978     }
 979 }