hw/ppc/spapr_cpu_core.c

   1 /*
   2  * sPAPR CPU core device, acts as container of CPU thread devices.
   3  *
   4  * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9 #include "hw/cpu/core.h"
  10 #include "hw/ppc/spapr_cpu_core.h"
  11 #include "target-ppc/cpu.h"
  12 #include "hw/ppc/spapr.h"
  13 #include "hw/boards.h"
  14 #include "qapi/error.h"
  15 #include "sysemu/cpus.h"
  16 #include "target-ppc/kvm_ppc.h"
  17 #include "hw/ppc/ppc.h"
  18 #include "target-ppc/mmu-hash64.h"
  19 #include "sysemu/numa.h"
  20
  21 static void spapr_cpu_reset(void *opaque)
  22 {
  23     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  24     PowerPCCPU *cpu = opaque;
  25     CPUState *cs = CPU(cpu);
  26     CPUPPCState *env = &cpu->env;
  27
  28     cpu_reset(cs);
  29
  30     /* All CPUs start halted.  CPU0 is unhalted from the machine level
  31      * reset code and the rest are explicitly started up by the guest
  32      * using an RTAS call */
  33     cs->halted = 1;
  34
  35     env->spr[SPR_HIOR] = 0;
  36
  37     ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
  38                                 &error_fatal);
  39 }
  40
  41 static void spapr_cpu_destroy(PowerPCCPU *cpu)
  42 {
  43     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  44
  45     xics_cpu_destroy(spapr->xics, cpu);
  46     qemu_unregister_reset(spapr_cpu_reset, cpu);
  47 }
  48
  49 void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
  50 {
  51     CPUPPCState *env = &cpu->env;
  52     CPUState *cs = CPU(cpu);
  53     int i;
  54
  55     /* Set time-base frequency to 512 MHz */
  56     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
  57
  58     /* Enable PAPR mode in TCG or KVM */
  59     cpu_ppc_set_papr(cpu);
  60
  61     if (cpu->max_compat) {
  62         Error *local_err = NULL;
  63
  64         ppc_set_compat(cpu, cpu->max_compat, &local_err);
  65         if (local_err) {
  66             error_propagate(errp, local_err);
  67             return;
  68         }
  69     }
  70
  71     /* Set NUMA node for the added CPUs  */
  72     for (i = 0; i < nb_numa_nodes; i++) {
  73         if (test_bit(cs->cpu_index, numa_info[i].node_cpu)) {
  74             cs->numa_node = i;
  75             break;
  76         }
  77     }
  78
  79     xics_cpu_setup(spapr->xics, cpu);
  80
  81     qemu_register_reset(spapr_cpu_reset, cpu);
  82     spapr_cpu_reset(cpu);
  83 }
  84
  85 /*
  86  * Return the sPAPR CPU core type for @model which essentially is the CPU
  87  * model specified with -cpu cmdline option.
  88  */
  89 char *spapr_get_cpu_core_type(const char *model)
  90 {
  91     char *core_type;
  92     gchar **model_pieces = g_strsplit(model, ",", 2);
  93
  94     core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE);
  95     g_strfreev(model_pieces);
  96     return core_type;
  97 }
  98
  99 static void spapr_core_release(DeviceState *dev, void *opaque)
 100 {
 101     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 102     const char *typename = object_class_get_name(sc->cpu_class);
 103     size_t size = object_type_get_instance_size(typename);
 104     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 105     CPUCore *cc = CPU_CORE(dev);
 106     int i;
 107
 108     for (i = 0; i < cc->nr_threads; i++) {
 109         void *obj = sc->threads + i * size;
 110         DeviceState *dev = DEVICE(obj);
 111         CPUState *cs = CPU(dev);
 112         PowerPCCPU *cpu = POWERPC_CPU(cs);
 113
 114         spapr_cpu_destroy(cpu);
 115         cpu_remove_sync(cs);
 116         object_unparent(obj);
 117     }
 118
 119     spapr->cores[cc->core_id / smp_threads] = NULL;
 120
 121     g_free(sc->threads);
 122     object_unparent(OBJECT(dev));
 123 }
 124
 125 void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
 126                        Error **errp)
 127 {
 128     CPUCore *cc = CPU_CORE(dev);
 129     int smt = kvmppc_smt_threads();
 130     int index = cc->core_id / smp_threads;
 131     sPAPRDRConnector *drc =
 132         spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
 133     sPAPRDRConnectorClass *drck;
 134     Error *local_err = NULL;
 135
 136     if (index == 0) {
 137         error_setg(errp, "Boot CPU core may not be unplugged");
 138         return;
 139     }
 140
 141     g_assert(drc);
 142
 143     drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
 144     drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
 145     if (local_err) {
 146         error_propagate(errp, local_err);
 147         return;
 148     }
 149
 150     spapr_hotplug_req_remove_by_index(drc);
 151 }
 152
 153 void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 154                      Error **errp)
 155 {
 156     sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(OBJECT(hotplug_dev));
 157     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 158     sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
 159     CPUCore *cc = CPU_CORE(dev);
 160     CPUState *cs = CPU(core->threads);
 161     sPAPRDRConnector *drc;
 162     sPAPRDRConnectorClass *drck;
 163     Error *local_err = NULL;
 164     void *fdt = NULL;
 165     int fdt_offset = 0;
 166     int index = cc->core_id / smp_threads;
 167     int smt = kvmppc_smt_threads();
 168
 169     g_assert(smc->dr_cpu_enabled);
 170
 171     drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
 172     spapr->cores[index] = OBJECT(dev);
 173
 174     g_assert(drc);
 175
 176     /*
 177      * Setup CPU DT entries only for hotplugged CPUs. For boot time or
 178      * coldplugged CPUs DT entries are setup in spapr_finalize_fdt().
 179      */
 180     if (dev->hotplugged) {
 181         fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
 182     }
 183
 184     drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
 185     drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
 186     if (local_err) {
 187         g_free(fdt);
 188         spapr->cores[index] = NULL;
 189         error_propagate(errp, local_err);
 190         return;
 191     }
 192
 193     if (dev->hotplugged) {
 194         /*
 195          * Send hotplug notification interrupt to the guest only in case
 196          * of hotplugged CPUs.
 197          */
 198         spapr_hotplug_req_add_by_index(drc);
 199     } else {
 200         /*
 201          * Set the right DRC states for cold plugged CPU.
 202          */
 203         drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
 204         drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
 205     }
 206 }
 207
 208 void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 209                          Error **errp)
 210 {
 211     MachineState *machine = MACHINE(OBJECT(hotplug_dev));
 212     sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(OBJECT(hotplug_dev));
 213     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 214     int spapr_max_cores = max_cpus / smp_threads;
 215     int index;
 216     Error *local_err = NULL;
 217     CPUCore *cc = CPU_CORE(dev);
 218     char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
 219     const char *type = object_get_typename(OBJECT(dev));
 220
 221     if (!smc->dr_cpu_enabled) {
 222         error_setg(&local_err, "CPU hotplug not supported for this machine");
 223         goto out;
 224     }
 225
 226     if (strcmp(base_core_type, type)) {
 227         error_setg(&local_err, "CPU core type should be %s", base_core_type);
 228         goto out;
 229     }
 230
 231     if (cc->nr_threads != smp_threads) {
 232         error_setg(&local_err, "threads must be %d", smp_threads);
 233         goto out;
 234     }
 235
 236     if (cc->core_id % smp_threads) {
 237         error_setg(&local_err, "invalid core id %d", cc->core_id);
 238         goto out;
 239     }
 240
 241     index = cc->core_id / smp_threads;
 242     if (index < 0 || index >= spapr_max_cores) {
 243         error_setg(&local_err, "core id %d out of range", cc->core_id);
 244         goto out;
 245     }
 246
 247     if (spapr->cores[index]) {
 248         error_setg(&local_err, "core %d already populated", cc->core_id);
 249         goto out;
 250     }
 251
 252 out:
 253     g_free(base_core_type);
 254     error_propagate(errp, local_err);
 255 }
 256
 257 static void spapr_cpu_core_realize_child(Object *child, Error **errp)
 258 {
 259     Error *local_err = NULL;
 260     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 261     CPUState *cs = CPU(child);
 262     PowerPCCPU *cpu = POWERPC_CPU(cs);
 263
 264     object_property_set_bool(child, true, "realized", &local_err);
 265     if (local_err) {
 266         error_propagate(errp, local_err);
 267         return;
 268     }
 269
 270     spapr_cpu_init(spapr, cpu, &local_err);
 271     if (local_err) {
 272         error_propagate(errp, local_err);
 273         return;
 274     }
 275 }
 276
 277 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
 278 {
 279     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 280     CPUCore *cc = CPU_CORE(OBJECT(dev));
 281     const char *typename = object_class_get_name(sc->cpu_class);
 282     size_t size = object_type_get_instance_size(typename);
 283     Error *local_err = NULL;
 284     void *obj;
 285     int i, j;
 286
 287     sc->threads = g_malloc0(size * cc->nr_threads);
 288     for (i = 0; i < cc->nr_threads; i++) {
 289         char id[32];
 290         CPUState *cs;
 291
 292         obj = sc->threads + i * size;
 293
 294         object_initialize(obj, size, typename);
 295         cs = CPU(obj);
 296         cs->cpu_index = cc->core_id + i;
 297         snprintf(id, sizeof(id), "thread[%d]", i);
 298         object_property_add_child(OBJECT(sc), id, obj, &local_err);
 299         if (local_err) {
 300             goto err;
 301         }
 302         object_unref(obj);
 303     }
 304
 305     for (j = 0; j < cc->nr_threads; j++) {
 306         obj = sc->threads + j * size;
 307
 308         spapr_cpu_core_realize_child(obj, &local_err);
 309         if (local_err) {
 310             goto err;
 311         }
 312     }
 313     return;
 314
 315 err:
 316     while (--i >= 0) {
 317         obj = sc->threads + i * size;
 318         object_unparent(obj);
 319     }
 320     g_free(sc->threads);
 321     error_propagate(errp, local_err);
 322 }
 323
 324 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
 325 {
 326     DeviceClass *dc = DEVICE_CLASS(oc);
 327     dc->realize = spapr_cpu_core_realize;
 328 }
 329
 330 /*
 331  * instance_init routines from different flavours of sPAPR CPU cores.
 332  */
 333 #define SPAPR_CPU_CORE_INITFN(_type, _fname) \
 334 static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \
 335 { \
 336     sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \
 337     char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \
 338     ObjectClass *oc = object_class_by_name(name); \
 339     g_assert(oc); \
 340     g_free((void *)name); \
 341     core->cpu_class = oc; \
 342 }
 343
 344 SPAPR_CPU_CORE_INITFN(970mp_v1.0, 970MP_v10);
 345 SPAPR_CPU_CORE_INITFN(970mp_v1.1, 970MP_v11);
 346 SPAPR_CPU_CORE_INITFN(970_v2.2, 970);
 347 SPAPR_CPU_CORE_INITFN(POWER5+_v2.1, POWER5plus);
 348 SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7);
 349 SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus);
 350 SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8);
 351 SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E);
 352 SPAPR_CPU_CORE_INITFN(POWER8NVL_v1.0, POWER8NVL);
 353
 354 typedef struct SPAPRCoreInfo {
 355     const char *name;
 356     void (*initfn)(Object *obj);
 357 } SPAPRCoreInfo;
 358
 359 static const SPAPRCoreInfo spapr_cores[] = {
 360     /* 970 and aliaes */
 361     { .name = "970_v2.2", .initfn = spapr_cpu_core_970_initfn },
 362     { .name = "970", .initfn = spapr_cpu_core_970_initfn },
 363
 364     /* 970MP variants and aliases */
 365     { .name = "970MP_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
 366     { .name = "970mp_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
 367     { .name = "970MP_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
 368     { .name = "970mp_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
 369     { .name = "970mp", .initfn = spapr_cpu_core_970MP_v11_initfn },
 370
 371     /* POWER5 and aliases */
 372     { .name = "POWER5+_v2.1", .initfn = spapr_cpu_core_POWER5plus_initfn },
 373     { .name = "POWER5+", .initfn = spapr_cpu_core_POWER5plus_initfn },
 374
 375     /* POWER7 and aliases */
 376     { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn },
 377     { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn },
 378
 379     /* POWER7+ and aliases */
 380     { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn },
 381     { .name = "POWER7+", .initfn = spapr_cpu_core_POWER7plus_initfn },
 382
 383     /* POWER8 and aliases */
 384     { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn },
 385     { .name = "POWER8", .initfn = spapr_cpu_core_POWER8_initfn },
 386     { .name = "power8", .initfn = spapr_cpu_core_POWER8_initfn },
 387
 388     /* POWER8E and aliases */
 389     { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn },
 390     { .name = "POWER8E", .initfn = spapr_cpu_core_POWER8E_initfn },
 391
 392     /* POWER8NVL and aliases */
 393     { .name = "POWER8NVL_v1.0", .initfn = spapr_cpu_core_POWER8NVL_initfn },
 394     { .name = "POWER8NVL", .initfn = spapr_cpu_core_POWER8NVL_initfn },
 395
 396     { .name = NULL }
 397 };
 398
 399 static void spapr_cpu_core_register(const SPAPRCoreInfo *info)
 400 {
 401     TypeInfo type_info = {
 402         .parent = TYPE_SPAPR_CPU_CORE,
 403         .instance_size = sizeof(sPAPRCPUCore),
 404         .instance_init = info->initfn,
 405     };
 406
 407     type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name);
 408     type_register(&type_info);
 409     g_free((void *)type_info.name);
 410 }
 411
 412 static const TypeInfo spapr_cpu_core_type_info = {
 413     .name = TYPE_SPAPR_CPU_CORE,
 414     .parent = TYPE_CPU_CORE,
 415     .abstract = true,
 416     .instance_size = sizeof(sPAPRCPUCore),
 417     .class_init = spapr_cpu_core_class_init,
 418 };
 419
 420 static void spapr_cpu_core_register_types(void)
 421 {
 422     const SPAPRCoreInfo *info = spapr_cores;
 423
 424     type_register_static(&spapr_cpu_core_type_info);
 425     while (info->name) {
 426         spapr_cpu_core_register(info);
 427         info++;
 428     }
 429 }
 430
 431 type_init(spapr_cpu_core_register_types)