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spapr: Move spapr_cpu_init() to spapr_cpu_core.c
[mirror_qemu.git] / hw / ppc / spapr_cpu_core.c
1 /*
2 * sPAPR CPU core device, acts as container of CPU thread devices.
3 *
4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9 #include "hw/cpu/core.h"
10 #include "hw/ppc/spapr_cpu_core.h"
11 #include "target-ppc/cpu.h"
12 #include "hw/ppc/spapr.h"
13 #include "hw/boards.h"
14 #include "qapi/error.h"
15 #include <sysemu/cpus.h>
16 #include "target-ppc/kvm_ppc.h"
17 #include "hw/ppc/ppc.h"
18 #include "target-ppc/mmu-hash64.h"
19 #include <sysemu/numa.h>
20
21 static void spapr_cpu_reset(void *opaque)
22 {
23 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
24 PowerPCCPU *cpu = opaque;
25 CPUState *cs = CPU(cpu);
26 CPUPPCState *env = &cpu->env;
27
28 cpu_reset(cs);
29
30 /* All CPUs start halted. CPU0 is unhalted from the machine level
31 * reset code and the rest are explicitly started up by the guest
32 * using an RTAS call */
33 cs->halted = 1;
34
35 env->spr[SPR_HIOR] = 0;
36
37 ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
38 &error_fatal);
39 }
40
41 void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
42 {
43 CPUPPCState *env = &cpu->env;
44
45 /* Set time-base frequency to 512 MHz */
46 cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
47
48 /* Enable PAPR mode in TCG or KVM */
49 cpu_ppc_set_papr(cpu);
50
51 if (cpu->max_compat) {
52 Error *local_err = NULL;
53
54 ppc_set_compat(cpu, cpu->max_compat, &local_err);
55 if (local_err) {
56 error_propagate(errp, local_err);
57 return;
58 }
59 }
60
61 xics_cpu_setup(spapr->icp, cpu);
62
63 qemu_register_reset(spapr_cpu_reset, cpu);
64 }
65
66 static int spapr_cpu_core_realize_child(Object *child, void *opaque)
67 {
68 Error **errp = opaque;
69 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
70 CPUState *cs = CPU(child);
71 PowerPCCPU *cpu = POWERPC_CPU(cs);
72
73 object_property_set_bool(child, true, "realized", errp);
74 if (*errp) {
75 return 1;
76 }
77
78 spapr_cpu_init(spapr, cpu, errp);
79 if (*errp) {
80 return 1;
81 }
82 return 0;
83 }
84
85 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
86 {
87 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
88 CPUCore *cc = CPU_CORE(OBJECT(dev));
89 const char *typename = object_class_get_name(sc->cpu_class);
90 size_t size = object_type_get_instance_size(typename);
91 Error *local_err = NULL;
92 Object *obj;
93 int i;
94
95 sc->threads = g_malloc0(size * cc->nr_threads);
96 for (i = 0; i < cc->nr_threads; i++) {
97 char id[32];
98 void *obj = sc->threads + i * size;
99
100 object_initialize(obj, size, typename);
101 snprintf(id, sizeof(id), "thread[%d]", i);
102 object_property_add_child(OBJECT(sc), id, obj, &local_err);
103 if (local_err) {
104 goto err;
105 }
106 }
107 object_child_foreach(OBJECT(dev), spapr_cpu_core_realize_child, &local_err);
108 if (local_err) {
109 goto err;
110 } else {
111 return;
112 }
113
114 err:
115 while (i >= 0) {
116 obj = sc->threads + i * size;
117 object_unparent(obj);
118 i--;
119 }
120 g_free(sc->threads);
121 error_propagate(errp, local_err);
122 }
123
124 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
125 {
126 DeviceClass *dc = DEVICE_CLASS(oc);
127 dc->realize = spapr_cpu_core_realize;
128 }
129
130 /*
131 * instance_init routines from different flavours of sPAPR CPU cores.
132 * TODO: Add support for 'host' core type.
133 */
134 #define SPAPR_CPU_CORE_INITFN(_type, _fname) \
135 static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \
136 { \
137 sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \
138 char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \
139 ObjectClass *oc = object_class_by_name(name); \
140 g_assert(oc); \
141 g_free((void *)name); \
142 core->cpu_class = oc; \
143 }
144
145 SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7);
146 SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus);
147 SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8);
148 SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E);
149
150 typedef struct SPAPRCoreInfo {
151 const char *name;
152 void (*initfn)(Object *obj);
153 } SPAPRCoreInfo;
154
155 static const SPAPRCoreInfo spapr_cores[] = {
156 /* POWER7 and aliases */
157 { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn },
158 { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn },
159
160 /* POWER7+ and aliases */
161 { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn },
162 { .name = "POWER7+", .initfn = spapr_cpu_core_POWER7plus_initfn },
163
164 /* POWER8 and aliases */
165 { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn },
166 { .name = "POWER8", .initfn = spapr_cpu_core_POWER8_initfn },
167 { .name = "power8", .initfn = spapr_cpu_core_POWER8_initfn },
168
169 /* POWER8E and aliases */
170 { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn },
171 { .name = "POWER8E", .initfn = spapr_cpu_core_POWER8E_initfn },
172
173 { .name = NULL }
174 };
175
176 static void spapr_cpu_core_register(const SPAPRCoreInfo *info)
177 {
178 TypeInfo type_info = {
179 .parent = TYPE_SPAPR_CPU_CORE,
180 .instance_size = sizeof(sPAPRCPUCore),
181 .instance_init = info->initfn,
182 };
183
184 type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name);
185 type_register(&type_info);
186 g_free((void *)type_info.name);
187 }
188
189 static const TypeInfo spapr_cpu_core_type_info = {
190 .name = TYPE_SPAPR_CPU_CORE,
191 .parent = TYPE_CPU_CORE,
192 .abstract = true,
193 .instance_size = sizeof(sPAPRCPUCore),
194 .class_init = spapr_cpu_core_class_init,
195 };
196
197 static void spapr_cpu_core_register_types(void)
198 {
199 const SPAPRCoreInfo *info = spapr_cores;
200
201 type_register_static(&spapr_cpu_core_type_info);
202 while (info->name) {
203 spapr_cpu_core_register(info);
204 info++;
205 }
206 }
207
208 type_init(spapr_cpu_core_register_types)