hw/ppc_chrp.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "vl.h"
  26 #include "ppc_mac.h"
  27
  28 /* UniN device */
  29 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  30 {
  31 }
  32
  33 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  34 {
  35     return 0;
  36 }
  37
  38 static CPUWriteMemoryFunc *unin_write[] = {
  39     &unin_writel,
  40     &unin_writel,
  41     &unin_writel,
  42 };
  43
  44 static CPUReadMemoryFunc *unin_read[] = {
  45     &unin_readl,
  46     &unin_readl,
  47     &unin_readl,
  48 };
  49
  50 /* PowerPC Mac99 hardware initialisation */
  51 static void ppc_core99_init (int ram_size, int vga_ram_size,
  52                              const char *boot_device, DisplayState *ds,
  53                              const char **fd_filename, int snapshot,
  54                              const char *kernel_filename,
  55                              const char *kernel_cmdline,
  56                              const char *initrd_filename,
  57                              const char *cpu_model)
  58 {
  59     CPUState *env = NULL, *envs[MAX_CPUS];
  60     char buf[1024];
  61     qemu_irq *pic, **openpic_irqs;
  62     int unin_memory;
  63     int linux_boot, i;
  64     unsigned long bios_offset, vga_bios_offset;
  65     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  66     PCIBus *pci_bus;
  67     nvram_t nvram;
  68 #if 0
  69     MacIONVRAMState *nvr;
  70     int nvram_mem_index;
  71 #endif
  72     m48t59_t *m48t59;
  73     int vga_bios_size, bios_size;
  74     qemu_irq *dummy_irq;
  75     int pic_mem_index, dbdma_mem_index, cuda_mem_index;
  76     int ide_mem_index[2];
  77     int ppc_boot_device = boot_device[0];
  78
  79     linux_boot = (kernel_filename != NULL);
  80
  81     /* init CPUs */
  82     if (cpu_model == NULL)
  83         cpu_model = "default";
  84     for (i = 0; i < smp_cpus; i++) {
  85         env = cpu_init(cpu_model);
  86         if (!env) {
  87             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
  88             exit(1);
  89         }
  90         /* Set time-base frequency to 100 Mhz */
  91         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
  92 #if 0
  93         env->osi_call = vga_osi_call;
  94 #endif
  95         qemu_register_reset(&cpu_ppc_reset, env);
  96         register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
  97         envs[i] = env;
  98     }
  99     if (env->nip < 0xFFF80000) {
 100         /* Special test for PowerPC 601:
 101          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 102          * But the NVRAM is located at 0xFFF04000...
 103          */
 104         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 105     }
 106
 107     /* allocate RAM */
 108     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 109
 110     /* allocate and load BIOS */
 111     bios_offset = ram_size + vga_ram_size;
 112     if (bios_name == NULL)
 113         bios_name = BIOS_FILENAME;
 114     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 115     bios_size = load_image(buf, phys_ram_base + bios_offset);
 116     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 117         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 118         exit(1);
 119     }
 120     bios_size = (bios_size + 0xfff) & ~0xfff;
 121     if (bios_size > 0x00080000) {
 122         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 123         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 124     }
 125     cpu_register_physical_memory((uint32_t)(-bios_size),
 126                                  bios_size, bios_offset | IO_MEM_ROM);
 127
 128     /* allocate and load VGA BIOS */
 129     vga_bios_offset = bios_offset + bios_size;
 130     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 131     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 132     if (vga_bios_size < 0) {
 133         /* if no bios is present, we can still work */
 134         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 135         vga_bios_size = 0;
 136     } else {
 137         /* set a specific header (XXX: find real Apple format for NDRV
 138            drivers) */
 139         phys_ram_base[vga_bios_offset] = 'N';
 140         phys_ram_base[vga_bios_offset + 1] = 'D';
 141         phys_ram_base[vga_bios_offset + 2] = 'R';
 142         phys_ram_base[vga_bios_offset + 3] = 'V';
 143         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 144                      vga_bios_size);
 145         vga_bios_size += 8;
 146     }
 147     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 148
 149     if (linux_boot) {
 150         kernel_base = KERNEL_LOAD_ADDR;
 151         /* now we can load the kernel */
 152         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 153         if (kernel_size < 0) {
 154             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 155                       kernel_filename);
 156             exit(1);
 157         }
 158         /* load initrd */
 159         if (initrd_filename) {
 160             initrd_base = INITRD_LOAD_ADDR;
 161             initrd_size = load_image(initrd_filename,
 162                                      phys_ram_base + initrd_base);
 163             if (initrd_size < 0) {
 164                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 165                           initrd_filename);
 166                 exit(1);
 167             }
 168         } else {
 169             initrd_base = 0;
 170             initrd_size = 0;
 171         }
 172         ppc_boot_device = 'm';
 173     } else {
 174         kernel_base = 0;
 175         kernel_size = 0;
 176         initrd_base = 0;
 177         initrd_size = 0;
 178     }
 179
 180     isa_mem_base = 0x80000000;
 181
 182     /* Register 8 MB of ISA IO space */
 183     isa_mmio_init(0xf2000000, 0x00800000);
 184
 185     /* UniN init */
 186     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 187     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 188
 189     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 190     openpic_irqs[0] =
 191         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 192     for (i = 0; i < smp_cpus; i++) {
 193         /* Mac99 IRQ connection between OpenPIC outputs pins
 194          * and PowerPC input pins
 195          */
 196         switch (PPC_INPUT(env)) {
 197         case PPC_FLAGS_INPUT_6xx:
 198             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 199             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 200                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 201             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 202                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 203             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 204                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 205             /* Not connected ? */
 206             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 207             /* Check this */
 208             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 209                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 210             break;
 211 #if defined(TARGET_PPC64)
 212         case PPC_FLAGS_INPUT_970:
 213             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 214             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 215                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 216             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 217                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 218             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 219                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 220             /* Not connected ? */
 221             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 222             /* Check this */
 223             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 224                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 225             break;
 226 #endif /* defined(TARGET_PPC64) */
 227         default:
 228             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 229             exit(1);
 230         }
 231     }
 232     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 233     pci_bus = pci_pmac_init(pic);
 234     /* init basic PC hardware */
 235     pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
 236                  ram_size, vga_ram_size,
 237                  vga_bios_offset, vga_bios_size);
 238
 239     /* XXX: suppress that */
 240     dummy_irq = i8259_init(NULL);
 241
 242     /* XXX: use Mac Serial port */
 243     serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
 244     for(i = 0; i < nb_nics; i++) {
 245         if (!nd_table[i].model)
 246             nd_table[i].model = "ne2k_pci";
 247         pci_nic_init(pci_bus, &nd_table[i], -1);
 248     }
 249 #if 1
 250     ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
 251     ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
 252 #else
 253     pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
 254 #endif
 255     /* cuda also initialize ADB */
 256     cuda_init(&cuda_mem_index, pic[0x19]);
 257
 258     adb_kbd_init(&adb_bus);
 259     adb_mouse_init(&adb_bus);
 260
 261     dbdma_init(&dbdma_mem_index);
 262
 263     macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
 264                cuda_mem_index, NULL, 2, ide_mem_index);
 265
 266     if (usb_enabled) {
 267         usb_ohci_init_pci(pci_bus, 3, -1);
 268     }
 269
 270     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 271         graphic_depth = 15;
 272 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
 273     /* The NewWorld NVRAM is not located in the MacIO device */
 274     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 275     pmac_format_nvram_partition(nvr, 0x2000);
 276     macio_nvram_map(nvr, 0xFFF04000);
 277     nvram.opaque = nvr;
 278     nvram.read_fn = &macio_nvram_read;
 279     nvram.write_fn = &macio_nvram_write;
 280 #else
 281     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 282     nvram.opaque = m48t59;
 283     nvram.read_fn = &m48t59_read;
 284     nvram.write_fn = &m48t59_write;
 285 #endif
 286     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
 287                          ppc_boot_device, kernel_base, kernel_size,
 288                          kernel_cmdline,
 289                          initrd_base, initrd_size,
 290                          /* XXX: need an option to load a NVRAM image */
 291                          0,
 292                          graphic_width, graphic_height, graphic_depth);
 293     /* No PCI init: the BIOS will do it */
 294
 295     /* Special port to get debug messages from Open-Firmware */
 296     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 297  }
 298
 299 QEMUMachine core99_machine = {
 300     "mac99",
 301     "Mac99 based PowerMAC",
 302     ppc_core99_init,
 303 };