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hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT
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1 /*
2 * Support for generating ACPI tables and passing them to Guests
3 *
4 * RISC-V virt ACPI generation
5 *
6 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
7 * Copyright (C) 2006 Fabrice Bellard
8 * Copyright (C) 2013 Red Hat Inc
9 * Copyright (c) 2015 HUAWEI TECHNOLOGIES CO.,LTD.
10 * Copyright (C) 2021-2023 Ventana Micro Systems Inc
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, see <http://www.gnu.org/licenses/>.
24 */
25
26 #include "qemu/osdep.h"
27 #include "hw/acpi/acpi-defs.h"
28 #include "hw/acpi/acpi.h"
29 #include "hw/acpi/aml-build.h"
30 #include "hw/acpi/utils.h"
31 #include "hw/nvram/fw_cfg_acpi.h"
32 #include "qapi/error.h"
33 #include "qemu/error-report.h"
34 #include "sysemu/reset.h"
35 #include "migration/vmstate.h"
36 #include "hw/riscv/virt.h"
37 #include "hw/riscv/numa.h"
38 #include "hw/intc/riscv_aclint.h"
39
40 #define ACPI_BUILD_TABLE_SIZE 0x20000
41 #define ACPI_BUILD_INTC_ID(socket, index) ((socket << 24) | (index))
42
43 typedef struct AcpiBuildState {
44 /* Copy of table in RAM (for patching) */
45 MemoryRegion *table_mr;
46 MemoryRegion *rsdp_mr;
47 MemoryRegion *linker_mr;
48 /* Is table patched? */
49 bool patched;
50 } AcpiBuildState;
51
52 static void acpi_align_size(GArray *blob, unsigned align)
53 {
54 /*
55 * Align size to multiple of given size. This reduces the chance
56 * we need to change size in the future (breaking cross version migration).
57 */
58 g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
59 }
60
61 static void riscv_acpi_madt_add_rintc(uint32_t uid,
62 const CPUArchIdList *arch_ids,
63 GArray *entry,
64 RISCVVirtState *s)
65 {
66 uint8_t guest_index_bits = imsic_num_bits(s->aia_guests + 1);
67 uint64_t hart_id = arch_ids->cpus[uid].arch_id;
68 uint32_t imsic_size, local_cpu_id, socket_id;
69 uint64_t imsic_socket_addr, imsic_addr;
70 MachineState *ms = MACHINE(s);
71
72 socket_id = arch_ids->cpus[uid].props.node_id;
73 local_cpu_id = (arch_ids->cpus[uid].arch_id -
74 riscv_socket_first_hartid(ms, socket_id)) %
75 riscv_socket_hart_count(ms, socket_id);
76 imsic_socket_addr = s->memmap[VIRT_IMSIC_S].base +
77 (socket_id * VIRT_IMSIC_GROUP_MAX_SIZE);
78 imsic_size = IMSIC_HART_SIZE(guest_index_bits);
79 imsic_addr = imsic_socket_addr + local_cpu_id * imsic_size;
80 build_append_int_noprefix(entry, 0x18, 1); /* Type */
81 build_append_int_noprefix(entry, 36, 1); /* Length */
82 build_append_int_noprefix(entry, 1, 1); /* Version */
83 build_append_int_noprefix(entry, 0, 1); /* Reserved */
84 build_append_int_noprefix(entry, 0x1, 4); /* Flags */
85 build_append_int_noprefix(entry, hart_id, 8); /* Hart ID */
86 build_append_int_noprefix(entry, uid, 4); /* ACPI Processor UID */
87 /* External Interrupt Controller ID */
88 if (s->aia_type == VIRT_AIA_TYPE_APLIC) {
89 build_append_int_noprefix(entry,
90 ACPI_BUILD_INTC_ID(
91 arch_ids->cpus[uid].props.node_id,
92 local_cpu_id),
93 4);
94 } else {
95 build_append_int_noprefix(entry, 0, 4);
96 }
97
98 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
99 /* IMSIC Base address */
100 build_append_int_noprefix(entry, imsic_addr, 8);
101 /* IMSIC Size */
102 build_append_int_noprefix(entry, imsic_size, 4);
103 } else {
104 build_append_int_noprefix(entry, 0, 8);
105 build_append_int_noprefix(entry, 0, 4);
106 }
107 }
108
109 static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s)
110 {
111 MachineClass *mc = MACHINE_GET_CLASS(s);
112 MachineState *ms = MACHINE(s);
113 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
114
115 for (int i = 0; i < arch_ids->len; i++) {
116 Aml *dev;
117 GArray *madt_buf = g_array_new(0, 1, 1);
118
119 dev = aml_device("C%.03X", i);
120 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
121 aml_append(dev, aml_name_decl("_UID",
122 aml_int(arch_ids->cpus[i].arch_id)));
123
124 /* build _MAT object */
125 riscv_acpi_madt_add_rintc(i, arch_ids, madt_buf, s);
126 aml_append(dev, aml_name_decl("_MAT",
127 aml_buffer(madt_buf->len,
128 (uint8_t *)madt_buf->data)));
129 g_array_free(madt_buf, true);
130
131 aml_append(scope, dev);
132 }
133 }
134
135 /* RHCT Node[N] starts at offset 56 */
136 #define RHCT_NODE_ARRAY_OFFSET 56
137
138 /*
139 * ACPI spec, Revision 6.5+
140 * 5.2.36 RISC-V Hart Capabilities Table (RHCT)
141 * REF: https://github.com/riscv-non-isa/riscv-acpi/issues/16
142 * https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
143 */
144 static void build_rhct(GArray *table_data,
145 BIOSLinker *linker,
146 RISCVVirtState *s)
147 {
148 MachineClass *mc = MACHINE_GET_CLASS(s);
149 MachineState *ms = MACHINE(s);
150 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
151 size_t len, aligned_len;
152 uint32_t isa_offset, num_rhct_nodes;
153 RISCVCPU *cpu;
154 char *isa;
155
156 AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
157 .oem_table_id = s->oem_table_id };
158
159 acpi_table_begin(&table, table_data);
160
161 build_append_int_noprefix(table_data, 0x0, 4); /* Reserved */
162
163 /* Time Base Frequency */
164 build_append_int_noprefix(table_data,
165 RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, 8);
166
167 /* ISA + N hart info */
168 num_rhct_nodes = 1 + ms->smp.cpus;
169
170 /* Number of RHCT nodes*/
171 build_append_int_noprefix(table_data, num_rhct_nodes, 4);
172
173 /* Offset to the RHCT node array */
174 build_append_int_noprefix(table_data, RHCT_NODE_ARRAY_OFFSET, 4);
175
176 /* ISA String Node */
177 isa_offset = table_data->len - table.table_offset;
178 build_append_int_noprefix(table_data, 0, 2); /* Type 0 */
179
180 cpu = &s->soc[0].harts[0];
181 isa = riscv_isa_string(cpu);
182 len = 8 + strlen(isa) + 1;
183 aligned_len = (len % 2) ? (len + 1) : len;
184
185 build_append_int_noprefix(table_data, aligned_len, 2); /* Length */
186 build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
187
188 /* ISA string length including NUL */
189 build_append_int_noprefix(table_data, strlen(isa) + 1, 2);
190 g_array_append_vals(table_data, isa, strlen(isa) + 1); /* ISA string */
191
192 if (aligned_len != len) {
193 build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding */
194 }
195
196 /* Hart Info Node */
197 for (int i = 0; i < arch_ids->len; i++) {
198 build_append_int_noprefix(table_data, 0xFFFF, 2); /* Type */
199 build_append_int_noprefix(table_data, 16, 2); /* Length */
200 build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
201 build_append_int_noprefix(table_data, 1, 2); /* Number of offsets */
202 build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */
203 build_append_int_noprefix(table_data, isa_offset, 4); /* Offsets[0] */
204 }
205
206 acpi_table_end(linker, &table);
207 }
208
209 /* FADT */
210 static void build_fadt_rev6(GArray *table_data,
211 BIOSLinker *linker,
212 RISCVVirtState *s,
213 unsigned dsdt_tbl_offset)
214 {
215 AcpiFadtData fadt = {
216 .rev = 6,
217 .minor_ver = 5,
218 .flags = 1 << ACPI_FADT_F_HW_REDUCED_ACPI,
219 .xdsdt_tbl_offset = &dsdt_tbl_offset,
220 };
221
222 build_fadt(table_data, linker, &fadt, s->oem_id, s->oem_table_id);
223 }
224
225 /* DSDT */
226 static void build_dsdt(GArray *table_data,
227 BIOSLinker *linker,
228 RISCVVirtState *s)
229 {
230 Aml *scope, *dsdt;
231 const MemMapEntry *memmap = s->memmap;
232 AcpiTable table = { .sig = "DSDT", .rev = 2, .oem_id = s->oem_id,
233 .oem_table_id = s->oem_table_id };
234
235
236 acpi_table_begin(&table, table_data);
237 dsdt = init_aml_allocator();
238
239 /*
240 * When booting the VM with UEFI, UEFI takes ownership of the RTC hardware.
241 * While UEFI can use libfdt to disable the RTC device node in the DTB that
242 * it passes to the OS, it cannot modify AML. Therefore, we won't generate
243 * the RTC ACPI device at all when using UEFI.
244 */
245 scope = aml_scope("\\_SB");
246 acpi_dsdt_add_cpus(scope, s);
247
248 fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]);
249
250 aml_append(dsdt, scope);
251
252 /* copy AML table into ACPI tables blob and patch header there */
253 g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
254
255 acpi_table_end(linker, &table);
256 free_aml_allocator();
257 }
258
259 /*
260 * ACPI spec, Revision 6.5+
261 * 5.2.12 Multiple APIC Description Table (MADT)
262 * REF: https://github.com/riscv-non-isa/riscv-acpi/issues/15
263 * https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
264 * https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view
265 */
266 static void build_madt(GArray *table_data,
267 BIOSLinker *linker,
268 RISCVVirtState *s)
269 {
270 MachineClass *mc = MACHINE_GET_CLASS(s);
271 MachineState *ms = MACHINE(s);
272 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
273 uint8_t group_index_bits = imsic_num_bits(riscv_socket_count(ms));
274 uint8_t guest_index_bits = imsic_num_bits(s->aia_guests + 1);
275 uint16_t imsic_max_hart_per_socket = 0;
276 uint8_t hart_index_bits;
277 uint8_t socket;
278
279 for (socket = 0; socket < riscv_socket_count(ms); socket++) {
280 if (imsic_max_hart_per_socket < s->soc[socket].num_harts) {
281 imsic_max_hart_per_socket = s->soc[socket].num_harts;
282 }
283 }
284
285 hart_index_bits = imsic_num_bits(imsic_max_hart_per_socket);
286
287 AcpiTable table = { .sig = "APIC", .rev = 6, .oem_id = s->oem_id,
288 .oem_table_id = s->oem_table_id };
289
290 acpi_table_begin(&table, table_data);
291 /* Local Interrupt Controller Address */
292 build_append_int_noprefix(table_data, 0, 4);
293 build_append_int_noprefix(table_data, 0, 4); /* MADT Flags */
294
295 /* RISC-V Local INTC structures per HART */
296 for (int i = 0; i < arch_ids->len; i++) {
297 riscv_acpi_madt_add_rintc(i, arch_ids, table_data, s);
298 }
299
300 /* IMSIC */
301 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
302 /* IMSIC */
303 build_append_int_noprefix(table_data, 0x19, 1); /* Type */
304 build_append_int_noprefix(table_data, 16, 1); /* Length */
305 build_append_int_noprefix(table_data, 1, 1); /* Version */
306 build_append_int_noprefix(table_data, 0, 1); /* Reserved */
307 build_append_int_noprefix(table_data, 0, 4); /* Flags */
308 /* Number of supervisor mode Interrupt Identities */
309 build_append_int_noprefix(table_data, VIRT_IRQCHIP_NUM_MSIS, 2);
310 /* Number of guest mode Interrupt Identities */
311 build_append_int_noprefix(table_data, VIRT_IRQCHIP_NUM_MSIS, 2);
312 /* Guest Index Bits */
313 build_append_int_noprefix(table_data, guest_index_bits, 1);
314 /* Hart Index Bits */
315 build_append_int_noprefix(table_data, hart_index_bits, 1);
316 /* Group Index Bits */
317 build_append_int_noprefix(table_data, group_index_bits, 1);
318 /* Group Index Shift */
319 build_append_int_noprefix(table_data, IMSIC_MMIO_GROUP_MIN_SHIFT, 1);
320 }
321
322 acpi_table_end(linker, &table);
323 }
324
325 static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables)
326 {
327 GArray *table_offsets;
328 unsigned dsdt, xsdt;
329 GArray *tables_blob = tables->table_data;
330
331 table_offsets = g_array_new(false, true,
332 sizeof(uint32_t));
333
334 bios_linker_loader_alloc(tables->linker,
335 ACPI_BUILD_TABLE_FILE, tables_blob,
336 64, false);
337
338 /* DSDT is pointed to by FADT */
339 dsdt = tables_blob->len;
340 build_dsdt(tables_blob, tables->linker, s);
341
342 /* FADT and others pointed to by XSDT */
343 acpi_add_table(table_offsets, tables_blob);
344 build_fadt_rev6(tables_blob, tables->linker, s, dsdt);
345
346 acpi_add_table(table_offsets, tables_blob);
347 build_madt(tables_blob, tables->linker, s);
348
349 acpi_add_table(table_offsets, tables_blob);
350 build_rhct(tables_blob, tables->linker, s);
351
352 /* XSDT is pointed to by RSDP */
353 xsdt = tables_blob->len;
354 build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id,
355 s->oem_table_id);
356
357 /* RSDP is in FSEG memory, so allocate it separately */
358 {
359 AcpiRsdpData rsdp_data = {
360 .revision = 2,
361 .oem_id = s->oem_id,
362 .xsdt_tbl_offset = &xsdt,
363 .rsdt_tbl_offset = NULL,
364 };
365 build_rsdp(tables->rsdp, tables->linker, &rsdp_data);
366 }
367
368 /*
369 * The align size is 128, warn if 64k is not enough therefore
370 * the align size could be resized.
371 */
372 if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) {
373 warn_report("ACPI table size %u exceeds %d bytes,"
374 " migration may not work",
375 tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2);
376 error_printf("Try removing some objects.");
377 }
378
379 acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE);
380
381 /* Clean up memory that's no longer used */
382 g_array_free(table_offsets, true);
383 }
384
385 static void acpi_ram_update(MemoryRegion *mr, GArray *data)
386 {
387 uint32_t size = acpi_data_len(data);
388
389 /*
390 * Make sure RAM size is correct - in case it got changed
391 * e.g. by migration
392 */
393 memory_region_ram_resize(mr, size, &error_abort);
394
395 memcpy(memory_region_get_ram_ptr(mr), data->data, size);
396 memory_region_set_dirty(mr, 0, size);
397 }
398
399 static void virt_acpi_build_update(void *build_opaque)
400 {
401 AcpiBuildState *build_state = build_opaque;
402 AcpiBuildTables tables;
403
404 /* No state to update or already patched? Nothing to do. */
405 if (!build_state || build_state->patched) {
406 return;
407 }
408
409 build_state->patched = true;
410
411 acpi_build_tables_init(&tables);
412
413 virt_acpi_build(RISCV_VIRT_MACHINE(qdev_get_machine()), &tables);
414
415 acpi_ram_update(build_state->table_mr, tables.table_data);
416 acpi_ram_update(build_state->rsdp_mr, tables.rsdp);
417 acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob);
418
419 acpi_build_tables_cleanup(&tables, true);
420 }
421
422 static void virt_acpi_build_reset(void *build_opaque)
423 {
424 AcpiBuildState *build_state = build_opaque;
425 build_state->patched = false;
426 }
427
428 static const VMStateDescription vmstate_virt_acpi_build = {
429 .name = "virt_acpi_build",
430 .version_id = 1,
431 .minimum_version_id = 1,
432 .fields = (const VMStateField[]) {
433 VMSTATE_BOOL(patched, AcpiBuildState),
434 VMSTATE_END_OF_LIST()
435 },
436 };
437
438 void virt_acpi_setup(RISCVVirtState *s)
439 {
440 AcpiBuildTables tables;
441 AcpiBuildState *build_state;
442
443 build_state = g_malloc0(sizeof *build_state);
444
445 acpi_build_tables_init(&tables);
446 virt_acpi_build(s, &tables);
447
448 /* Now expose it all to Guest */
449 build_state->table_mr = acpi_add_rom_blob(virt_acpi_build_update,
450 build_state, tables.table_data,
451 ACPI_BUILD_TABLE_FILE);
452 assert(build_state->table_mr != NULL);
453
454 build_state->linker_mr = acpi_add_rom_blob(virt_acpi_build_update,
455 build_state,
456 tables.linker->cmd_blob,
457 ACPI_BUILD_LOADER_FILE);
458
459 build_state->rsdp_mr = acpi_add_rom_blob(virt_acpi_build_update,
460 build_state, tables.rsdp,
461 ACPI_BUILD_RSDP_FILE);
462
463 qemu_register_reset(virt_acpi_build_reset, build_state);
464 virt_acpi_build_reset(build_state);
465 vmstate_register(NULL, 0, &vmstate_virt_acpi_build, build_state);
466
467 /*
468 * Clean up tables but don't free the memory: we track it
469 * in build_state.
470 */
471 acpi_build_tables_cleanup(&tables, false);
472 }