hw/s390x/s390-pci-bus.c

   1 /*
   2  * s390 PCI BUS
   3  *
   4  * Copyright 2014 IBM Corp.
   5  * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
   6  *            Hong Bo Li <lihbbj@cn.ibm.com>
   7  *            Yi Min Zhao <zyimin@cn.ibm.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or (at
  10  * your option) any later version. See the COPYING file in the top-level
  11  * directory.
  12  */
  13
  14 #include "qemu/osdep.h"
  15 #include "qapi/error.h"
  16 #include "qapi/visitor.h"
  17 #include "cpu.h"
  18 #include "s390-pci-bus.h"
  19 #include "s390-pci-inst.h"
  20 #include "hw/pci/pci_bus.h"
  21 #include "hw/qdev-properties.h"
  22 #include "hw/pci/pci_bridge.h"
  23 #include "hw/pci/msi.h"
  24 #include "qemu/error-report.h"
  25 #include "qemu/module.h"
  26
  27 #ifndef DEBUG_S390PCI_BUS
  28 #define DEBUG_S390PCI_BUS  0
  29 #endif
  30
  31 #define DPRINTF(fmt, ...)                                         \
  32     do {                                                          \
  33         if (DEBUG_S390PCI_BUS) {                                  \
  34             fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \
  35         }                                                         \
  36     } while (0)
  37
  38 S390pciState *s390_get_phb(void)
  39 {
  40     static S390pciState *phb;
  41
  42     if (!phb) {
  43         phb = S390_PCI_HOST_BRIDGE(
  44             object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
  45         assert(phb != NULL);
  46     }
  47
  48     return phb;
  49 }
  50
  51 int pci_chsc_sei_nt2_get_event(void *res)
  52 {
  53     ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
  54     PciCcdfAvail *accdf;
  55     PciCcdfErr *eccdf;
  56     int rc = 1;
  57     SeiContainer *sei_cont;
  58     S390pciState *s = s390_get_phb();
  59
  60     sei_cont = QTAILQ_FIRST(&s->pending_sei);
  61     if (sei_cont) {
  62         QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
  63         nt2_res->nt = 2;
  64         nt2_res->cc = sei_cont->cc;
  65         nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
  66         switch (sei_cont->cc) {
  67         case 1: /* error event */
  68             eccdf = (PciCcdfErr *)nt2_res->ccdf;
  69             eccdf->fid = cpu_to_be32(sei_cont->fid);
  70             eccdf->fh = cpu_to_be32(sei_cont->fh);
  71             eccdf->e = cpu_to_be32(sei_cont->e);
  72             eccdf->faddr = cpu_to_be64(sei_cont->faddr);
  73             eccdf->pec = cpu_to_be16(sei_cont->pec);
  74             break;
  75         case 2: /* availability event */
  76             accdf = (PciCcdfAvail *)nt2_res->ccdf;
  77             accdf->fid = cpu_to_be32(sei_cont->fid);
  78             accdf->fh = cpu_to_be32(sei_cont->fh);
  79             accdf->pec = cpu_to_be16(sei_cont->pec);
  80             break;
  81         default:
  82             abort();
  83         }
  84         g_free(sei_cont);
  85         rc = 0;
  86     }
  87
  88     return rc;
  89 }
  90
  91 int pci_chsc_sei_nt2_have_event(void)
  92 {
  93     S390pciState *s = s390_get_phb();
  94
  95     return !QTAILQ_EMPTY(&s->pending_sei);
  96 }
  97
  98 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s,
  99                                                S390PCIBusDevice *pbdev)
 100 {
 101     S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) :
 102         QTAILQ_FIRST(&s->zpci_devs);
 103
 104     while (ret && ret->state == ZPCI_FS_RESERVED) {
 105         ret = QTAILQ_NEXT(ret, link);
 106     }
 107
 108     return ret;
 109 }
 110
 111 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid)
 112 {
 113     S390PCIBusDevice *pbdev;
 114
 115     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 116         if (pbdev->fid == fid) {
 117             return pbdev;
 118         }
 119     }
 120
 121     return NULL;
 122 }
 123
 124 void s390_pci_sclp_configure(SCCB *sccb)
 125 {
 126     IoaCfgSccb *psccb = (IoaCfgSccb *)sccb;
 127     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
 128                                                        be32_to_cpu(psccb->aid));
 129     uint16_t rc;
 130
 131     if (!pbdev) {
 132         DPRINTF("sclp config no dev found\n");
 133         rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
 134         goto out;
 135     }
 136
 137     switch (pbdev->state) {
 138     case ZPCI_FS_RESERVED:
 139         rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
 140         break;
 141     case ZPCI_FS_STANDBY:
 142         pbdev->state = ZPCI_FS_DISABLED;
 143         rc = SCLP_RC_NORMAL_COMPLETION;
 144         break;
 145     default:
 146         rc = SCLP_RC_NO_ACTION_REQUIRED;
 147     }
 148 out:
 149     psccb->header.response_code = cpu_to_be16(rc);
 150 }
 151
 152 static void s390_pci_perform_unplug(S390PCIBusDevice *pbdev)
 153 {
 154     HotplugHandler *hotplug_ctrl;
 155
 156     /* Unplug the PCI device */
 157     if (pbdev->pdev) {
 158         DeviceState *pdev = DEVICE(pbdev->pdev);
 159
 160         hotplug_ctrl = qdev_get_hotplug_handler(pdev);
 161         hotplug_handler_unplug(hotplug_ctrl, pdev, &error_abort);
 162         object_unparent(OBJECT(pdev));
 163     }
 164
 165     /* Unplug the zPCI device */
 166     hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev));
 167     hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev), &error_abort);
 168     object_unparent(OBJECT(pbdev));
 169 }
 170
 171 void s390_pci_sclp_deconfigure(SCCB *sccb)
 172 {
 173     IoaCfgSccb *psccb = (IoaCfgSccb *)sccb;
 174     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
 175                                                        be32_to_cpu(psccb->aid));
 176     uint16_t rc;
 177
 178     if (!pbdev) {
 179         DPRINTF("sclp deconfig no dev found\n");
 180         rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
 181         goto out;
 182     }
 183
 184     switch (pbdev->state) {
 185     case ZPCI_FS_RESERVED:
 186         rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
 187         break;
 188     case ZPCI_FS_STANDBY:
 189         rc = SCLP_RC_NO_ACTION_REQUIRED;
 190         break;
 191     default:
 192         if (pbdev->summary_ind) {
 193             pci_dereg_irqs(pbdev);
 194         }
 195         if (pbdev->iommu->enabled) {
 196             pci_dereg_ioat(pbdev->iommu);
 197         }
 198         pbdev->state = ZPCI_FS_STANDBY;
 199         rc = SCLP_RC_NORMAL_COMPLETION;
 200
 201         if (pbdev->unplug_requested) {
 202             s390_pci_perform_unplug(pbdev);
 203         }
 204     }
 205 out:
 206     psccb->header.response_code = cpu_to_be16(rc);
 207 }
 208
 209 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid)
 210 {
 211     S390PCIBusDevice *pbdev;
 212
 213     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 214         if (pbdev->uid == uid) {
 215             return pbdev;
 216         }
 217     }
 218
 219     return NULL;
 220 }
 221
 222 S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s,
 223                                               const char *target)
 224 {
 225     S390PCIBusDevice *pbdev;
 226
 227     if (!target) {
 228         return NULL;
 229     }
 230
 231     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 232         if (!strcmp(pbdev->target, target)) {
 233             return pbdev;
 234         }
 235     }
 236
 237     return NULL;
 238 }
 239
 240 static S390PCIBusDevice *s390_pci_find_dev_by_pci(S390pciState *s,
 241                                                   PCIDevice *pci_dev)
 242 {
 243     S390PCIBusDevice *pbdev;
 244
 245     if (!pci_dev) {
 246         return NULL;
 247     }
 248
 249     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 250         if (pbdev->pdev == pci_dev) {
 251             return pbdev;
 252         }
 253     }
 254
 255     return NULL;
 256 }
 257
 258 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx)
 259 {
 260     return g_hash_table_lookup(s->zpci_table, &idx);
 261 }
 262
 263 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh)
 264 {
 265     uint32_t idx = FH_MASK_INDEX & fh;
 266     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx);
 267
 268     if (pbdev && pbdev->fh == fh) {
 269         return pbdev;
 270     }
 271
 272     return NULL;
 273 }
 274
 275 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
 276                                     uint32_t fid, uint64_t faddr, uint32_t e)
 277 {
 278     SeiContainer *sei_cont;
 279     S390pciState *s = s390_get_phb();
 280
 281     sei_cont = g_new0(SeiContainer, 1);
 282     sei_cont->fh = fh;
 283     sei_cont->fid = fid;
 284     sei_cont->cc = cc;
 285     sei_cont->pec = pec;
 286     sei_cont->faddr = faddr;
 287     sei_cont->e = e;
 288
 289     QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
 290     css_generate_css_crws(0);
 291 }
 292
 293 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
 294                                          uint32_t fid)
 295 {
 296     s390_pci_generate_event(2, pec, fh, fid, 0, 0);
 297 }
 298
 299 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
 300                                    uint64_t faddr, uint32_t e)
 301 {
 302     s390_pci_generate_event(1, pec, fh, fid, faddr, e);
 303 }
 304
 305 static void s390_pci_set_irq(void *opaque, int irq, int level)
 306 {
 307     /* nothing to do */
 308 }
 309
 310 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
 311 {
 312     /* nothing to do */
 313     return 0;
 314 }
 315
 316 static uint64_t s390_pci_get_table_origin(uint64_t iota)
 317 {
 318     return iota & ~ZPCI_IOTA_RTTO_FLAG;
 319 }
 320
 321 static unsigned int calc_rtx(dma_addr_t ptr)
 322 {
 323     return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
 324 }
 325
 326 static unsigned int calc_sx(dma_addr_t ptr)
 327 {
 328     return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
 329 }
 330
 331 static unsigned int calc_px(dma_addr_t ptr)
 332 {
 333     return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
 334 }
 335
 336 static uint64_t get_rt_sto(uint64_t entry)
 337 {
 338     return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
 339                 ? (entry & ZPCI_RTE_ADDR_MASK)
 340                 : 0;
 341 }
 342
 343 static uint64_t get_st_pto(uint64_t entry)
 344 {
 345     return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
 346             ? (entry & ZPCI_STE_ADDR_MASK)
 347             : 0;
 348 }
 349
 350 static bool rt_entry_isvalid(uint64_t entry)
 351 {
 352     return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
 353 }
 354
 355 static bool pt_entry_isvalid(uint64_t entry)
 356 {
 357     return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
 358 }
 359
 360 static bool entry_isprotected(uint64_t entry)
 361 {
 362     return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
 363 }
 364
 365 /* ett is expected table type, -1 page table, 0 segment table, 1 region table */
 366 static uint64_t get_table_index(uint64_t iova, int8_t ett)
 367 {
 368     switch (ett) {
 369     case ZPCI_ETT_PT:
 370         return calc_px(iova);
 371     case ZPCI_ETT_ST:
 372         return calc_sx(iova);
 373     case ZPCI_ETT_RT:
 374         return calc_rtx(iova);
 375     }
 376
 377     return -1;
 378 }
 379
 380 static bool entry_isvalid(uint64_t entry, int8_t ett)
 381 {
 382     switch (ett) {
 383     case ZPCI_ETT_PT:
 384         return pt_entry_isvalid(entry);
 385     case ZPCI_ETT_ST:
 386     case ZPCI_ETT_RT:
 387         return rt_entry_isvalid(entry);
 388     }
 389
 390     return false;
 391 }
 392
 393 /* Return true if address translation is done */
 394 static bool translate_iscomplete(uint64_t entry, int8_t ett)
 395 {
 396     switch (ett) {
 397     case 0:
 398         return (entry & ZPCI_TABLE_FC) ? true : false;
 399     case 1:
 400         return false;
 401     }
 402
 403     return true;
 404 }
 405
 406 static uint64_t get_frame_size(int8_t ett)
 407 {
 408     switch (ett) {
 409     case ZPCI_ETT_PT:
 410         return 1ULL << 12;
 411     case ZPCI_ETT_ST:
 412         return 1ULL << 20;
 413     case ZPCI_ETT_RT:
 414         return 1ULL << 31;
 415     }
 416
 417     return 0;
 418 }
 419
 420 static uint64_t get_next_table_origin(uint64_t entry, int8_t ett)
 421 {
 422     switch (ett) {
 423     case ZPCI_ETT_PT:
 424         return entry & ZPCI_PTE_ADDR_MASK;
 425     case ZPCI_ETT_ST:
 426         return get_st_pto(entry);
 427     case ZPCI_ETT_RT:
 428         return get_rt_sto(entry);
 429     }
 430
 431     return 0;
 432 }
 433
 434 /**
 435  * table_translate: do translation within one table and return the following
 436  *                  table origin
 437  *
 438  * @entry: the entry being translated, the result is stored in this.
 439  * @to: the address of table origin.
 440  * @ett: expected table type, 1 region table, 0 segment table and -1 page table.
 441  * @error: error code
 442  */
 443 static uint64_t table_translate(S390IOTLBEntry *entry, uint64_t to, int8_t ett,
 444                                 uint16_t *error)
 445 {
 446     uint64_t tx, te, nto = 0;
 447     uint16_t err = 0;
 448
 449     tx = get_table_index(entry->iova, ett);
 450     te = address_space_ldq(&address_space_memory, to + tx * sizeof(uint64_t),
 451                            MEMTXATTRS_UNSPECIFIED, NULL);
 452
 453     if (!te) {
 454         err = ERR_EVENT_INVALTE;
 455         goto out;
 456     }
 457
 458     if (!entry_isvalid(te, ett)) {
 459         entry->perm &= IOMMU_NONE;
 460         goto out;
 461     }
 462
 463     if (ett == ZPCI_ETT_RT && ((te & ZPCI_TABLE_LEN_RTX) != ZPCI_TABLE_LEN_RTX
 464                                || te & ZPCI_TABLE_OFFSET_MASK)) {
 465         err = ERR_EVENT_INVALTL;
 466         goto out;
 467     }
 468
 469     nto = get_next_table_origin(te, ett);
 470     if (!nto) {
 471         err = ERR_EVENT_TT;
 472         goto out;
 473     }
 474
 475     if (entry_isprotected(te)) {
 476         entry->perm &= IOMMU_RO;
 477     } else {
 478         entry->perm &= IOMMU_RW;
 479     }
 480
 481     if (translate_iscomplete(te, ett)) {
 482         switch (ett) {
 483         case ZPCI_ETT_PT:
 484             entry->translated_addr = te & ZPCI_PTE_ADDR_MASK;
 485             break;
 486         case ZPCI_ETT_ST:
 487             entry->translated_addr = (te & ZPCI_SFAA_MASK) |
 488                 (entry->iova & ~ZPCI_SFAA_MASK);
 489             break;
 490         }
 491         nto = 0;
 492     }
 493 out:
 494     if (err) {
 495         entry->perm = IOMMU_NONE;
 496         *error = err;
 497     }
 498     entry->len = get_frame_size(ett);
 499     return nto;
 500 }
 501
 502 uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr,
 503                                   S390IOTLBEntry *entry)
 504 {
 505     uint64_t to = s390_pci_get_table_origin(g_iota);
 506     int8_t ett = 1;
 507     uint16_t error = 0;
 508
 509     entry->iova = addr & PAGE_MASK;
 510     entry->translated_addr = 0;
 511     entry->perm = IOMMU_RW;
 512
 513     if (entry_isprotected(g_iota)) {
 514         entry->perm &= IOMMU_RO;
 515     }
 516
 517     while (to) {
 518         to = table_translate(entry, to, ett--, &error);
 519     }
 520
 521     return error;
 522 }
 523
 524 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
 525                                           IOMMUAccessFlags flag, int iommu_idx)
 526 {
 527     S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
 528     S390IOTLBEntry *entry;
 529     uint64_t iova = addr & PAGE_MASK;
 530     uint16_t error = 0;
 531     IOMMUTLBEntry ret = {
 532         .target_as = &address_space_memory,
 533         .iova = 0,
 534         .translated_addr = 0,
 535         .addr_mask = ~(hwaddr)0,
 536         .perm = IOMMU_NONE,
 537     };
 538
 539     switch (iommu->pbdev->state) {
 540     case ZPCI_FS_ENABLED:
 541     case ZPCI_FS_BLOCKED:
 542         if (!iommu->enabled) {
 543             return ret;
 544         }
 545         break;
 546     default:
 547         return ret;
 548     }
 549
 550     DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
 551
 552     if (addr < iommu->pba || addr > iommu->pal) {
 553         error = ERR_EVENT_OORANGE;
 554         goto err;
 555     }
 556
 557     entry = g_hash_table_lookup(iommu->iotlb, &iova);
 558     if (entry) {
 559         ret.iova = entry->iova;
 560         ret.translated_addr = entry->translated_addr;
 561         ret.addr_mask = entry->len - 1;
 562         ret.perm = entry->perm;
 563     } else {
 564         ret.iova = iova;
 565         ret.addr_mask = ~PAGE_MASK;
 566         ret.perm = IOMMU_NONE;
 567     }
 568
 569     if (flag != IOMMU_NONE && !(flag & ret.perm)) {
 570         error = ERR_EVENT_TPROTE;
 571     }
 572 err:
 573     if (error) {
 574         iommu->pbdev->state = ZPCI_FS_ERROR;
 575         s390_pci_generate_error_event(error, iommu->pbdev->fh,
 576                                       iommu->pbdev->fid, addr, 0);
 577     }
 578     return ret;
 579 }
 580
 581 static void s390_pci_iommu_replay(IOMMUMemoryRegion *iommu,
 582                                   IOMMUNotifier *notifier)
 583 {
 584     /* It's impossible to plug a pci device on s390x that already has iommu
 585      * mappings which need to be replayed, that is due to the "one iommu per
 586      * zpci device" construct. But when we support migration of vfio-pci
 587      * devices in future, we need to revisit this.
 588      */
 589     return;
 590 }
 591
 592 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus,
 593                                         int devfn)
 594 {
 595     uint64_t key = (uintptr_t)bus;
 596     S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
 597     S390PCIIOMMU *iommu;
 598
 599     if (!table) {
 600         table = g_new0(S390PCIIOMMUTable, 1);
 601         table->key = key;
 602         g_hash_table_insert(s->iommu_table, &table->key, table);
 603     }
 604
 605     iommu = table->iommu[PCI_SLOT(devfn)];
 606     if (!iommu) {
 607         iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU));
 608
 609         char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x",
 610                                         pci_bus_num(bus),
 611                                         PCI_SLOT(devfn),
 612                                         PCI_FUNC(devfn));
 613         char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x",
 614                                         pci_bus_num(bus),
 615                                         PCI_SLOT(devfn),
 616                                         PCI_FUNC(devfn));
 617         memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX);
 618         address_space_init(&iommu->as, &iommu->mr, as_name);
 619         iommu->iotlb = g_hash_table_new_full(g_int64_hash, g_int64_equal,
 620                                              NULL, g_free);
 621         table->iommu[PCI_SLOT(devfn)] = iommu;
 622
 623         g_free(mr_name);
 624         g_free(as_name);
 625     }
 626
 627     return iommu;
 628 }
 629
 630 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
 631 {
 632     S390pciState *s = opaque;
 633     S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn);
 634
 635     return &iommu->as;
 636 }
 637
 638 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
 639 {
 640     uint8_t expected, actual;
 641     hwaddr len = 1;
 642     /* avoid  multiple fetches */
 643     uint8_t volatile *ind_addr;
 644
 645     ind_addr = cpu_physical_memory_map(ind_loc, &len, true);
 646     if (!ind_addr) {
 647         s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
 648         return -1;
 649     }
 650     actual = *ind_addr;
 651     do {
 652         expected = actual;
 653         actual = atomic_cmpxchg(ind_addr, expected, expected | to_be_set);
 654     } while (actual != expected);
 655     cpu_physical_memory_unmap((void *)ind_addr, len, 1, len);
 656
 657     return actual;
 658 }
 659
 660 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
 661                                 unsigned int size)
 662 {
 663     S390PCIBusDevice *pbdev = opaque;
 664     uint32_t vec = data & ZPCI_MSI_VEC_MASK;
 665     uint64_t ind_bit;
 666     uint32_t sum_bit;
 667
 668     assert(pbdev);
 669     DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data,
 670             pbdev->idx, vec);
 671
 672     if (pbdev->state != ZPCI_FS_ENABLED) {
 673         return;
 674     }
 675
 676     ind_bit = pbdev->routes.adapter.ind_offset;
 677     sum_bit = pbdev->routes.adapter.summary_offset;
 678
 679     set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
 680                    0x80 >> ((ind_bit + vec) % 8));
 681     if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
 682                                        0x80 >> (sum_bit % 8))) {
 683         css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc);
 684     }
 685 }
 686
 687 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
 688 {
 689     return 0xffffffff;
 690 }
 691
 692 static const MemoryRegionOps s390_msi_ctrl_ops = {
 693     .write = s390_msi_ctrl_write,
 694     .read = s390_msi_ctrl_read,
 695     .endianness = DEVICE_LITTLE_ENDIAN,
 696 };
 697
 698 void s390_pci_iommu_enable(S390PCIIOMMU *iommu)
 699 {
 700     /*
 701      * The iommu region is initialized against a 0-mapped address space,
 702      * so the smallest IOMMU region we can define runs from 0 to the end
 703      * of the PCI address space.
 704      */
 705     char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid);
 706     memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr),
 707                              TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr),
 708                              name, iommu->pal + 1);
 709     iommu->enabled = true;
 710     memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr));
 711     g_free(name);
 712 }
 713
 714 void s390_pci_iommu_disable(S390PCIIOMMU *iommu)
 715 {
 716     iommu->enabled = false;
 717     g_hash_table_remove_all(iommu->iotlb);
 718     memory_region_del_subregion(&iommu->mr, MEMORY_REGION(&iommu->iommu_mr));
 719     object_unparent(OBJECT(&iommu->iommu_mr));
 720 }
 721
 722 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn)
 723 {
 724     uint64_t key = (uintptr_t)bus;
 725     S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
 726     S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL;
 727
 728     if (!table || !iommu) {
 729         return;
 730     }
 731
 732     table->iommu[PCI_SLOT(devfn)] = NULL;
 733     g_hash_table_destroy(iommu->iotlb);
 734     address_space_destroy(&iommu->as);
 735     object_unparent(OBJECT(&iommu->mr));
 736     object_unparent(OBJECT(iommu));
 737     object_unref(OBJECT(iommu));
 738 }
 739
 740 static void s390_pcihost_realize(DeviceState *dev, Error **errp)
 741 {
 742     PCIBus *b;
 743     BusState *bus;
 744     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
 745     S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
 746     Error *local_err = NULL;
 747
 748     DPRINTF("host_init\n");
 749
 750     b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq,
 751                               NULL, get_system_memory(), get_system_io(), 0,
 752                               64, TYPE_PCI_BUS);
 753     pci_setup_iommu(b, s390_pci_dma_iommu, s);
 754
 755     bus = BUS(b);
 756     qbus_set_hotplug_handler(bus, OBJECT(dev));
 757     phb->bus = b;
 758
 759     s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, dev, NULL));
 760     qbus_set_hotplug_handler(BUS(s->bus), OBJECT(dev));
 761
 762     s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal,
 763                                            NULL, g_free);
 764     s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL);
 765     s->bus_no = 0;
 766     QTAILQ_INIT(&s->pending_sei);
 767     QTAILQ_INIT(&s->zpci_devs);
 768
 769     css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false,
 770                              S390_ADAPTER_SUPPRESSIBLE, &local_err);
 771     error_propagate(errp, local_err);
 772 }
 773
 774 static int s390_pci_msix_init(S390PCIBusDevice *pbdev)
 775 {
 776     char *name;
 777     uint8_t pos;
 778     uint16_t ctrl;
 779     uint32_t table, pba;
 780
 781     pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
 782     if (!pos) {
 783         return -1;
 784     }
 785
 786     ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
 787              pci_config_size(pbdev->pdev), sizeof(ctrl));
 788     table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
 789              pci_config_size(pbdev->pdev), sizeof(table));
 790     pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
 791              pci_config_size(pbdev->pdev), sizeof(pba));
 792
 793     pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
 794     pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
 795     pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
 796     pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
 797     pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
 798
 799     name = g_strdup_printf("msix-s390-%04x", pbdev->uid);
 800     memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev),
 801                           &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE);
 802     memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR,
 803                                 &pbdev->msix_notify_mr);
 804     g_free(name);
 805
 806     return 0;
 807 }
 808
 809 static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
 810 {
 811     memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
 812     object_unparent(OBJECT(&pbdev->msix_notify_mr));
 813 }
 814
 815 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s,
 816                                              const char *target, Error **errp)
 817 {
 818     Error *local_err = NULL;
 819     DeviceState *dev;
 820
 821     dev = qdev_try_new(TYPE_S390_PCI_DEVICE);
 822     if (!dev) {
 823         error_setg(errp, "zPCI device could not be created");
 824         return NULL;
 825     }
 826
 827     object_property_set_str(OBJECT(dev), target, "target", &local_err);
 828     if (local_err) {
 829         object_unparent(OBJECT(dev));
 830         error_propagate_prepend(errp, local_err,
 831                                 "zPCI device could not be created: ");
 832         return NULL;
 833     }
 834     qdev_realize_and_unref(dev, BUS(s->bus), &local_err);
 835     if (local_err) {
 836         object_unparent(OBJECT(dev));
 837         error_propagate_prepend(errp, local_err,
 838                                 "zPCI device could not be created: ");
 839         return NULL;
 840     }
 841
 842     return S390_PCI_DEVICE(dev);
 843 }
 844
 845 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev)
 846 {
 847     uint32_t idx;
 848
 849     idx = s->next_idx;
 850     while (s390_pci_find_dev_by_idx(s, idx)) {
 851         idx = (idx + 1) & FH_MASK_INDEX;
 852         if (idx == s->next_idx) {
 853             return false;
 854         }
 855     }
 856
 857     pbdev->idx = idx;
 858     return true;
 859 }
 860
 861 static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 862                                    Error **errp)
 863 {
 864     S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
 865
 866     if (!s390_has_feat(S390_FEAT_ZPCI)) {
 867         warn_report("Plugging a PCI/zPCI device without the 'zpci' CPU "
 868                     "feature enabled; the guest will not be able to see/use "
 869                     "this device");
 870     }
 871
 872     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 873         PCIDevice *pdev = PCI_DEVICE(dev);
 874
 875         if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
 876             error_setg(errp, "multifunction not supported in s390");
 877             return;
 878         }
 879     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
 880         S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
 881
 882         if (!s390_pci_alloc_idx(s, pbdev)) {
 883             error_setg(errp, "no slot for plugging zpci device");
 884             return;
 885         }
 886     }
 887 }
 888
 889 static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr)
 890 {
 891     uint32_t old_nr;
 892
 893     pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1);
 894     while (!pci_bus_is_root(pci_get_bus(dev))) {
 895         dev = pci_get_bus(dev)->parent_dev;
 896
 897         old_nr = pci_default_read_config(dev, PCI_SUBORDINATE_BUS, 1);
 898         if (old_nr < nr) {
 899             pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1);
 900         }
 901     }
 902 }
 903
 904 static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 905                               Error **errp)
 906 {
 907     S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
 908     PCIDevice *pdev = NULL;
 909     S390PCIBusDevice *pbdev = NULL;
 910
 911     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 912         PCIBridge *pb = PCI_BRIDGE(dev);
 913
 914         pdev = PCI_DEVICE(dev);
 915         pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq);
 916         pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s);
 917
 918         qbus_set_hotplug_handler(BUS(&pb->sec_bus), OBJECT(s));
 919
 920         if (dev->hotplugged) {
 921             pci_default_write_config(pdev, PCI_PRIMARY_BUS,
 922                                      pci_dev_bus_num(pdev), 1);
 923             s->bus_no += 1;
 924             pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
 925
 926             s390_pci_update_subordinate(pdev, s->bus_no);
 927         }
 928     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 929         pdev = PCI_DEVICE(dev);
 930
 931         if (!dev->id) {
 932             /* In the case the PCI device does not define an id */
 933             /* we generate one based on the PCI address         */
 934             dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
 935                                       pci_dev_bus_num(pdev),
 936                                       PCI_SLOT(pdev->devfn),
 937                                       PCI_FUNC(pdev->devfn));
 938         }
 939
 940         pbdev = s390_pci_find_dev_by_target(s, dev->id);
 941         if (!pbdev) {
 942             pbdev = s390_pci_device_new(s, dev->id, errp);
 943             if (!pbdev) {
 944                 return;
 945             }
 946         }
 947
 948         if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
 949             pbdev->fh |= FH_SHM_VFIO;
 950         } else {
 951             pbdev->fh |= FH_SHM_EMUL;
 952         }
 953
 954         pbdev->pdev = pdev;
 955         pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn);
 956         pbdev->iommu->pbdev = pbdev;
 957         pbdev->state = ZPCI_FS_DISABLED;
 958
 959         if (s390_pci_msix_init(pbdev)) {
 960             error_setg(errp, "MSI-X support is mandatory "
 961                        "in the S390 architecture");
 962             return;
 963         }
 964
 965         if (dev->hotplugged) {
 966             s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED ,
 967                                          pbdev->fh, pbdev->fid);
 968         }
 969     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
 970         pbdev = S390_PCI_DEVICE(dev);
 971
 972         /* the allocated idx is actually getting used */
 973         s->next_idx = (pbdev->idx + 1) & FH_MASK_INDEX;
 974         pbdev->fh = pbdev->idx;
 975         QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link);
 976         g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
 977     } else {
 978         g_assert_not_reached();
 979     }
 980 }
 981
 982 static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
 983                                 Error **errp)
 984 {
 985     S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
 986     S390PCIBusDevice *pbdev = NULL;
 987
 988     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 989         PCIDevice *pci_dev = PCI_DEVICE(dev);
 990         PCIBus *bus;
 991         int32_t devfn;
 992
 993         pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev));
 994         g_assert(pbdev);
 995
 996         s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
 997                                      pbdev->fh, pbdev->fid);
 998         bus = pci_get_bus(pci_dev);
 999         devfn = pci_dev->devfn;
1000         qdev_unrealize(dev);
1001
1002         s390_pci_msix_free(pbdev);
1003         s390_pci_iommu_free(s, bus, devfn);
1004         pbdev->pdev = NULL;
1005         pbdev->state = ZPCI_FS_RESERVED;
1006     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1007         pbdev = S390_PCI_DEVICE(dev);
1008         pbdev->fid = 0;
1009         QTAILQ_REMOVE(&s->zpci_devs, pbdev, link);
1010         g_hash_table_remove(s->zpci_table, &pbdev->idx);
1011         qdev_unrealize(dev);
1012     }
1013 }
1014
1015 static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev,
1016                                         DeviceState *dev,
1017                                         Error **errp)
1018 {
1019     S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
1020     S390PCIBusDevice *pbdev;
1021
1022     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
1023         error_setg(errp, "PCI bridge hot unplug currently not supported");
1024     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
1025         /*
1026          * Redirect the unplug request to the zPCI device and remember that
1027          * we've checked the PCI device already (to prevent endless recursion).
1028          */
1029         pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev));
1030         g_assert(pbdev);
1031         pbdev->pci_unplug_request_processed = true;
1032         qdev_unplug(DEVICE(pbdev), errp);
1033     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1034         pbdev = S390_PCI_DEVICE(dev);
1035
1036         /*
1037          * If unplug was initially requested for the zPCI device, we
1038          * first have to redirect to the PCI device, which will in return
1039          * redirect back to us after performing its checks (if the request
1040          * is not blocked, e.g. because it's a PCI bridge).
1041          */
1042         if (pbdev->pdev && !pbdev->pci_unplug_request_processed) {
1043             qdev_unplug(DEVICE(pbdev->pdev), errp);
1044             return;
1045         }
1046         pbdev->pci_unplug_request_processed = false;
1047
1048         switch (pbdev->state) {
1049         case ZPCI_FS_STANDBY:
1050         case ZPCI_FS_RESERVED:
1051             s390_pci_perform_unplug(pbdev);
1052             break;
1053         default:
1054             /*
1055              * Allow to send multiple requests, e.g. if the guest crashed
1056              * before releasing the device, we would not be able to send
1057              * another request to the same VM (e.g. fresh OS).
1058              */
1059             pbdev->unplug_requested = true;
1060             s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST,
1061                                          pbdev->fh, pbdev->fid);
1062         }
1063     } else {
1064         g_assert_not_reached();
1065     }
1066 }
1067
1068 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev,
1069                                       void *opaque)
1070 {
1071     S390pciState *s = opaque;
1072     PCIBus *sec_bus = NULL;
1073
1074     if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) !=
1075          PCI_HEADER_TYPE_BRIDGE)) {
1076         return;
1077     }
1078
1079     (s->bus_no)++;
1080     pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1);
1081     pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
1082     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
1083
1084     sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
1085     if (!sec_bus) {
1086         return;
1087     }
1088
1089     /* Assign numbers to all child bridges. The last is the highest number. */
1090     pci_for_each_device(sec_bus, pci_bus_num(sec_bus),
1091                         s390_pci_enumerate_bridge, s);
1092     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
1093 }
1094
1095 static void s390_pcihost_reset(DeviceState *dev)
1096 {
1097     S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
1098     PCIBus *bus = s->parent_obj.bus;
1099     S390PCIBusDevice *pbdev, *next;
1100
1101     /* Process all pending unplug requests */
1102     QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) {
1103         if (pbdev->unplug_requested) {
1104             if (pbdev->summary_ind) {
1105                 pci_dereg_irqs(pbdev);
1106             }
1107             if (pbdev->iommu->enabled) {
1108                 pci_dereg_ioat(pbdev->iommu);
1109             }
1110             pbdev->state = ZPCI_FS_STANDBY;
1111             s390_pci_perform_unplug(pbdev);
1112         }
1113     }
1114
1115     /*
1116      * When resetting a PCI bridge, the assigned numbers are set to 0. So
1117      * on every system reset, we also have to reassign numbers.
1118      */
1119     s->bus_no = 0;
1120     pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s);
1121 }
1122
1123 static void s390_pcihost_class_init(ObjectClass *klass, void *data)
1124 {
1125     DeviceClass *dc = DEVICE_CLASS(klass);
1126     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
1127
1128     dc->reset = s390_pcihost_reset;
1129     dc->realize = s390_pcihost_realize;
1130     hc->pre_plug = s390_pcihost_pre_plug;
1131     hc->plug = s390_pcihost_plug;
1132     hc->unplug_request = s390_pcihost_unplug_request;
1133     hc->unplug = s390_pcihost_unplug;
1134     msi_nonbroken = true;
1135 }
1136
1137 static const TypeInfo s390_pcihost_info = {
1138     .name          = TYPE_S390_PCI_HOST_BRIDGE,
1139     .parent        = TYPE_PCI_HOST_BRIDGE,
1140     .instance_size = sizeof(S390pciState),
1141     .class_init    = s390_pcihost_class_init,
1142     .interfaces = (InterfaceInfo[]) {
1143         { TYPE_HOTPLUG_HANDLER },
1144         { }
1145     }
1146 };
1147
1148 static const TypeInfo s390_pcibus_info = {
1149     .name = TYPE_S390_PCI_BUS,
1150     .parent = TYPE_BUS,
1151     .instance_size = sizeof(S390PCIBus),
1152 };
1153
1154 static uint16_t s390_pci_generate_uid(S390pciState *s)
1155 {
1156     uint16_t uid = 0;
1157
1158     do {
1159         uid++;
1160         if (!s390_pci_find_dev_by_uid(s, uid)) {
1161             return uid;
1162         }
1163     } while (uid < ZPCI_MAX_UID);
1164
1165     return UID_UNDEFINED;
1166 }
1167
1168 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp)
1169 {
1170     uint32_t fid = 0;
1171
1172     do {
1173         if (!s390_pci_find_dev_by_fid(s, fid)) {
1174             return fid;
1175         }
1176     } while (fid++ != ZPCI_MAX_FID);
1177
1178     error_setg(errp, "no free fid could be found");
1179     return 0;
1180 }
1181
1182 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
1183 {
1184     S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
1185     S390pciState *s = s390_get_phb();
1186
1187     if (!zpci->target) {
1188         error_setg(errp, "target must be defined");
1189         return;
1190     }
1191
1192     if (s390_pci_find_dev_by_target(s, zpci->target)) {
1193         error_setg(errp, "target %s already has an associated zpci device",
1194                    zpci->target);
1195         return;
1196     }
1197
1198     if (zpci->uid == UID_UNDEFINED) {
1199         zpci->uid = s390_pci_generate_uid(s);
1200         if (!zpci->uid) {
1201             error_setg(errp, "no free uid could be found");
1202             return;
1203         }
1204     } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) {
1205         error_setg(errp, "uid %u already in use", zpci->uid);
1206         return;
1207     }
1208
1209     if (!zpci->fid_defined) {
1210         Error *local_error = NULL;
1211
1212         zpci->fid = s390_pci_generate_fid(s, &local_error);
1213         if (local_error) {
1214             error_propagate(errp, local_error);
1215             return;
1216         }
1217     } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) {
1218         error_setg(errp, "fid %u already in use", zpci->fid);
1219         return;
1220     }
1221
1222     zpci->state = ZPCI_FS_RESERVED;
1223     zpci->fmb.format = ZPCI_FMB_FORMAT;
1224 }
1225
1226 static void s390_pci_device_reset(DeviceState *dev)
1227 {
1228     S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
1229
1230     switch (pbdev->state) {
1231     case ZPCI_FS_RESERVED:
1232         return;
1233     case ZPCI_FS_STANDBY:
1234         break;
1235     default:
1236         pbdev->fh &= ~FH_MASK_ENABLE;
1237         pbdev->state = ZPCI_FS_DISABLED;
1238         break;
1239     }
1240
1241     if (pbdev->summary_ind) {
1242         pci_dereg_irqs(pbdev);
1243     }
1244     if (pbdev->iommu->enabled) {
1245         pci_dereg_ioat(pbdev->iommu);
1246     }
1247
1248     fmb_timer_free(pbdev);
1249 }
1250
1251 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
1252                          void *opaque, Error **errp)
1253 {
1254     Property *prop = opaque;
1255     uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
1256
1257     visit_type_uint32(v, name, ptr, errp);
1258 }
1259
1260 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
1261                          void *opaque, Error **errp)
1262 {
1263     DeviceState *dev = DEVICE(obj);
1264     S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
1265     Property *prop = opaque;
1266     uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
1267
1268     if (dev->realized) {
1269         qdev_prop_set_after_realize(dev, name, errp);
1270         return;
1271     }
1272
1273     visit_type_uint32(v, name, ptr, errp);
1274     zpci->fid_defined = true;
1275 }
1276
1277 static const PropertyInfo s390_pci_fid_propinfo = {
1278     .name = "zpci_fid",
1279     .get = s390_pci_get_fid,
1280     .set = s390_pci_set_fid,
1281 };
1282
1283 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
1284     DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
1285
1286 static Property s390_pci_device_properties[] = {
1287     DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
1288     DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
1289     DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
1290     DEFINE_PROP_END_OF_LIST(),
1291 };
1292
1293 static const VMStateDescription s390_pci_device_vmstate = {
1294     .name = TYPE_S390_PCI_DEVICE,
1295     /*
1296      * TODO: add state handling here, so migration works at least with
1297      * emulated pci devices on s390x
1298      */
1299     .unmigratable = 1,
1300 };
1301
1302 static void s390_pci_device_class_init(ObjectClass *klass, void *data)
1303 {
1304     DeviceClass *dc = DEVICE_CLASS(klass);
1305
1306     dc->desc = "zpci device";
1307     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1308     dc->reset = s390_pci_device_reset;
1309     dc->bus_type = TYPE_S390_PCI_BUS;
1310     dc->realize = s390_pci_device_realize;
1311     device_class_set_props(dc, s390_pci_device_properties);
1312     dc->vmsd = &s390_pci_device_vmstate;
1313 }
1314
1315 static const TypeInfo s390_pci_device_info = {
1316     .name = TYPE_S390_PCI_DEVICE,
1317     .parent = TYPE_DEVICE,
1318     .instance_size = sizeof(S390PCIBusDevice),
1319     .class_init = s390_pci_device_class_init,
1320 };
1321
1322 static TypeInfo s390_pci_iommu_info = {
1323     .name = TYPE_S390_PCI_IOMMU,
1324     .parent = TYPE_OBJECT,
1325     .instance_size = sizeof(S390PCIIOMMU),
1326 };
1327
1328 static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data)
1329 {
1330     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);
1331
1332     imrc->translate = s390_translate_iommu;
1333     imrc->replay = s390_pci_iommu_replay;
1334 }
1335
1336 static const TypeInfo s390_iommu_memory_region_info = {
1337     .parent = TYPE_IOMMU_MEMORY_REGION,
1338     .name = TYPE_S390_IOMMU_MEMORY_REGION,
1339     .class_init = s390_iommu_memory_region_class_init,
1340 };
1341
1342 static void s390_pci_register_types(void)
1343 {
1344     type_register_static(&s390_pcihost_info);
1345     type_register_static(&s390_pcibus_info);
1346     type_register_static(&s390_pci_device_info);
1347     type_register_static(&s390_pci_iommu_info);
1348     type_register_static(&s390_iommu_memory_region_info);
1349 }
1350
1351 type_init(s390_pci_register_types)